xserver-xorg-video-openchrome: Changes to 'upstream-unstable'
NEWS | 34
README | 135 +-
configure.ac | 2
src/Makefile.am | 11
src/compat-api.h | 5
src/via_analog.c | 429 ++++++++
src/via_bandwidth.c | 528 ----------
src/via_display.c | 2615 +++++++++++++++++++++++++++++++++-------------------
src/via_dri.c | 2
src/via_driver.c | 57 -
src/via_driver.h | 47
src/via_exa_h2.c | 4
src/via_exa_h6.c | 4
src/via_fp.c | 1515 ++++++++++++++++++++++++++++++
src/via_i2c.c | 22
src/via_id.c | 2
src/via_lvds.c | 1043 --------------------
src/via_memcpy.c | 1
src/via_mode.h | 64 -
src/via_outputs.c | 1212 +++++-------------------
src/via_priv.h | 2
src/via_sii164.c | 483 +++++++++
src/via_sii164.h | 54 +
src/via_tmds.c | 1238 ++++++++++++++++++++++++
src/via_tv.c | 898 +++++++++++++++++
src/via_ums.c | 52 -
src/via_ums.h | 87 +
src/via_vgahw.c | 2
src/via_vt162x.c | 17
src/via_vt1632.c | 532 +++++++---
src/via_vt1632.h | 19
src/via_xv.c | 2
tools/registers.c | 2
33 files changed, 7257 insertions(+), 3863 deletions(-)
New commits:
commit 5e158c76eb3a0fb0db207229697139f8da2faaae
Author: Kevin Brace <kevinbrace@gmx.com>
Date: Tue Mar 7 00:06:37 2017 -0800
Version bumped to 0.6
Signed-off-by: Kevin Brace <kevinbrace@gmx.com>
diff --git a/NEWS b/NEWS
index 1e56e0c..fd720df 100644
--- a/NEWS
+++ b/NEWS
@@ -1,3 +1,37 @@
+OpenChrome DDX Version 0.6 (March 7th, 2017)
+--------------------------------------------
+
+OpenChrome DDX Version 0.6 is an improved version of OpenChrome DDX
+Version 0.5 with a number of improvements made to the code. OpenChrome
+DDX Version 0.6 is written in a way to completely replace Version
+0.2.904 through 0.5.
+
+OpenChrome DDX Version 0.6 has added the following new features.
+
+- First official support for CX700, VX700, and VX800 chipsets
+ integrated TMDS transmitter (i.e., DVI support)
+- Initial support for Silicon Image SiI 164 TMDS transmitter
+
+
+OpenChrome DDX Version 0.6 has the following improvements.
+
+- Improved FP reinitialization when resuming from standby
+ (HP 2133 Mini-Note, FIC CE260 / CE261 based netbooks like
+ Everex CloudBook and Sylvania g netbook)
+- Improved automatic detection of display resources
+- Improved X Server stability in dual monitor mode
+- Automatic active steering of the display controller channel to the
+ correct display output device
+
+
+OpenChrome DDX Version 0.6 fixes the following bugs.
+
+- Fix for the disruption of the VT (Virtual Terminal) screen bug
+ introduced in Version 0.5
+- Fix for HP 2133 Mini-Note's PCIe WLAN getting turned off
+ inadvertently bug introduced in Version 0.5
+
+
OpenChrome Version 0.5 (July 6th, 2016)
---------------------------------------
diff --git a/README b/README
index 9742887..06cfba2 100644
--- a/README
+++ b/README
@@ -1,9 +1,10 @@
-OpenChrome Version 0.5 Release Note (July 6th, 2016)
-----------------------------------------------------
+OpenChrome DDX Version 0.6 Release Note (March 7th, 2017)
+---------------------------------------------------------
-OpenChrome is an open source implementation of X.Org Server
+OpenChrome DDX is an open source implementation of X.Org Server
DDX (Device Dependent X) graphics device driver for VIA Technologies
UniChrome and Chrome9 IGPs. (Integrated Graphics Processor)
+OpenChrome DDX handles only 2D and video acceleration.
Please note that OpenChrome does not support VIA Technologies IGPs
that are related to Trident Microsystems (i.e., Apollo MVP4, PLE133,
and KLE133) or S3 Graphics (i.e., KM266). Here is the project home
@@ -19,7 +20,7 @@ Supported Chipsets
------------------
- CLE266
-- KM400 / KM400A / KN400 / P4M800
+- KM400(A) / KN400(A) / P4M800
- K8M800 / K8N800
- PM800 / PN800 / PM880 / CN333 / CN400
- P4M800 Pro / VN800 / CN700
@@ -37,40 +38,44 @@ Supported Features
------------------
- VGA
-- DVI from an integrated TMDS transmitter (CX700, VX700, and
- VX900 chipsets)
-- DVI from VIA Technologies VT1632A TMDS transmitter
-- LVDS flat panel (i.e., laptop LCD flat panel)
+- DVI from an integrated TMDS transmitter (CX700, VX700, and VX800
+ chipsets)
+- DVI from Silicon Image SiI 164 and VIA Technologies VT1632(A) TMDS
+ transmitters
+- Flat Panel
- EXA acceleration (RENDER acceleration)
- Xv and XvMC
-- Multiple display output (i.e., RandR)
+- Dual monitor support
Unproven Features
-----------------
-- Standby (ACPI S1 and S3 State) resume
+- Standby resume
- TV out
-- KMS support (Kernel Mode Setting; requires the use of VIA
- Technologies IGP DRM module supporting KMS. See "Where to Obtain
- OpenChrome Source Code" chapter for more details.)
+- KMS support
+ (Kernel Mode Setting; requires the use of still in
+ development KMS supporting OpenChrome DRM. See "Where to Obtain
+ OpenChrome Source Code" section for more details.)
Unimplemented Features
----------------------
-- Hardware cursor support for CLE266, KM400, KM400A, KN400, and
+- Hardware cursor support for CLE266, KM400(A) / KN400(A), and
P4M800 chipsets
-- DVI via Silicon Image SiI 164 TMDS transmitter or Chrontel TMDS
- transmitter
+- DVI via Chrontel TMDS transmitter
- LVDS via VT1631 / VT1636 LVDS transmitter
-- External HDMI transmitter (i.e., Jetway J7F5M-VHE-LF motherboard,
- VIA Embedded EPIA-P720 motherboard, etc.)
-- DisplayPort and HDMI support for VX900 chipset (Might work with
- the experimental DRM module that supports KMS. See "Where to Obtain
- OpenChrome Source Code" chapter for more details.)
+- External HDMI transmitter
+ (i.e., Jetway J7F5M-VHE-LF motherboard, VIA Embedded EPIA-P720
+ motherboard, etc.)
+- HDMI support for VX900 chipset
+ (HDMI is supported via still in development KMS supporting
+ OpenChrome DRM. See "Where to Obtain OpenChrome Source Code"
+ section for more details.)
+- DisplayPort support for VX900 chipset
@@ -79,26 +84,45 @@ OS Support
- X.Org Server Version 1.7 or later
(It might not work correctly if it is compiled against an older
- X.Org Server.)
+ X.Org Server.)
- Linux Version 2.6.32 or later
(Note: For Linux Version 4.5 or later, you may have to blacklist
vesafb. This is a bug that has not been fixed so far.)
-What's New for OpenChrome Version 0.5
--------------------------------------
+What's New for OpenChrome DDX Version 0.6
+-----------------------------------------
-Based on OpenChrome Version 0.4.0 code, OpenChrome Version 0.5 fixes
-several bugs while adding two new features.
+OpenChrome DDX Version 0.6 is an improved version of OpenChrome DDX
+Version 0.5 with a number of improvements made to the code. OpenChrome
+DDX Version 0.6 is written in a way to completely replace Version
+0.2.904 through 0.5.
-- Major code cleanup
-- Removal of more manual options (BusWidth, ForcePanel, and AccelMethod)
-- Fix for runtime screen resolution change X.Org Server crash bug
-- Fix for CLE266 chipset not being able to function correctly if
- "CRT + TV" option was chosen in BIOS setup
-- Initial support for VIA Technologies VT1632A TMDS transmitter for DVI
-- Initial support for multiple display output (i.e., RandR)
+OpenChrome DDX Version 0.6 has added the following new features.
+
+- First official support for CX700, VX700, and VX800 chipsets
+ integrated TMDS transmitter (i.e., DVI support)
+- Initial support for Silicon Image SiI 164 TMDS transmitter
+
+
+OpenChrome DDX Version 0.6 has the following improvements.
+
+- Improved FP reinitialization when resuming from standby
+ (HP 2133 Mini-Note, FIC CE260 / CE261 based netbooks like
+ Everex CloudBook and Sylvania g netbook)
+- Improved automatic detection of display resources
+- Improved X Server stability in dual monitor mode
+- Automatic active steering of the display controller channel to the
+ correct display output device
+
+
+OpenChrome DDX Version 0.6 fixes the following bugs.
+
+- Fix for the disruption of the VT (Virtual Terminal) screen bug
+ introduced in Version 0.5
+- Fix for HP 2133 Mini-Note's PCIe WLAN getting turned off
+ inadvertently bug introduced in Version 0.5
@@ -119,17 +143,19 @@ list is for discussing OpenChrome development issues.
Support for Older Versions
--------------------------
-As a general rule, the older version OpenChrome will not be supported
-once a new version is out. It is sometimes useful to try out the
-older version, in order to see if a regression has occurred, but
-generally speaking, there will be no fixes for the older versions.
-OpenChrome is written so that it can be compiled against X.Org Server
-Version 1.7 or later and Linux Version 2.6.32 or later. We will likely
-maintain this minimum platform requirement for the foreseeable future.
-What this means is that if the user wanted to try the latest OpenChrome,
-it can do so with an OS that was released around Year 2010. OpenChrome
-might still compile for anything older than that, but it might not be
-stable enough to be useful.
+The OpenChrome Project practices rolling release update policy for
+OpenChrome DDX. What this means is that the older version of
+OpenChrome DDX will not be supported once a new version is out.
+It is sometimes useful to try out the older version, in order to see
+if a regression has occurred, but generally speaking, there will be
+no fixes for the older versions. OpenChrome DDX is written so that it
+can be compiled against X.Org Server Version 1.7 or later and Linux
+Version 2.6.32 or later. We will likely maintain this minimum platform
+requirement for the foreseeable future. What this means is that if the
+user wanted to try the latest OpenChrome DDX, it can do so with an OS
+that was released around Year 2010. OpenChrome DDX might still compile
+for anything older than that, but it might not be stable enough to be
+useful.
@@ -165,14 +191,15 @@ notified of the bug.
Where to Obtain OpenChrome Source Code
--------------------------------------
-The OpenChrome source code repository is located at.
+OpenChrome source code repository is located at.
http://cgit.freedesktop.org/openchrome/xf86-video-openchrome/
-The experimental DRM (Direct Rendering Manager) module that supports
-KMS (Kernel Mode Setting) is located at.
+OpenChrome DRM (Direct Rendering Manager) module source code
+repository is located at.
+https://cgit.freedesktop.org/openchrome/drm-openchrome/
https://cgit.freedesktop.org/openchrome/drm-openchrome/tree/drivers/gpu/drm/via
@@ -185,14 +212,14 @@ development for more than 10 years. In that process, there were many
different developers that wrote the code in varying ways. OpenChrome
is a unified graphics device driver that supports 12 generations of
VIA Technologies IGP starting from CLE266 chipset all the way to
-VX900 chipset. Even the VIA Technoloiges in house unified graphics
+VX900 chipset. Even the VIA Technologies in house unified graphics
device driver does not support the number of devices OpenChrome does.
Furthermore, VIA Technologies IGPs tend to rely heavily on many
-different kinds of external encoders and transmitters to get the
-desired functionality. As a result, it is very difficult to get the
-code right for every possible configuration you can think of.
- Starting with OpenChrome Version 0.4.0, the project is under new
+different external encoders and transmitters to display the image.
+As a result, it is very difficult to get the code right for every
+possible configuration you can think of.
+ Starting with OpenChrome Version 0.4, the project is under new
management, and moving forward, the emphasis will be on device driver
-reliability, and code maintainability.
+reliability and code maintainability.
-(End of this document.)
+(End of document.)
diff --git a/configure.ac b/configure.ac
index 38e5967..b751558 100644
--- a/configure.ac
+++ b/configure.ac
@@ -23,7 +23,7 @@
# Initialize Autoconf
AC_PREREQ(2.57)
AC_INIT([xf86-video-openchrome],
- [0.5.900],
+ [0.6.0],
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg&component=Driver/openchrome],
[xf86-video-openchrome])
commit 8c819edb95880c6726f9bc80cae6ac3b3bd0f6a8
Author: Kevin Brace <kevinbrace@gmx.com>
Date: Mon Feb 27 15:59:10 2017 -0800
Version bumped to 0.5.900 (Version 0.6 RC1)
This is the first release candidate of OpenChrome DDX Version 0.6. It
will be nice if people who own VIA Technologies Chrome IGP based
hardware can dust off their long unused hardware, and let the
developer know how it performs. If there are no serious problems, this
version will be the Version 0.6 official release version.
Signed-off-by: Kevin Brace <kevinbrace@gmx.com>
diff --git a/configure.ac b/configure.ac
index 65cbf12..38e5967 100644
--- a/configure.ac
+++ b/configure.ac
@@ -23,7 +23,7 @@
# Initialize Autoconf
AC_PREREQ(2.57)
AC_INIT([xf86-video-openchrome],
- [0.5.187],
+ [0.5.900],
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg&component=Driver/openchrome],
[xf86-video-openchrome])
commit f50e55fc7e70a3bc1ed688bb7c1746de67da203d
Author: Kevin Brace <kevinbrace@gmx.com>
Date: Mon Feb 27 15:57:01 2017 -0800
Faking integrated TMDS (DVI) transmitter DVI detection
Probably not a good idea, but do not have a choice for now.
Integrated TMDS transmitter based DVI's detection pin does not really
work, so this is how detection needs to be faked. This issue does not
affect those where the DVI is coming from an external TMDS transmitter
like SiI 164 or VT1632(A).
Signed-off-by: Kevin Brace <kevinbrace@gmx.com>
diff --git a/src/via_tmds.c b/src/via_tmds.c
index 2c373b2..9543665 100644
--- a/src/via_tmds.c
+++ b/src/via_tmds.c
@@ -198,21 +198,8 @@ viaTMDSSense(ScrnInfoPtr pScrn)
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Entered viaTMDSSense.\n"));
- if (pVia->Chipset == VIA_CX700) {
- /* Detect the presence of DVI. */
- /* 3C5.1A[4] - DVI Sense
- * 0: No connect
- * 1: Connected */
- tmdsReceiverDetected = (hwp->readSeq(hwp, 0x1A) >> 4) & 0x01;
- } else if ((pVia->Chipset == VIA_VX800)
- || (pVia->Chipset == VIA_VX855)
- || (pVia->Chipset == VIA_VX900)) {
- /* Detect the presence of DVI. */
- /* 3C5.3E[5] - Integrated DVI Sense
- * 0: No connect
- * 1: Connected */
- tmdsReceiverDetected = (hwp->readSeq(hwp, 0x3E) >> 5) & 0x01;
- }
+ /* For now, faking DVI detection.*/
+ tmdsReceiverDetected = 0x01;
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Integrated TMDS transmitter %s a TMDS receiver.\n",
commit d2b60273cc69f382f9616718c61ca36a23f4210b
Author: Kevin Brace <kevinbrace@gmx.com>
Date: Mon Feb 27 15:47:54 2017 -0800
Minor reduction of unused variables
Signed-off-by: Kevin Brace <kevinbrace@gmx.com>
diff --git a/src/via_driver.c b/src/via_driver.c
index c219181..439313c 100644
--- a/src/via_driver.c
+++ b/src/via_driver.c
@@ -627,7 +627,6 @@ static Bool
VIASetupDefaultOptions(ScrnInfoPtr pScrn)
{
VIAPtr pVia = VIAPTR(pScrn);
- VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo;
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIASetupDefaultOptions - Setting up default chipset options.\n"));
diff --git a/src/via_fp.c b/src/via_fp.c
index ee69fc1..dea6ec9 100644
--- a/src/via_fp.c
+++ b/src/via_fp.c
@@ -161,7 +161,6 @@ static void
viaLVDS1SetFormat(ScrnInfoPtr pScrn, CARD8 format)
{
vgaHWPtr hwp = VGAHWPTR(pScrn);
- VIAPtr pVia = VIAPTR(pScrn);
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Entered viaLVDS1SetFormat.\n"));
@@ -258,7 +257,6 @@ static void
viaLVDS2SetFormat(ScrnInfoPtr pScrn, CARD8 format)
{
vgaHWPtr hwp = VGAHWPTR(pScrn);
- VIAPtr pVia = VIAPTR(pScrn);
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Entered viaLVDS2SetFormat.\n"));
diff --git a/src/via_tmds.c b/src/via_tmds.c
index 4d5b154..2c373b2 100644
--- a/src/via_tmds.c
+++ b/src/via_tmds.c
@@ -1094,7 +1094,7 @@ viaTMDSInit(ScrnInfoPtr pScrn)
vgaHWPtr hwp = VGAHWPTR(pScrn);
VIAPtr pVia = VIAPTR(pScrn);
VIATMDSRecPtr pVIATMDSRec = NULL;
- CARD8 sr13, sr5a, cr3e;
+ CARD8 sr13, sr5a;
Bool status = FALSE;
char outputNameBuffer[32];
commit 770d5c08bdbd8d115f16f29d23ed4bf9390b5328
Author: Kevin Brace <kevinbrace@gmx.com>
Date: Mon Feb 27 15:34:24 2017 -0800
Improving DVI connector availability
Signed-off-by: Kevin Brace <kevinbrace@gmx.com>
diff --git a/src/via_tmds.c b/src/via_tmds.c
index 3e0267d..4d5b154 100644
--- a/src/via_tmds.c
+++ b/src/via_tmds.c
@@ -1103,6 +1103,10 @@ viaTMDSInit(ScrnInfoPtr pScrn)
sr5a = hwp->readSeq(hwp, 0x5A);
ViaSeqMask(hwp, 0x5A, sr5a | 0x01, 0x01);
+ sr13 = hwp->readSeq(hwp, 0x13);
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "SR13: 0x%02X\n", sr13));
+ hwp->writeSeq(hwp, 0x5A, sr5a);
/* 3C5.13[7:6] - Integrated LVDS / DVI Mode Select
* (DVP1D15-14 pin strapping)
@@ -1110,32 +1114,20 @@ viaTMDSInit(ScrnInfoPtr pScrn)
* 01: DVI + LVDS2
* 10: Dual LVDS Channel (High Resolution Panel)
* 11: One DVI only (decrease the clock jitter) */
- sr13 = hwp->readSeq(hwp, 0x13);
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "SR13: 0x%02X\n", sr13));
- hwp->writeSeq(hwp, 0x5A, sr5a);
- sr13 &= 0xC0;
- if ((sr13 == 0x40) || (sr13 == 0xC0)) {
+ /* Check for DVI presence using pin strappings.
+ * VIA Technologies NanoBook reference design based products
+ * have their pin strappings set to a wrong setting to communicate
+ * the presence of DVI, so it requires special handling here. */
+ if ((((~(sr13 & 0x80)) && (sr13 & 0x40))
+ || ((sr13 & 0x80) && (sr13 & 0x40)))
+ || (pVia->isVIANanoBook)) {
+
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Integrated TMDS transmitter found via pin strapping.\n");
} else {
- /* 3X5.3E[5] supposedly signals the presence of
- * a DVI connector coming from an integrated TMDS transmitter.
- * This check is done if the pin strapping does not indicate
- * the presence of a DVI connector. Note that 3X5.3E is set by
- * VIA Technologies VGA BIOS. */
- cr3e = hwp->readCrtc(hwp, 0x3E);
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "CR3E: 0x%02X\n", cr3e));
- if (cr3e & 0x20) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Integrated TMDS transmitter found via "
- "VIA Technologies VGA BIOS scratch pad register.\n");
- } else {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Integrated TMDS transmitter not found.\n");
- goto exit;
- }
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Integrated TMDS transmitter not found.\n");
+ goto exit;
}
pVIATMDSRec = xnfcalloc(1, sizeof(VIATMDSRec));
commit 5e5c8da481050b235fce5dd80527b84a3ddf25a6
Author: Kevin Brace <kevinbrace@gmx.com>
Date: Sun Feb 26 16:41:52 2017 -0800
Version bumped to 0.5.187
Signed-off-by: Kevin Brace <kevinbrace@gmx.com>
diff --git a/configure.ac b/configure.ac
index 7db0b45..65cbf12 100644
--- a/configure.ac
+++ b/configure.ac
@@ -23,7 +23,7 @@
# Initialize Autoconf
AC_PREREQ(2.57)
AC_INIT([xf86-video-openchrome],
- [0.5.186],
+ [0.5.187],
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg&component=Driver/openchrome],
[xf86-video-openchrome])
commit 97db7a46ca94778d5de6beab16af0d8d2897bb76
Author: Kevin Brace <kevinbrace@gmx.com>
Date: Sun Feb 26 16:31:31 2017 -0800
Changing via_lvds.c to via_fp.c
Signed-off-by: Kevin Brace <kevinbrace@gmx.com>
diff --git a/src/Makefile.am b/src/Makefile.am
index 86061b2..68d75c7 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -54,7 +54,7 @@ openchrome_drv_la_SOURCES = \
via_driver.h \
via_i2c.c \
via_id.c \
- via_lvds.c \
+ via_fp.c \
via_memcpy.c \
via_memmgr.h \
via_memmgr.c \
diff --git a/src/via_fp.c b/src/via_fp.c
new file mode 100644
index 0000000..ee69fc1
--- /dev/null
+++ b/src/via_fp.c
@@ -0,0 +1,1517 @@
+/*
+ * Copyright 2007-2015 The Openchrome Project
+ * [https://www.freedesktop.org/wiki/Openchrome]
+ * Copyright 1998-2007 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2007 S3 Graphics, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+ * Integrated LVDS power management functions.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "via_driver.h"
+#include "via_mode.h"
+#include <unistd.h>
+
+/*
+ * Option handling.
+ */
+enum ViaPanelOpts {
+ OPTION_CENTER
+};
+
+static OptionInfoRec ViaPanelOptions[] =
+{
+ {OPTION_CENTER, "Center", OPTV_BOOLEAN, {0}, FALSE},
+ {-1, NULL, OPTV_NONE, {0}, FALSE}
+};
+
+/* These table values were copied from lcd.c of VIA Frame
+ * Buffer device driver. */
+/* {int Width, int Height, bool useDualEdge, bool useDithering}; */
+static ViaPanelModeRec ViaPanelNativeModes[] = {
+ { 640, 480, FALSE, TRUE},
+ { 800, 600, FALSE, TRUE},
+ {1024, 768, FALSE, TRUE},
+ {1280, 768, FALSE, TRUE},
+ {1280, 1024, TRUE, TRUE},
+ {1400, 1050, TRUE, TRUE},
+ {1600, 1200, TRUE, TRUE},
+ {1280, 800, FALSE, TRUE},
+ { 800, 480, FALSE, TRUE},
+ {1024, 768, TRUE, TRUE},
+ {1024, 768, FALSE, FALSE},
+ {1024, 768, TRUE, FALSE},
+ {1280, 768, FALSE, FALSE},
+ {1280, 1024, TRUE, FALSE},
+ {1400, 1050, TRUE, FALSE},
+ {1600, 1200, TRUE, FALSE},
+ {1366, 768, FALSE, FALSE},
+ {1024, 600, FALSE, TRUE},
+ {1280, 768, TRUE, TRUE},
+ {1280, 800, FALSE, TRUE},
+ {1360, 768, FALSE, FALSE},
+ {1280, 768, TRUE, FALSE},
+ { 480, 640, FALSE, TRUE},
+ {1200, 900, FALSE, FALSE}};
+
+#define MODEPREFIX(name) NULL, NULL, name, 0, M_T_DRIVER | M_T_DEFAULT
+#define MODESUFFIX 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,FALSE,FALSE,0,NULL,0,0.0,0.0
+
+static DisplayModeRec OLPCMode = {
+ MODEPREFIX("1200x900"),
+ 57275, 1200, 1208, 1216, 1240, 0,
+ 900, 905, 908, 912, 0,
+ V_NHSYNC | V_NVSYNC, MODESUFFIX
+};
+
+/*
+ 1. Formula:
+ 2^13 X 0.0698uSec [1/14.318MHz] = 8192 X 0.0698uSec =572.1uSec
+ Timer = Counter x 572 uSec
+ 2. Note:
+ 0.0698 uSec is too small to compute for hardware. So we multiply a
+ reference value(2^13) to make it big enough to compute for hardware.
+ 3. Note:
+ The meaning of the TD0~TD3 are count of the clock.
+ TD(sec) = (sec)/(per clock) x (count of clocks)
+*/
+
+#define TD0 200
+#define TD1 25
+#define TD2 0
+#define TD3 25
+
+/*
+ * Sets CX700 or later single chipset's LVDS1 I/O pad state.
+ */
+void
+viaLVDS1SetIOPadSetting(ScrnInfoPtr pScrn, CARD8 ioPadState)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Entered viaLVDS1SetIOPadSetting.\n"));
+
+ /* Set LVDS1 I/O pad state. */
+ /* 3C5.2A[1:0] - LVDS1 I/O Pad Control */
+ ViaSeqMask(hwp, 0x2A, ioPadState, 0x03);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "LVDS1 I/O Pad State: %d\n",
+ (ioPadState & 0x03));
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Exiting viaLVDS1SetIOPadSetting.\n"));
+}
+
+/*
+ * Sets IGA1 or IGA2 as the display output source for VIA Technologies
+ * Chrome IGP LVDS1 integrated LVDS transmitter.
+ */
+static void
+viaLVDS1SetDisplaySource(ScrnInfoPtr pScrn, CARD8 displaySource)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+ CARD8 temp = displaySource;
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Entered viaLVDS1SetDisplaySource.\n"));
+
+ /* Set LVDS1 integrated LVDS transmitter display output source. */
+ /* 3X5.99[4] - LVDS Channel 1 Data Source Selection
+ * 0: Primary Display
+ * 1: Secondary Display */
+ ViaCrtcMask(hwp, 0x99, temp << 4, 0x10);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "LVDS1 Integrated LVDS Transmitter Display Output "
+ "Source: IGA%d\n",
+ (temp & 0x01) + 1);
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Exiting viaLVDS1SetDisplaySource.\n"));
+}
+
+/*
+ * Sets LVDS1 (LVDS Channel 1) integrated LVDS transmitter format.
+ */
+static void
+viaLVDS1SetFormat(ScrnInfoPtr pScrn, CARD8 format)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+ VIAPtr pVia = VIAPTR(pScrn);
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Entered viaLVDS1SetFormat.\n"));
+
+ /* Set LVDS1 format. */
+ /* 3X5.D2[1] - LVDS Channel 1 Format Selection
+ * 0: SPWG Mode
+ * 1: OPENLDI Mode */
+ ViaCrtcMask(hwp, 0xD2, format << 1, 0x02);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "LVDS1 Format: %s\n",
+ (format & 0x01) ? "OPENLDI" : "SPWG");
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Exiting viaLVDS1SetFormat.\n"));
+}
+
+/*
+ * Sets CX700 or later single chipset's LVDS2 I/O pad state.
+ */
+static void
+viaLVDS2SetIOPadSetting(ScrnInfoPtr pScrn, CARD8 ioPadState)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Entered viaLVDS2SetIOPadSetting.\n"));
+
+ /* Set LVDS2 I/O pad state. */
+ /* 3C5.2A[3:2] - LVDS2 I/O Pad Control */
+ ViaSeqMask(hwp, 0x2A, ioPadState << 2, 0x0C);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "LVDS2 I/O Pad State: %d\n",
+ (ioPadState & 0x03));
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Exiting viaLVDS2SetIOPadSetting.\n"));
+}
+
+/*
+ * Sets IGA1 or IGA2 as the display output source for VIA Technologies
+ * Chrome IGP LVDS2 integrated LVDS transmitter.
+ */
+static void
+viaLVDS2SetDisplaySource(ScrnInfoPtr pScrn, CARD8 displaySource)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+ CARD8 temp = displaySource;
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Entered viaLVDS2SetDisplaySource.\n"));
+
+ /* Set LVDS2 integrated LVDS transmitter display output source. */
+ /* 3X5.97[4] - LVDS Channel 2 Data Source Selection
+ * 0: Primary Display
+ * 1: Secondary Display */
+ ViaCrtcMask(hwp, 0x97, temp << 4, 0x10);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "LVDS2 Integrated LVDS Transmitter Display Output "
+ "Source: IGA%d\n",
+ (temp & 0x01) + 1);
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Exiting viaLVDS2SetDisplaySource.\n"));
+}
+
+/*
+ * Sets LVDS2 (LVDS Channel 2) integrated LVDS transmitter delay tap.
+ */
+static void
+viaLVDS2SetDelayTap(ScrnInfoPtr pScrn, CARD8 delayTap)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Entered viaLVDS2SetDelayTap.\n"));
+
+ /* Set LVDS2 delay tap. */
+ /* 3X5.97[3:0] - LVDS2 Delay Tap */
+ ViaCrtcMask(hwp, 0x97, delayTap, 0x0F);
+
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "LVDS2 Delay Tap: %d\n",
+ (delayTap & 0x0F));
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Exiting viaLVDS2SetDelayTap.\n"));
+}
+
+/*
+ * Sets LVDS2 (LVDS Channel 2) integrated LVDS transmitter format.
+ */
+static void
+viaLVDS2SetFormat(ScrnInfoPtr pScrn, CARD8 format)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+ VIAPtr pVia = VIAPTR(pScrn);
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Entered viaLVDS2SetFormat.\n"));
+
+ /* Set LVDS2 format. */
+ /* 3X5.D2[0] - LVDS Channel 2 Format Selection
+ * 0: SPWG Mode
+ * 1: OPENLDI Mode */
+ ViaCrtcMask(hwp, 0xD2, format, 0x01);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "LVDS2 Format: %s\n",
+ (format & 0x01) ? "OPENLDI" : "SPWG");
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Exiting viaLVDS2SetFormat.\n"));
+}
+
+/*
+ * Sets IGA1 or IGA2 as the display output source for VIA Technologies
+ * Chrome IGP DFP (Digital Flat Panel) High interface.
+ */
+static void
+viaDFPHighSetDisplaySource(ScrnInfoPtr pScrn, CARD8 displaySource)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+ CARD8 temp = displaySource;
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Entered viaDFPHighSetDisplaySource.\n"));
+
+ /* Set DFP High display output source. */
+ /* 3X5.97[4] - DFP High Data Source Selection
+ * 0: Primary Display
+ * 1: Secondary Display */
+ ViaCrtcMask(hwp, 0x97, temp << 4, 0x10);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "DFP High Display Output Source: IGA%d\n",
+ (temp & 0x01) + 1);
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Exiting viaDFPHighSetDisplaySource.\n"));
+}
+
+/*
+ * Sets DFP (Digital Flat Panel) Low interface delay tap.
+ */
+static void
+viaDFPLowSetDelayTap(ScrnInfoPtr pScrn, CARD8 delayTap)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Entered viaDFPLowSetDelayTap.\n"));
+
+ /* Set DFP Low interface delay tap. */
+ /* 3X5.99[3:0] - DFP Low Delay Tap */
+ ViaCrtcMask(hwp, 0x99, delayTap, 0x0F);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "DFP Low Delay Tap: %d\n",
+ (delayTap & 0x0F));
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Exiting viaDFPLowSetDelayTap.\n"));
+}
+
+/*
+ * Sets DFP (Digital Flat Panel) High interface delay tap.
+ */
+static void
+viaDFPHighSetDelayTap(ScrnInfoPtr pScrn, CARD8 delayTap)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Entered viaDFPHighSetDelayTap.\n"));
+
+ /* Set DFP High interface delay tap. */
+ /* 3X5.97[3:0] - DFP High Delay Tap */
+ ViaCrtcMask(hwp, 0x97, delayTap, 0x0F);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "DFP High Delay Tap: %d\n",
+ (delayTap & 0x0F));
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Exiting viaDFPHighSetDelayTap.\n"));
+}
+
+/*
+ * Turns LVDS2 output color dithering on or off. (18-bit color display vs.
+ * 24-bit color display)
+ */
+static void
+viaLVDS2SetDithering(ScrnInfoPtr pScrn, CARD8 ditheringStatus)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Entered viaLVDS2SetDithering.\n"));
+
+ /* Set LVDS2 output color dithering bit. */
+ /* 3X5.D4[6] - LVDS Channel 2 Output Bits
+ * 0: 24 bits (dithering off)
+ * 1: 18 bits (dithering on) */
+ ViaCrtcMask(hwp, 0xD4, ditheringStatus ? 0x40 : 0x00, 0x40);
+
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "LVDS2 Output Color Dithering: %s\n",
+ ditheringStatus ? "On (18 bit)" : "Off (24 bit)");
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Exiting viaLVDS2SetDithering.\n"));
+}
+
+/*
+ * Sets output format of LVDS2 to rotation or sequential mode.
+ */
+static void
+viaLVDS2SetOutputFormat(ScrnInfoPtr pScrn, CARD8 outputFormat)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Entered viaLVDS2SetOutputFormat.\n"));
+
+ /* Set LVDS2 output format. */
+ /* 3X5.D4[7] - LVDS Channel 2 Output Format
+ * 0: Rotation
+ * 1: Sequential */
+ ViaCrtcMask(hwp, 0xD4, outputFormat ? 0x80 : 0x00, 0x80);
+
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "LVDS2 Output Format: %s\n",
+ outputFormat ? "Sequential" : "Rotation");
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Exiting viaLVDS2SetOutputFormat.\n"));
+}
+
+/*
+ * Sets PCIe based 2 chip chipset's pin multiplexed DVP0 I/O pad state.
+ */
+static void
+viaDVP0PCIeSetIOPadSetting(ScrnInfoPtr pScrn, CARD8 ioPadState)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Entered viaDVP0PCIeSetIOPadSetting.\n"));
+
+ /* Set pin multiplexed DVP1 I/O pad state. */
+ /* 3C5.2A[3:2] - DVP0 I/O Pad Control */
+ ViaSeqMask(hwp, 0x2A, ioPadState << 2, 0x0C);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "DVP0 I/O Pad State: %d\n",
+ (ioPadState & 0x03));
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Exiting viaDVP0PCIeSetIOPadSetting.\n"));
+}
+
+/*
+ * Sets PCIe based 2 chip chipset's pin multiplexed DVP1 I/O pad state.
+ */
+static void
+viaDVP1PCIeSetIOPadSetting(ScrnInfoPtr pScrn, CARD8 ioPadState)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Entered viaDVP1PCIeSetIOPadSetting.\n"));
+
+ /* Set pin multiplexed DVP0 I/O pad state. */
+ /* 3C5.2A[1:0] - DVP1 I/O Pad Control */
+ ViaSeqMask(hwp, 0x2A, ioPadState, 0x03);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "DVP1 I/O Pad State: %d\n",
+ (ioPadState & 0x03));
+
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