intel-gpu-tools: Changes to 'upstream-unstable'
Rebased ref, commits from common ancestor:
commit 7f93a2632aae7c5865823b4a2fa4cd8c2a1c0977
Author: Petri Latvala <petri.latvala@intel.com>
Date: Wed Oct 4 13:48:15 2017 +0300
Update NEWS, bump version to 1.20.
Signed-off-by: Petri Latvala <petri.latvala@intel.com>
Acked-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
diff --git a/NEWS b/NEWS
index 80136fa..b6d0958 100644
--- a/NEWS
+++ b/NEWS
@@ -1,3 +1,46 @@
+Release 1.20 (2017-10-03)
+-------------------------
+
+Library changes:
+
+- Added helpers for launching external processes and capturing their
+ outputs. (Abdiel Janulgue)
+
+- Increased max pipe count to 6 to support AMD GPUs. (Leo (Sunpeng) Li)
+
+- Various improvements for Chamelium support. (Paul Kocialkowski)
+
+- Added Coffeelake platform support. (Rodrigo Vivi, Anusha Srivatsa)
+
+- Added Cannonlake platform support. (Rodrigo Vivi)
+
+- Added support for audio testing. (Paul Kocialkowski)
+
+- Added preliminary meson build system support. (Daniel Vetter, et al)
+ -- Autotools remains the supported build system for now.
+
+Tools changes:
+
+- Refactored video bios data to use definitions copied from the
+ kernel. (Jani Nikula)
+
+Documentation changes:
+
+- Added user and developer documentation about Chamelium support to
+ aid deploying the platform. (Paul Kocialkowski)
+
+- Added documentation about the required hardware setup for audio
+ testing. (Paul Kocialkowski)
+
+Tests changes:
+
+- Converted remaining shell-script tests to C code (Abdiel Janulgue)
+
+- Multiple new tests.
+
+
+And many other bug fixes and improvements.
+
Release 1.19 (2017-06-09)
-------------------------
diff --git a/configure.ac b/configure.ac
index 01bb2f4..53ef704 100644
--- a/configure.ac
+++ b/configure.ac
@@ -22,7 +22,7 @@
AC_PREREQ([2.60])
AC_INIT([intel-gpu-tools],
- [1.19],
+ [1.20],
[https://bugs.freedesktop.org/enter_bug.cgi?product=DRI&component=IGT],
[intel-gpu-tools])
diff --git a/meson.build b/meson.build
index 7a09228..310174a 100644
--- a/meson.build
+++ b/meson.build
@@ -1,5 +1,5 @@
project('IGT gpu tests', 'c',
- version : '1.19',
+ version : '1.20',
default_options: [
'warning_level=2',
'c_std=gnu99',
commit 332108184493d0b58963ffe13f9b568a6fa462df
Author: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Date: Wed Oct 4 12:11:40 2017 +0100
tests/perf: split array of formats descriptions
The I915_OA_FORMAT_C4_B8 format has different offset on Haswell &
Gen8. Let's split the format lists so we don't mix them.
Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
diff --git a/tests/perf.c b/tests/perf.c
index 2adce76..ad62319 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -188,7 +188,7 @@ struct accumulator {
uint64_t deltas[MAX_RAW_OA_COUNTERS];
};
-static struct {
+struct oa_format {
const char *name;
size_t size;
int a40_high_off; /* bytes */
@@ -201,69 +201,59 @@ static struct {
int n_b;
int c_off;
int n_c;
- int min_gen;
- int max_gen;
-} oa_formats[local_I915_OA_FORMAT_MAX] = {
+};
+
+static struct oa_format hsw_oa_formats[local_I915_OA_FORMAT_MAX] = {
[I915_OA_FORMAT_A13] = { /* HSW only */
"A13", .size = 64,
- .a_off = 12, .n_a = 13,
- .max_gen = 7 },
+ .a_off = 12, .n_a = 13, },
[I915_OA_FORMAT_A29] = { /* HSW only */
"A29", .size = 128,
- .a_off = 12, .n_a = 29,
- .max_gen = 7 },
+ .a_off = 12, .n_a = 29, },
[I915_OA_FORMAT_A13_B8_C8] = { /* HSW only */
"A13_B8_C8", .size = 128,
.a_off = 12, .n_a = 13,
.b_off = 64, .n_b = 8,
- .c_off = 96, .n_c = 8,
- .max_gen = 7 },
+ .c_off = 96, .n_c = 8, },
[I915_OA_FORMAT_A45_B8_C8] = { /* HSW only */
"A45_B8_C8", .size = 256,
.a_off = 12, .n_a = 45,
.b_off = 192, .n_b = 8,
- .c_off = 224, .n_c = 8,
- .max_gen = 7 },
+ .c_off = 224, .n_c = 8, },
[I915_OA_FORMAT_B4_C8] = { /* HSW only */
"B4_C8", .size = 64,
.b_off = 16, .n_b = 4,
- .c_off = 32, .n_c = 8,
- .max_gen = 7 },
+ .c_off = 32, .n_c = 8, },
[I915_OA_FORMAT_B4_C8_A16] = { /* HSW only */
"B4_C8_A16", .size = 128,
.b_off = 16, .n_b = 4,
.c_off = 32, .n_c = 8,
- .a_off = 60, .n_a = 16, .first_a = 29,
- .max_gen = 7 },
+ .a_off = 60, .n_a = 16, .first_a = 29, },
[I915_OA_FORMAT_C4_B8] = { /* HSW+ (header differs from HSW-Gen8+) */
"C4_B8", .size = 64,
.c_off = 16, .n_c = 4,
.b_off = 28, .n_b = 8 },
+};
- /* Gen8+ */
-
+static struct oa_format gen8_oa_formats[local_I915_OA_FORMAT_MAX] = {
[local_I915_OA_FORMAT_A12] = {
"A12", .size = 64,
- .a_off = 12, .n_a = 12, .first_a = 7,
- .min_gen = 8 },
+ .a_off = 12, .n_a = 12, .first_a = 7, },
[local_I915_OA_FORMAT_A12_B8_C8] = {
"A12_B8_C8", .size = 128,
.a_off = 12, .n_a = 12,
.b_off = 64, .n_b = 8,
- .c_off = 96, .n_c = 8, .first_a = 7,
- .min_gen = 8 },
+ .c_off = 96, .n_c = 8, .first_a = 7, },
[local_I915_OA_FORMAT_A32u40_A4u32_B8_C8] = {
"A32u40_A4u32_B8_C8", .size = 256,
.a40_high_off = 160, .a40_low_off = 16, .n_a40 = 32,
.a_off = 144, .n_a = 4, .first_a = 32,
.b_off = 192, .n_b = 8,
- .c_off = 224, .n_c = 8,
- .min_gen = 8 },
+ .c_off = 224, .n_c = 8, },
[I915_OA_FORMAT_C4_B8] = {
"C4_B8", .size = 64,
.c_off = 16, .n_c = 4,
- .b_off = 32, .n_b = 8,
- .min_gen = 8 },
+ .b_off = 32, .n_b = 8, },
};
static bool hsw_undefined_a_counters[45] = {
@@ -308,6 +298,14 @@ static uint32_t (*read_report_ticks)(uint32_t *report,
static void (*sanity_check_reports)(uint32_t *oa_report0, uint32_t *oa_report1,
enum drm_i915_oa_format format);
+static struct oa_format
+get_oa_format(enum drm_i915_oa_format format)
+{
+ if (IS_HASWELL(devid))
+ return hsw_oa_formats[format];
+ return gen8_oa_formats[format];
+}
+
static bool
timestamp_delta_within(uint32_t delta,
uint32_t expected_delta,
@@ -371,7 +369,7 @@ static int
lookup_format(int i915_perf_fmt_id)
{
igt_assert(i915_perf_fmt_id < local_I915_OA_FORMAT_MAX);
- igt_assert(oa_formats[i915_perf_fmt_id].name);
+ igt_assert(get_oa_format(i915_perf_fmt_id).name);
return i915_perf_fmt_id;
}
@@ -497,9 +495,9 @@ read_debugfs_u64_record(int fd, const char *file, const char *key)
static uint32_t
hsw_read_report_ticks(uint32_t *report, enum drm_i915_oa_format format)
{
- uint32_t *c = (uint32_t *)(((uint8_t *)report) + oa_formats[format].c_off);
+ uint32_t *c = (uint32_t *)(((uint8_t *)report) + get_oa_format(format).c_off);
- igt_assert_neq(oa_formats[format].n_c, 0);
+ igt_assert_neq(get_oa_format(format).n_c, 0);
return c[2];
}
@@ -760,6 +758,7 @@ hsw_sanity_check_render_basic_reports(uint32_t *oa_report0, uint32_t *oa_report1
uint32_t time_delta = timebase_scale(oa_report1[1] - oa_report0[1]);
uint32_t clock_delta;
uint32_t max_delta;
+ struct oa_format format = get_oa_format(fmt);
igt_assert_neq(time_delta, 0);
@@ -767,7 +766,7 @@ hsw_sanity_check_render_basic_reports(uint32_t *oa_report0, uint32_t *oa_report1
* can't explicitly derive a clock delta for all OA report
* formats...
*/
- if (oa_formats[fmt].n_c == 0) {
+ if (format.n_c == 0) {
/* Assume running at max freq for sake of
* below sanity check on counters... */
clock_delta = (gt_max_freq_mhz *
@@ -797,14 +796,14 @@ hsw_sanity_check_render_basic_reports(uint32_t *oa_report0, uint32_t *oa_report1
max_delta = clock_delta * n_eus;
/* 40bit A counters were only introduced for Gen8+ */
- igt_assert_eq(oa_formats[fmt].n_a40, 0);
+ igt_assert_eq(format.n_a40, 0);
- for (int j = 0; j < oa_formats[fmt].n_a; j++) {
+ for (int j = 0; j < format.n_a; j++) {
uint32_t *a0 = (uint32_t *)(((uint8_t *)oa_report0) +
- oa_formats[fmt].a_off);
+ format.a_off);
uint32_t *a1 = (uint32_t *)(((uint8_t *)oa_report1) +
- oa_formats[fmt].a_off);
- int a_id = oa_formats[fmt].first_a + j;
+ format.a_off);
+ int a_id = format.first_a + j;
uint32_t delta = a1[j] - a0[j];
if (undefined_a_counters[a_id])
@@ -814,22 +813,22 @@ hsw_sanity_check_render_basic_reports(uint32_t *oa_report0, uint32_t *oa_report1
igt_assert(delta <= max_delta);
}
- for (int j = 0; j < oa_formats[fmt].n_b; j++) {
+ for (int j = 0; j < format.n_b; j++) {
uint32_t *b0 = (uint32_t *)(((uint8_t *)oa_report0) +
- oa_formats[fmt].b_off);
+ format.b_off);
uint32_t *b1 = (uint32_t *)(((uint8_t *)oa_report1) +
- oa_formats[fmt].b_off);
+ format.b_off);
uint32_t delta = b1[j] - b0[j];
igt_debug("B%d: delta = %"PRIu32"\n", j, delta);
igt_assert(delta <= max_delta);
}
- for (int j = 0; j < oa_formats[fmt].n_c; j++) {
+ for (int j = 0; j < format.n_c; j++) {
uint32_t *c0 = (uint32_t *)(((uint8_t *)oa_report0) +
- oa_formats[fmt].c_off);
+ format.c_off);
uint32_t *c1 = (uint32_t *)(((uint8_t *)oa_report1) +
- oa_formats[fmt].c_off);
+ format.c_off);
uint32_t delta = c1[j] - c0[j];
igt_debug("C%d: delta = %"PRIu32"\n", j, delta);
@@ -840,9 +839,10 @@ hsw_sanity_check_render_basic_reports(uint32_t *oa_report0, uint32_t *oa_report1
static uint64_t
gen8_read_40bit_a_counter(uint32_t *report, enum drm_i915_oa_format fmt, int a_id)
{
- uint8_t *a40_high = (((uint8_t *)report) + oa_formats[fmt].a40_high_off);
+ struct oa_format format = get_oa_format(fmt);
+ uint8_t *a40_high = (((uint8_t *)report) + format.a40_high_off);
uint32_t *a40_low = (uint32_t *)(((uint8_t *)report) +
- oa_formats[fmt].a40_low_off);
+ format.a40_low_off);
uint64_t high = (uint64_t)(a40_high[a_id]) << 32;
return a40_low[a_id] | high;
@@ -887,7 +887,7 @@ accumulate_reports(struct accumulator *accumulator,
uint32_t *start,
uint32_t *end)
{
- enum drm_i915_oa_format format = accumulator->format;
+ struct oa_format format = get_oa_format(accumulator->format);
uint64_t *deltas = accumulator->deltas;
int idx = 0;
@@ -902,21 +902,23 @@ accumulate_reports(struct accumulator *accumulator,
accumulate_uint32(4, start, end, deltas + idx++);
}
- for (int i = 0; i < oa_formats[format].n_a40; i++)
- accumulate_uint40(i, start, end, format, deltas + idx++);
+ for (int i = 0; i < format.n_a40; i++) {
+ accumulate_uint40(i, start, end, accumulator->format,
+ deltas + idx++);
+ }
- for (int i = 0; i < oa_formats[format].n_a; i++) {
- accumulate_uint32(oa_formats[format].a_off + 4 * i,
+ for (int i = 0; i < format.n_a; i++) {
+ accumulate_uint32(format.a_off + 4 * i,
start, end, deltas + idx++);
}
- for (int i = 0; i < oa_formats[format].n_b; i++) {
- accumulate_uint32(oa_formats[format].b_off + 4 * i,
+ for (int i = 0; i < format.n_b; i++) {
+ accumulate_uint32(format.b_off + 4 * i,
start, end, deltas + idx++);
}
- for (int i = 0; i < oa_formats[format].n_c; i++) {
- accumulate_uint32(oa_formats[format].c_off + 4 * i,
+ for (int i = 0; i < format.n_c; i++) {
+ accumulate_uint32(format.c_off + 4 * i,
start, end, deltas + idx++);
}
}
@@ -924,7 +926,7 @@ accumulate_reports(struct accumulator *accumulator,
static void
accumulator_print(struct accumulator *accumulator, const char *title)
{
- enum drm_i915_oa_format format = accumulator->format;
+ struct oa_format format = get_oa_format(accumulator->format);
uint64_t *deltas = accumulator->deltas;
int idx = 0;
@@ -933,21 +935,21 @@ accumulator_print(struct accumulator *accumulator, const char *title)
igt_debug("\ttime delta = %lu\n", deltas[idx++]);
igt_debug("\tclock cycle delta = %lu\n", deltas[idx++]);
- for (int i = 0; i < oa_formats[format].n_a40; i++)
+ for (int i = 0; i < format.n_a40; i++)
igt_debug("\tA%u = %lu\n", i, deltas[idx++]);
} else {
igt_debug("\ttime delta = %lu\n", deltas[idx++]);
}
- for (int i = 0; i < oa_formats[format].n_a; i++) {
- int a_id = oa_formats[format].first_a + i;
+ for (int i = 0; i < format.n_a; i++) {
+ int a_id = format.first_a + i;
igt_debug("\tA%u = %lu\n", a_id, deltas[idx++]);
}
- for (int i = 0; i < oa_formats[format].n_a; i++)
+ for (int i = 0; i < format.n_a; i++)
igt_debug("\tB%u = %lu\n", i, deltas[idx++]);
- for (int i = 0; i < oa_formats[format].n_c; i++)
+ for (int i = 0; i < format.n_c; i++)
igt_debug("\tC%u = %lu\n", i, deltas[idx++]);
}
@@ -956,6 +958,7 @@ static void
gen8_sanity_check_test_oa_reports(uint32_t *oa_report0, uint32_t *oa_report1,
enum drm_i915_oa_format fmt)
{
+ struct oa_format format = get_oa_format(fmt);
uint32_t time_delta = timebase_scale(oa_report1[1] - oa_report0[1]);
uint32_t ticks0 = read_report_ticks(oa_report0, fmt);
uint32_t ticks1 = read_report_ticks(oa_report1, fmt);
@@ -963,9 +966,9 @@ gen8_sanity_check_test_oa_reports(uint32_t *oa_report0, uint32_t *oa_report1,
uint32_t max_delta;
uint64_t freq;
uint32_t *rpt0_b = (uint32_t *)(((uint8_t *)oa_report0) +
- oa_formats[fmt].b_off);
+ format.b_off);
uint32_t *rpt1_b = (uint32_t *)(((uint8_t *)oa_report1) +
- oa_formats[fmt].b_off);
+ format.b_off);
uint32_t b;
uint32_t ref;
@@ -983,7 +986,7 @@ gen8_sanity_check_test_oa_reports(uint32_t *oa_report0, uint32_t *oa_report1,
max_delta = clock_delta * n_eus;
/* Gen8+ has some 40bit A counters... */
- for (int j = 0; j < oa_formats[fmt].n_a40; j++) {
+ for (int j = 0; j < format.n_a40; j++) {
uint64_t value0 = gen8_read_40bit_a_counter(oa_report0, fmt, j);
uint64_t value1 = gen8_read_40bit_a_counter(oa_report1, fmt, j);
uint64_t delta = gen8_40bit_a_delta(value0, value1);
@@ -995,12 +998,12 @@ gen8_sanity_check_test_oa_reports(uint32_t *oa_report0, uint32_t *oa_report1,
igt_assert(delta <= max_delta);
}
- for (int j = 0; j < oa_formats[fmt].n_a; j++) {
+ for (int j = 0; j < format.n_a; j++) {
uint32_t *a0 = (uint32_t *)(((uint8_t *)oa_report0) +
- oa_formats[fmt].a_off);
+ format.a_off);
uint32_t *a1 = (uint32_t *)(((uint8_t *)oa_report1) +
- oa_formats[fmt].a_off);
- int a_id = oa_formats[fmt].first_a + j;
+ format.a_off);
+ int a_id = format.first_a + j;
uint32_t delta = a1[j] - a0[j];
if (undefined_a_counters[a_id])
@@ -1013,7 +1016,7 @@ gen8_sanity_check_test_oa_reports(uint32_t *oa_report0, uint32_t *oa_report1,
/* The TestOa metric set defines all B counters to be a
* multiple of the gpu clock
*/
- if (oa_formats[fmt].n_b) {
+ if (format.n_b) {
b = rpt1_b[0] - rpt0_b[0];
igt_debug("B0: delta = %"PRIu32"\n", b);
igt_assert_eq(b, 0);
@@ -1052,11 +1055,11 @@ gen8_sanity_check_test_oa_reports(uint32_t *oa_report0, uint32_t *oa_report1,
igt_assert(b >= ref - 1 && b <= ref + 1);
}
- for (int j = 0; j < oa_formats[fmt].n_c; j++) {
+ for (int j = 0; j < format.n_c; j++) {
uint32_t *c0 = (uint32_t *)(((uint8_t *)oa_report0) +
- oa_formats[fmt].c_off);
+ format.c_off);
uint32_t *c1 = (uint32_t *)(((uint8_t *)oa_report1) +
- oa_formats[fmt].c_off);
+ format.c_off);
uint32_t delta = c1[j] - c0[j];
igt_debug("C%d: delta = %"PRIu32"\n", j, delta);
@@ -1186,7 +1189,7 @@ i915_read_reports_until_timestamp(enum drm_i915_oa_format oa_format,
uint32_t start_timestamp,
uint32_t end_timestamp)
{
- size_t format_size = oa_formats[oa_format].size;
+ size_t format_size = get_oa_format(oa_format).size;
uint32_t last_seen_timestamp = start_timestamp;
int total_len = 0;
@@ -1411,7 +1414,7 @@ read_2_oa_reports(int format_id,
uint32_t *oa_report1,
bool timer_only)
{
- size_t format_size = oa_formats[format_id].size;
+ size_t format_size = get_oa_format(format_id).size;
size_t sample_size = (sizeof(struct drm_i915_perf_record_header) +
format_size);
const struct drm_i915_perf_record_header *header;
@@ -1551,10 +1554,12 @@ open_and_read_2_oa_reports(int format_id,
static void
print_reports(uint32_t *oa_report0, uint32_t *oa_report1, int fmt)
{
+ struct oa_format format = get_oa_format(fmt);
+
igt_debug("TIMESTAMP: 1st = %"PRIu32", 2nd = %"PRIu32", delta = %"PRIu32"\n",
oa_report0[1], oa_report1[1], oa_report1[1] - oa_report0[1]);
- if (IS_HASWELL(devid) && oa_formats[fmt].n_c == 0) {
+ if (IS_HASWELL(devid) && format.n_c == 0) {
igt_debug("CLOCK = N/A\n");
} else {
uint32_t clock0 = read_report_ticks(oa_report0, fmt);
@@ -1588,7 +1593,7 @@ print_reports(uint32_t *oa_report0, uint32_t *oa_report1, int fmt)
}
/* Gen8+ has some 40bit A counters... */
- for (int j = 0; j < oa_formats[fmt].n_a40; j++) {
+ for (int j = 0; j < format.n_a40; j++) {
uint64_t value0 = gen8_read_40bit_a_counter(oa_report0, fmt, j);
uint64_t value1 = gen8_read_40bit_a_counter(oa_report1, fmt, j);
uint64_t delta = gen8_40bit_a_delta(value0, value1);
@@ -1600,12 +1605,12 @@ print_reports(uint32_t *oa_report0, uint32_t *oa_report1, int fmt)
j, value0, value1, delta);
}
- for (int j = 0; j < oa_formats[fmt].n_a; j++) {
+ for (int j = 0; j < format.n_a; j++) {
uint32_t *a0 = (uint32_t *)(((uint8_t *)oa_report0) +
- oa_formats[fmt].a_off);
+ format.a_off);
uint32_t *a1 = (uint32_t *)(((uint8_t *)oa_report1) +
- oa_formats[fmt].a_off);
- int a_id = oa_formats[fmt].first_a + j;
+ format.a_off);
+ int a_id = format.first_a + j;
uint32_t delta = a1[j] - a0[j];
if (undefined_a_counters[a_id])
@@ -1615,22 +1620,22 @@ print_reports(uint32_t *oa_report0, uint32_t *oa_report1, int fmt)
a_id, a0[j], a1[j], delta);
}
- for (int j = 0; j < oa_formats[fmt].n_b; j++) {
+ for (int j = 0; j < format.n_b; j++) {
uint32_t *b0 = (uint32_t *)(((uint8_t *)oa_report0) +
- oa_formats[fmt].b_off);
+ format.b_off);
uint32_t *b1 = (uint32_t *)(((uint8_t *)oa_report1) +
- oa_formats[fmt].b_off);
+ format.b_off);
uint32_t delta = b1[j] - b0[j];
igt_debug("B%d: 1st = %"PRIu32", 2nd = %"PRIu32", delta = %"PRIu32"\n",
j, b0[j], b1[j], delta);
}
- for (int j = 0; j < oa_formats[fmt].n_c; j++) {
+ for (int j = 0; j < format.n_c; j++) {
uint32_t *c0 = (uint32_t *)(((uint8_t *)oa_report0) +
- oa_formats[fmt].c_off);
+ format.c_off);
uint32_t *c1 = (uint32_t *)(((uint8_t *)oa_report1) +
- oa_formats[fmt].c_off);
+ format.c_off);
uint32_t delta = c1[j] - c0[j];
igt_debug("C%d: 1st = %"PRIu32", 2nd = %"PRIu32", delta = %"PRIu32"\n",
@@ -1643,9 +1648,11 @@ print_reports(uint32_t *oa_report0, uint32_t *oa_report1, int fmt)
static void
print_report(uint32_t *report, int fmt)
{
+ struct oa_format format = get_oa_format(fmt);
+
igt_debug("TIMESTAMP: %"PRIu32"\n", report[1]);
- if (IS_HASWELL(devid) && oa_formats[fmt].n_c == 0) {
+ if (IS_HASWELL(devid) && format.n_c == 0) {
igt_debug("CLOCK = N/A\n");
} else {
uint32_t clock = read_report_ticks(report, fmt);
@@ -1666,7 +1673,7 @@ print_report(uint32_t *report, int fmt)
}
/* Gen8+ has some 40bit A counters... */
- for (int j = 0; j < oa_formats[fmt].n_a40; j++) {
+ for (int j = 0; j < format.n_a40; j++) {
uint64_t value = gen8_read_40bit_a_counter(report, fmt, j);
if (undefined_a_counters[j])
@@ -1675,10 +1682,10 @@ print_report(uint32_t *report, int fmt)
igt_debug("A%d: %"PRIu64"\n", j, value);
}
- for (int j = 0; j < oa_formats[fmt].n_a; j++) {
+ for (int j = 0; j < format.n_a; j++) {
uint32_t *a = (uint32_t *)(((uint8_t *)report) +
- oa_formats[fmt].a_off);
- int a_id = oa_formats[fmt].first_a + j;
+ format.a_off);
+ int a_id = format.first_a + j;
if (undefined_a_counters[a_id])
continue;
@@ -1686,16 +1693,16 @@ print_report(uint32_t *report, int fmt)
igt_debug("A%d: %"PRIu32"\n", a_id, a[j]);
}
- for (int j = 0; j < oa_formats[fmt].n_b; j++) {
+ for (int j = 0; j < format.n_b; j++) {
uint32_t *b = (uint32_t *)(((uint8_t *)report) +
- oa_formats[fmt].b_off);
+ format.b_off);
igt_debug("B%d: %"PRIu32"\n", j, b[j]);
}
- for (int j = 0; j < oa_formats[fmt].n_c; j++) {
+ for (int j = 0; j < format.n_c; j++) {
uint32_t *c = (uint32_t *)(((uint8_t *)report) +
- oa_formats[fmt].c_off);
+ format.c_off);
igt_debug("C%d: %"PRIu32"\n", j, c[j]);
}
@@ -1705,28 +1712,15 @@ print_report(uint32_t *report, int fmt)
static void
test_oa_formats(void)
{
- for (int i = 0; i < ARRAY_SIZE(oa_formats); i++) {
+ for (int i = 0; i < I915_OA_FORMAT_MAX; i++) {
+ struct oa_format format = get_oa_format(i);
uint32_t oa_report0[64];
uint32_t oa_report1[64];
- if (!oa_formats[i].name) /* sparse, indexed by ID */
- continue;
-
- if (oa_formats[i].min_gen &&
- intel_gen(devid) < oa_formats[i].min_gen) {
- igt_debug("skipping unsupported OA format %s\n",
- oa_formats[i].name);
+ if (!format.name) /* sparse, indexed by ID */
continue;
- }
-
- if (oa_formats[i].max_gen &&
- intel_gen(devid) > oa_formats[i].max_gen) {
- igt_debug("skipping unsupported OA format %s\n",
- oa_formats[i].name);
- continue;
- }
- igt_debug("Checking OA format %s\n", oa_formats[i].name);
+ igt_debug("Checking OA format %s\n", format.name);
open_and_read_2_oa_reports(i,
oa_exp_1_millisec,
@@ -2761,7 +2755,7 @@ test_buffer_fill(void)
uint8_t *buf = malloc(buf_size);
int len;
size_t oa_buf_size = 16 * 1024 * 1024;
- size_t report_size = oa_formats[test_oa_format].size;
+ size_t report_size = get_oa_format(test_oa_format).size;
int n_full_oa_reports = oa_buf_size / report_size;
uint64_t fill_duration = n_full_oa_reports * oa_period;
@@ -2930,7 +2924,7 @@ test_enable_disable(void)
int buf_size = 65536 * (256 + sizeof(struct drm_i915_perf_record_header));
uint8_t *buf = malloc(buf_size);
size_t oa_buf_size = 16 * 1024 * 1024;
- size_t report_size = oa_formats[test_oa_format].size;
+ size_t report_size = get_oa_format(test_oa_format).size;
int n_full_oa_reports = oa_buf_size / report_size;
uint64_t fill_duration = n_full_oa_reports * oa_period;
@@ -3621,7 +3615,7 @@ gen8_test_single_ctx_render_target_writes_a_counter(void)
.num_properties = ARRAY_SIZE(properties) / 2,
.properties_ptr = to_user_pointer(properties),
};
- size_t format_size = oa_formats[test_oa_format].size;
+ size_t format_size = get_oa_format(test_oa_format).size;
size_t sample_size = (sizeof(struct drm_i915_perf_record_header) +
format_size);
int max_reports = (16 * 1024 * 1024) / format_size;
commit 23a578df1df1891b943cd5c3f8c6080b5215e8d7
Author: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Date: Thu Aug 31 11:32:28 2017 +0100
tests/perf: add support for Coffeelake
Using the same timestamp frequency as Skylake/Kabylake.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
diff --git a/tests/perf.c b/tests/perf.c
index a8b000e..2adce76 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -1145,6 +1145,16 @@ init_sys_info(void)
} else if (IS_GEMINILAKE(devid)) {
test_set_uuid = "dd3fd789-e783-4204-8cd0-b671bbccb0cf";
timestamp_frequency = 19200000;
+ } else if (IS_COFFEELAKE(devid)) {
+ switch (intel_gt(devid)) {
+ case 1:
+ test_set_uuid = "74fb4902-d3d3-4237-9e90-cbdc68d0a446";
+ break;
+ default:
+ igt_debug("unsupported Cannonlake GT size\n");
+ return false;
+ }
+ timestamp_frequency = 12000000;
} else {
igt_debug("unsupported GT\n");
return false;
commit f1514a6320f65a1524f36407f7f22d6fc7c7679e
Author: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Date: Thu Nov 3 17:27:28 2016 +0000
tests/perf: prevent power management to kick in when necessary
Some of our tests measure that the OA unit produces reports at
expected time intervals (as configured through the PERF_OPEN
ioctl). It turns out the power management plays a role in the decision
of the OA unit to write reports to memory. Under normal circumstances
we don't really mind if the unit misses one report here or there, but
for our tests it makes pretty difficult to verify whether we've made a
mistake in the configuration.
To work around this, let's prevent power management to kick in by
holding /dev/cpu_dma_latency opened for the following tests :
- enable-disable
- blocking
- polling
- buffer-fill
- oa-exponents
Many thanks to Chris Wilson for suggesting this!
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
diff --git a/tests/perf.c b/tests/perf.c
index 36e6f23..a8b000e 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -288,6 +288,7 @@ static bool hsw_undefined_a_counters[45] = {
static bool gen8_undefined_a_counters[45];
static int drm_fd = -1;
+static int pm_fd = -1;
static int stream_fd = -1;
static uint32_t devid;
static int card = -1;
@@ -331,21 +332,38 @@ __perf_close(int fd)
{
close(fd);
stream_fd = -1;
+
+ if (pm_fd >= 0) {
+ close(pm_fd);
+ pm_fd = -1;
+ }
}
static int
-__perf_open(int fd, struct drm_i915_perf_open_param *param)
+__perf_open(int fd, struct drm_i915_perf_open_param *param, bool prevent_pm)
{
int ret;
+ int32_t pm_value = 0;
if (stream_fd >= 0)
__perf_close(stream_fd);
+ if (pm_fd >= 0) {
+ close(pm_fd);
+ pm_fd = -1;
+ }
ret = igt_ioctl(fd, DRM_IOCTL_I915_PERF_OPEN, param);
igt_assert(ret >= 0);
errno = 0;
+ if (prevent_pm) {
+ pm_fd = open("/dev/cpu_dma_latency", O_RDWR);
+ igt_assert(pm_fd >= 0);
+
+ igt_assert_eq(write(pm_fd, &pm_value, sizeof(pm_value)), sizeof(pm_value));
+ }
+
return ret;
}
@@ -1257,7 +1275,7 @@ test_system_wide_paranoid(void)
igt_drop_root();
- stream_fd = __perf_open(drm_fd, ¶m);
+ stream_fd = __perf_open(drm_fd, ¶m, false);
__perf_close(stream_fd);
}
@@ -1314,7 +1332,7 @@ test_invalid_oa_metric_set_id(void)
/* Check that we aren't just seeing false positives... */
properties[ARRAY_SIZE(properties) - 1] = test_metric_set_id;
- stream_fd = __perf_open(drm_fd, ¶m);
+ stream_fd = __perf_open(drm_fd, ¶m, false);
__perf_close(stream_fd);
/* There's no valid default OA metric set ID... */
@@ -1348,7 +1366,7 @@ test_invalid_oa_format_id(void)
/* Check that we aren't just seeing false positives... */
properties[ARRAY_SIZE(properties) - 1] = test_oa_format;
- stream_fd = __perf_open(drm_fd, ¶m);
+ stream_fd = __perf_open(drm_fd, ¶m, false);
__perf_close(stream_fd);
/* There's no valid default OA format... */
@@ -1512,7 +1530,7 @@ open_and_read_2_oa_reports(int format_id,
.properties_ptr = to_user_pointer(properties),
};
- stream_fd = __perf_open(drm_fd, ¶m);
+ stream_fd = __perf_open(drm_fd, ¶m, false);
read_2_oa_reports(format_id, exponent,
oa_report0, oa_report1, timer_only);
@@ -1916,7 +1934,7 @@ test_oa_exponents(void)
oa_exponent_to_ns(exponent) / 1000.0,
oa_exponent_to_ns(exponent) / (1000.0 * 1000.0));
- stream_fd = __perf_open(drm_fd, ¶m);
+ stream_fd = __perf_open(drm_fd, ¶m, true /* prevent_pm */);
/* Right after opening the OA stream, read a
* first timestamp as way to filter previously
@@ -2192,7 +2210,7 @@ test_invalid_oa_exponent(void)
.properties_ptr = to_user_pointer(properties),
};
- stream_fd = __perf_open(drm_fd, ¶m);
+ stream_fd = __perf_open(drm_fd, ¶m, false);
__perf_close(stream_fd);
@@ -2246,7 +2264,7 @@ test_low_oa_exponent_permissions(void)
igt_fork(child, 1) {
igt_drop_root();
- stream_fd = __perf_open(drm_fd, ¶m);
+ stream_fd = __perf_open(drm_fd, ¶m, false);
__perf_close(stream_fd);
}
@@ -2312,7 +2330,7 @@ test_per_context_mode_unprivileged(void)
properties[1] = ctx_id;
- stream_fd = __perf_open(drm_fd, ¶m);
+ stream_fd = __perf_open(drm_fd, ¶m, false);
__perf_close(stream_fd);
drm_intel_gem_context_destroy(context);
@@ -2401,7 +2419,7 @@ test_blocking(void)
int64_t start, end;
int n = 0;
- stream_fd = __perf_open(drm_fd, ¶m);
+ stream_fd = __perf_open(drm_fd, ¶m, true /* prevent_pm */);
times(&start_times);
@@ -2565,7 +2583,7 @@ test_polling(void)
int64_t start, end;
int n = 0;
- stream_fd = __perf_open(drm_fd, ¶m);
+ stream_fd = __perf_open(drm_fd, ¶m, true /* prevent_pm */);
times(&start_times);
@@ -2742,7 +2760,7 @@ test_buffer_fill(void)
igt_assert(fill_duration < 1000000000);
- stream_fd = __perf_open(drm_fd, ¶m);
+ stream_fd = __perf_open(drm_fd, ¶m, true /* prevent_pm */);
for (int i = 0; i < 5; i++) {
bool overflow_seen;
@@ -2909,7 +2927,7 @@ test_enable_disable(void)
load_helper_init();
load_helper_run(HIGH);
- stream_fd = __perf_open(drm_fd, ¶m);
+ stream_fd = __perf_open(drm_fd, ¶m, true /* prevent_pm */);
for (int i = 0; i < 5; i++) {
int len;
@@ -3073,7 +3091,7 @@ test_short_reads(void)
ret = mprotect(pages + page_size, page_size, PROT_NONE);
igt_assert_eq(ret, 0);
- stream_fd = __perf_open(drm_fd, ¶m);
+ stream_fd = __perf_open(drm_fd, ¶m, false);
nanosleep(&(struct timespec){ .tv_sec = 0, .tv_nsec = 5000000 }, NULL);
@@ -3146,7 +3164,7 @@ test_non_sampling_read_error(void)
int ret;
uint8_t buf[1024];
- stream_fd = __perf_open(drm_fd, ¶m);
+ stream_fd = __perf_open(drm_fd, ¶m, false);
ret = read(stream_fd, buf, sizeof(buf));
igt_assert_eq(ret, -1);
@@ -3184,7 +3202,7 @@ test_disabled_read_error(void)
uint32_t buf[128] = { 0 };
int ret;
- stream_fd = __perf_open(drm_fd, ¶m);
+ stream_fd = __perf_open(drm_fd, ¶m, false);
ret = read(stream_fd, buf, sizeof(buf));
igt_assert_eq(ret, -1);
@@ -3194,7 +3212,7 @@ test_disabled_read_error(void)
param.flags &= ~I915_PERF_FLAG_DISABLED;
- stream_fd = __perf_open(drm_fd, ¶m);
+ stream_fd = __perf_open(drm_fd, ¶m, false);
read_2_oa_reports(test_oa_format,
oa_exponent,
@@ -3246,7 +3264,7 @@ test_mi_rpc(void)
uint32_t *report32;
int ret;
- stream_fd = __perf_open(drm_fd, ¶m);
+ stream_fd = __perf_open(drm_fd, ¶m, false);
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
@@ -3432,7 +3450,7 @@ hsw_test_single_ctx_counters(void)
scratch_buf_memset(dst[0].bo, width, height, 0x00ff00ff);
igt_debug("opening i915-perf stream\n");
- stream_fd = __perf_open(drm_fd, ¶m);
+ stream_fd = __perf_open(drm_fd, ¶m, false);
bo = drm_intel_bo_alloc(bufmgr, "mi_rpc dest bo", 4096, 64);
@@ -3684,7 +3702,7 @@ gen8_test_single_ctx_render_target_writes_a_counter(void)
scratch_buf_memset(dst[0].bo, width, height, 0x00ff00ff);
igt_debug("opening i915-perf stream\n");
- stream_fd = __perf_open(drm_fd, ¶m);
+ stream_fd = __perf_open(drm_fd, ¶m, false);
bo = drm_intel_bo_alloc(bufmgr, "mi_rpc dest bo", 4096, 64);
@@ -4031,7 +4049,7 @@ test_rc6_disable(void)
igt_skip_on(!rc6_enabled());
- stream_fd = __perf_open(drm_fd, ¶m);
+ stream_fd = __perf_open(drm_fd, ¶m, false);
n_events_start = read_debugfs_u64_record(drm_fd, "i915_drpc_info",
"RC6 residency since boot");
@@ -4246,7 +4264,7 @@ test_create_destroy_userspace_config(void)
/* Try to use the new config */
properties[1] = config_id;
- stream_fd = __perf_open(drm_fd, ¶m);
+ stream_fd = __perf_open(drm_fd, ¶m, false);
/* Verify that destroying the config doesn't yield any error. */
i915_perf_remove_config(drm_fd, config_id);
@@ -4453,7 +4471,7 @@ test_i915_ref_count(void)
igt_debug("initial ref count with drm_fd open = %u\n", ref_count0);
igt_assert(ref_count0 > baseline);
- stream_fd = __perf_open(drm_fd, ¶m);
+ stream_fd = __perf_open(drm_fd, ¶m, false);
ref_count1 = read_i915_module_ref();
igt_debug("ref count after opening i915 perf stream = %u\n", ref_count1);
igt_assert(ref_count1 > ref_count0);
commit eafaf4fb49ba7a02c11def787b5de2a14de532f2
Author: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Date: Wed Aug 23 16:17:04 2017 +0100
tests/perf: estimate number of blocking/polling based on time spent
Blocking & polling tests define an amount of time to spend in the test
and then estimate the number of syscalls that should successfully
return. The problem is that while running the test we might spend
slightly more time than initiallly planned. This change estimates the
number of syscalls based on time spent after the fact.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
diff --git a/tests/perf.c b/tests/perf.c
index c8537f0..36e6f23 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -2372,7 +2372,8 @@ test_blocking(void)
DRM_I915_PERF_PROP_OA_EXPONENT, oa_exponent,
};
struct drm_i915_perf_open_param param = {
- .flags = I915_PERF_FLAG_FD_CLOEXEC,
Reply to: