mesa: Changes to 'refs/tags/mesa-12.0.0-rc3'
Tag 'mesa-12.0.0-rc3' created by Emil Velikov <emil.l.velikov@gmail.com> at 2016-06-15 10:39 +0000
Mesa 12.0.0-rc3 release candidate
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Changes since mesa-12.0.0-rc2:
Anuj Phogat (3):
blorp: Fix 16x multisample scaled blits
mesa: Fix region overlap conditions for rectangles with a shared edge
gallium: Fix region overlap conditions for rectangles with a shared edge
Bas Nieuwenhuizen (1):
radeonsi: Reinitialize all descriptors in CE preamble.
Chuck Atkins (1):
swr: Add missing headers for package inclusion
Daniel Czarnowski (1):
glx: fix crash with bad fbconfig
Dave Airlie (10):
mesa/copyimage: fix num samples check to handle renderbuffers.
mesa/copyimage: report INVALID_VALUE for missing cube face
mesa/get: return correct value for layer provoking vertex.
glsl: handle ast_aggregate in has_sequence_subexpression. (v2)
glsl/ast: don't crash when func_name is NULL
glsl: for anonymous struct matching use without_array() (v3)
i965: don't use NumLayers for 3D textures.
glsl: geom shader max_vertices layout must match.
mesa/program_resource: return -1 for index if no location.
i965/gen8: fix cull distance emission for tessellation shaders.
Dylan Baker (1):
isl: Replace bash generator with python generator
Emil Velikov (7):
anv: add the X related and Wayland CFLAGS to VULKAN_ENTRYPOINT_CPPFLAGS
automake: get in-tree `make distclean' working again.
configure.ac: strip out the llvm-config -march/mtune flags
automake: add SWR to `make distcheck' gallium drivers
swr: automake: add missing -I flag
cherry-ignore: drop the "i965 bring back INTEL_PRECISE_TRIG"
Update version to 12.0.0-rc3
Eric Engestrom (1):
st/osmesa: remove double-write (overwriting)
Francisco Jerez (8):
i965/fs: Skip SIMD lowering destination zipping if possible.
i965/fs: Reindent emit_zip().
i965/vec4: Fix cmod propagation not to propagate non-identity cmod into CMP(N).
Revert "i965/fs: Allow scalar source regions on SNB math instructions."
i965: Fix scratch overallocation if the original slot size was already a power of two.
i965: Keep track of the per-thread scratch allocation in brw_stage_state.
i965: Fix cross-primitive scratch corruption when changing the per-thread allocation.
i965/fs: Fix regs_written for SIMD-lowered instructions some more.
Ilia Mirkin (13):
nvc0: mark bound buffer range valid
nvc0: fix memory barrier flag handling
nvc0: reduce overhead from always marking buffers dirty
nvc0: reduce overhead from always marking images dirty
nv50,nvc0: fix BGR10_A2UI vertex format
gk104/ir: fix conditions for adding a texbar
st/mesa: revalidate image atoms when a texture is updated
st/mesa: use buffer usage history to set dirty flags for revalidation
GL: update glext to svn 32957
GL: update glcorearb.h to svn 32433
mesa: add drawbuffer argument to ClearNamedFramebufferfi
nvc0/ir: limit max number of regs based on availability in SM
nv50/ir: record number of threads in a compute shader
Jason Ekstrand (27):
anv/clear: Handle ClearImage on 3-D images
nir/lower_indirect_derefs: Use the direct array deref for recursion
anv/pipeline: Refactor specialization constant handling a bit
nir/spirv: Use breaks instead of returns in constant handling
nir/spirv: Handle the WorkgroupSize builtin decoration
genxml/gen6,7,75: s/BackFace/Backface
anv/pipeline: Unify gen7/8 emit_ds_state
anv/pipeline: Silently pass tests if depth or stencil is missing
i965/fs Add a wm_prog_data bit for has_side_effects
anv/pipeline: Add support for early depth stencil
nir/spirv: Complete the list of capabilities
nir/spirv: Add string lookup tables for a couple of SPIR-V enums
nir/spirv: Add a way to print non-fatal warnings
nir/spirv: Make unhandled decorations and capabilities non-fatal
nir/spirv: Make a decoration switch complete
anv/copy: Account for the anv_surface.offset when creating a blit2d_surf
anv/blit: Use CLAMP_TO_EDGE for scaled blits
i965: Emit surface states for extra planes prior to gen8
anv/descriptor_set: Set array_size to zero for non-existant descriptors
anv/descriptor_set: Add a type field in debug builds
anv/descriptor_set: Ensure that bindings are always in increasing order
anv/pipeline: Store the (set, binding, index) tripple in the bind map
anv/pipeline_cache: Allow for an zero-sized cache
anv: Remove the PhysicalDeviceLimits FINISHME
anv/entrypoints: Emit #if guards for all platforms
anv/entrypoints: Use the function pointer types provided by vulkan.h
anv/entrypoints: Rework #if guards
Jimmy Berry (1):
st/va: hardlink driver instances to gallium_drv_video.so
Kenneth Graunke (12):
i965: Fix shared local memory size for Gen9+.
i965: Set subslice_total on Gen7/7.5 platforms.
i965: Allocate scratch space for the maximum number of compute threads.
i965: Account for poor address calculations in Haswell CS scratch size.
i965: Fix Haswell CS per-thread scratch space encoding.
i965: Fix CS scratch size calculations on Ivybridge and Baytrail.
i965: Assert that the scratch spaces are in range.
i965: Use the correct number of threads for compute shaders.
i965: Don't leak scratch BOs for TCS/TES.
i965: Fix encode_slm_size() to take a generation, not a device info.
i965: Fix issues with number of VS URB entries on Cherryview/Broxton.
i965: Defeat the register stride checker in URB reads.
Leo Liu (2):
vl/dri3: get Makefile properly
vl/dri3: support receiving new pixmap for front buffer
Marc-André Lureau (1):
virgl: fix checking fences
Marek Olšák (2):
r600g: write WAIT_UNTIL in the correct place
gallium/radeon: don't allocate DCC for non-renderable texture formats
Nanley Chery (3):
mesa/extensions: Fix ES1 extension reporting
anv: Document and rename anv_pipeline_init_dynamic_state()
anv/pipeline: Don't dereference NULL dynamic state pointers
Nicolai Hähnle (5):
radeonsi: set descriptor dirty mask on shader buffer unbind
tgsi/scan: add uses_derivatives (v2)
st/mesa: directly compute level=0 texture size in st_finalize_texture
st/mesa: use base level size as "guess" when available
radeonsi: mark buffer texture range valid for shader images
Samuel Iglesias Gonsálvez (4):
i965/fs: fix FS_OPCODE_CINTERP for unpacked double input varyings
i965/fs: fix offset when loading double vector input varyings
i965/gs/scalar: Fix load input for doubles
i965: Defeat the register stride checker in pull uniform messages.
Samuel Pitoiset (5):
nvc0: mark buffer texture range valid for shader images
nvc0: re-validate images after launching a grid on Fermi
nvc0: do not clear surfaces bins in the validate function
nv50/ir: use round toward 0 when converting doubles to integers
nvc0/ir: clamp the UBO index for compute on Kepler
Timothy Arceri (1):
glsl: make sure UBO arrays are sized in ES
Tomasz Figa (1):
i965: Check return value of screen->image.loader->getBuffers (v2)
Vedran Miletić (1):
clover: Update OpenCL version string to match OpenGL
---
Makefile.am | 2
VERSION | 2
bin/.cherry-ignore | 2
configure.ac | 3
include/GL/glcorearb.h | 108 +++--
include/GL/glext.h | 87 +++-
src/Makefile.am | 2
src/compiler/Makefile.sources | 2
src/compiler/glsl/ast.h | 3
src/compiler/glsl/ast_function.cpp | 4
src/compiler/glsl/ast_to_hir.cpp | 16
src/compiler/glsl/ast_type.cpp | 17
src/compiler/glsl/glsl_parser_extras.cpp | 2
src/compiler/glsl/link_varyings.cpp | 23 -
src/compiler/nir/nir_lower_indirect_derefs.c | 2
src/compiler/spirv/spirv_info.c | 150 +++++++
src/compiler/spirv/spirv_info.h | 27 +
src/compiler/spirv/spirv_to_nir.c | 123 +++++
src/compiler/spirv/vtn_private.h | 3
src/compiler/spirv/vtn_variables.c | 16
src/gallium/auxiliary/Makefile.am | 7
src/gallium/auxiliary/Makefile.sources | 4
src/gallium/auxiliary/tgsi/tgsi_scan.c | 30 +
src/gallium/auxiliary/tgsi/tgsi_scan.h | 1
src/gallium/auxiliary/util/u_blit.c | 8
src/gallium/auxiliary/vl/vl_winsys_dri3.c | 11
src/gallium/drivers/nouveau/codegen/nv50_ir.cpp | 1
src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h | 1
src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 7
src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 22 -
src/gallium/drivers/nouveau/codegen/nv50_ir_target.h | 5
src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp | 2
src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp | 4
src/gallium/drivers/nouveau/nv50/nv50_formats.c | 2
src/gallium/drivers/nouveau/nvc0/nvc0_compute.c | 7
src/gallium/drivers/nouveau/nvc0/nvc0_context.c | 25 -
src/gallium/drivers/nouveau/nvc0/nvc0_context.h | 1
src/gallium/drivers/nouveau/nvc0/nvc0_state.c | 71 ++-
src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c | 3
src/gallium/drivers/nouveau/nvc0/nvc0_tex.c | 31 +
src/gallium/drivers/nouveau/nvc0/nve4_compute.c | 8
src/gallium/drivers/r600/r600_hw_context.c | 19
src/gallium/drivers/radeon/r600_texture.c | 5
src/gallium/drivers/radeon/radeon_winsys.h | 1
src/gallium/drivers/radeonsi/si_descriptors.c | 40 +
src/gallium/drivers/radeonsi/si_hw_context.c | 3
src/gallium/drivers/radeonsi/si_state.h | 1
src/gallium/drivers/swr/Makefile.am | 1
src/gallium/drivers/swr/Makefile.sources | 10
src/gallium/state_trackers/clover/Makefile.am | 1
src/gallium/state_trackers/clover/api/device.cpp | 4
src/gallium/state_trackers/clover/api/platform.cpp | 4
src/gallium/state_trackers/osmesa/osmesa.c | 1
src/gallium/targets/va/Makefile.am | 14
src/gallium/winsys/amdgpu/drm/amdgpu_surface.c | 1
src/gallium/winsys/virgl/drm/virgl_drm_winsys.c | 2
src/gallium/winsys/virgl/vtest/virgl_vtest_winsys.c | 2
src/glx/glxcmds.c | 23 +
src/intel/genxml/gen6.xml | 4
src/intel/genxml/gen7.xml | 4
src/intel/genxml/gen75.xml | 4
src/intel/isl/Android.mk | 6
src/intel/isl/Makefile.am | 12
src/intel/isl/gen_format_layout.py | 207 ++++++++++
src/intel/isl/isl_format_layout_gen.bash | 129 ------
src/intel/vulkan/Makefile.am | 2
src/intel/vulkan/anv_cmd_buffer.c | 11
src/intel/vulkan/anv_descriptor_set.c | 19
src/intel/vulkan/anv_device.c | 2
src/intel/vulkan/anv_entrypoints_gen.py | 48 +-
src/intel/vulkan/anv_meta_blit.c | 3
src/intel/vulkan/anv_meta_clear.c | 6
src/intel/vulkan/anv_meta_copy.c | 34 -
src/intel/vulkan/anv_nir_apply_pipeline_layout.c | 7
src/intel/vulkan/anv_pipeline.c | 104 +++--
src/intel/vulkan/anv_pipeline_cache.c | 5
src/intel/vulkan/anv_private.h | 16
src/intel/vulkan/gen7_cmd_buffer.c | 12
src/intel/vulkan/gen7_pipeline.c | 49 --
src/intel/vulkan/gen8_cmd_buffer.c | 10
src/intel/vulkan/gen8_pipeline.c | 67 ---
src/intel/vulkan/genX_pipeline_util.h | 87 ++++
src/mapi/glapi/gen/ARB_direct_state_access.xml | 1
src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 17
src/mesa/drivers/dri/i965/brw_compiler.h | 34 +
src/mesa/drivers/dri/i965/brw_context.c | 19
src/mesa/drivers/dri/i965/brw_context.h | 25 +
src/mesa/drivers/dri/i965/brw_cs.c | 27 +
src/mesa/drivers/dri/i965/brw_eu_emit.c | 6
src/mesa/drivers/dri/i965/brw_fs.cpp | 132 +++++-
src/mesa/drivers/dri/i965/brw_fs_builder.h | 10
src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp | 5
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 4
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 108 ++++-
src/mesa/drivers/dri/i965/brw_gs.c | 8
src/mesa/drivers/dri/i965/brw_program.c | 22 +
src/mesa/drivers/dri/i965/brw_tcs.c | 8
src/mesa/drivers/dri/i965/brw_tes.c | 8
src/mesa/drivers/dri/i965/brw_vec4_cmod_propagation.cpp | 12
src/mesa/drivers/dri/i965/brw_vs.c | 8
src/mesa/drivers/dri/i965/brw_vs_state.c | 2
src/mesa/drivers/dri/i965/brw_wm.c | 7
src/mesa/drivers/dri/i965/brw_wm_state.c | 2
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 9
src/mesa/drivers/dri/i965/gen6_gs_state.c | 2
src/mesa/drivers/dri/i965/gen6_vs_state.c | 2
src/mesa/drivers/dri/i965/gen6_wm_state.c | 2
src/mesa/drivers/dri/i965/gen7_blorp.c | 5
src/mesa/drivers/dri/i965/gen7_cs_state.c | 38 +
src/mesa/drivers/dri/i965/gen7_ds_state.c | 2
src/mesa/drivers/dri/i965/gen7_gs_state.c | 2
src/mesa/drivers/dri/i965/gen7_hs_state.c | 2
src/mesa/drivers/dri/i965/gen7_urb.c | 2
src/mesa/drivers/dri/i965/gen7_vs_state.c | 2
src/mesa/drivers/dri/i965/gen7_wm_state.c | 2
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 9
src/mesa/drivers/dri/i965/gen8_ds_state.c | 10
src/mesa/drivers/dri/i965/gen8_gs_state.c | 2
src/mesa/drivers/dri/i965/gen8_hs_state.c | 2
src/mesa/drivers/dri/i965/gen8_ps_state.c | 2
src/mesa/drivers/dri/i965/gen8_vs_state.c | 2
src/mesa/drivers/dri/i965/intel_fbo.c | 2
src/mesa/drivers/dri/i965/intel_screen.c | 5
src/mesa/main/blit.c | 8
src/mesa/main/clear.c | 4
src/mesa/main/clear.h | 2
src/mesa/main/copyimage.c | 13
src/mesa/main/extensions_table.h | 4
src/mesa/main/get_hash_params.py | 2
src/mesa/main/shader_query.cpp | 19
src/mesa/state_tracker/st_atom_image.c | 12
src/mesa/state_tracker/st_cb_bufferobjects.c | 15
src/mesa/state_tracker/st_cb_eglimage.c | 3
src/mesa/state_tracker/st_cb_texture.c | 119 +++--
src/mesa/state_tracker/st_manager.c | 3
src/mesa/state_tracker/st_texture.h | 6
src/mesa/state_tracker/st_vdpau.c | 3
137 files changed, 1917 insertions(+), 690 deletions(-)
---
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