mesa: Changes to 'refs/tags/mesa-12.0.0'
Tag 'mesa-12.0.0' created by Emil Velikov <emil.l.velikov@gmail.com> at 2016-07-08 14:06 +0000
mesa-12.0.0
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Changes since 12.0-branchpoint:
Akihiko Odaki (1):
mesa: don't install GLX files if GLX is not built
Alex Deucher (1):
radeonsi: fix the raster config setup for 1 RB iceland chips
Anuj Phogat (3):
blorp: Fix 16x multisample scaled blits
mesa: Fix region overlap conditions for rectangles with a shared edge
gallium: Fix region overlap conditions for rectangles with a shared edge
Ardinartsev Nikita (1):
i965: Avoid division by zero.
Bas Nieuwenhuizen (1):
radeonsi: Reinitialize all descriptors in CE preamble.
Christian König (1):
radeon/uvd: fix the H264 level for Tonga v2
Chuck Atkins (3):
swr: Add missing headers for package inclusion
swr: Refactor checks for compiler feature flags
gallium: Force blend color to 16-byte alignment
Daniel Czarnowski (1):
glx: fix crash with bad fbconfig
Dave Airlie (20):
glsl/images: bounds check image unit assignment
mesa/bufferobj: use mapping range in BufferSubData.
glsl/linker: fix multiple streams transform feedback.
i965/xfb: skip components in correct buffer.
glsl: define some GLES3 constants in GLSL 4.1
mesa/sampler: fix error codes for sampler parameters.
glsl/distance: make sure we use clip dist varying slot for lowered var.
mesa/copyimage: fix num samples check to handle renderbuffers.
mesa/copyimage: report INVALID_VALUE for missing cube face
mesa/get: return correct value for layer provoking vertex.
glsl: handle ast_aggregate in has_sequence_subexpression. (v2)
glsl/ast: don't crash when func_name is NULL
glsl: for anonymous struct matching use without_array() (v3)
i965: don't use NumLayers for 3D textures.
glsl: geom shader max_vertices layout must match.
mesa/program_resource: return -1 for index if no location.
i965/gen8: fix cull distance emission for tessellation shaders.
virgl: reduce some limits for now
st/glsl_to_tgsi: don't increase immediate index by 1.
Revert "st/glsl_to_tgsi: don't increase immediate index by 1."
Dylan Baker (8):
genxml: mark gen_pack_header.py as encoded in utf-8
genxml: Make classes descendants of object
genxml: mark re strings as raw
genxml: require future imports for python2 compatibility.
genxml: use the isalpha method rather than str.isalpha.
genxml: change chbang to python 2
Don't use python 3
isl: Replace bash generator with python generator
Emil Velikov (29):
nir: add the SConscript.nir to the tarball
docs: rename release notes to 12.0.0
Update version to 12.0.0-rc1
automake: bring back the .PHONY git_sha1.h.tmp rule
isl: automake: don't include isl_format_layout.c in two lists.
anv: let anv_entrypoints_gen.py generate proper Wayland/Xcb guards
egl: android: don't add the image loader extension for !render_node
mesa: automake: add directory prefix for git_sha1.h
mesa: automake: ensure that git_sha1.h.tmp has the right attributes
mesa: automake: distclean git_sha1.h when building OOT
Update version to 12.0.0-rc2
anv: add the X related and Wayland CFLAGS to VULKAN_ENTRYPOINT_CPPFLAGS
automake: get in-tree `make distclean' working again.
configure.ac: strip out the llvm-config -march/mtune flags
automake: add SWR to `make distcheck' gallium drivers
swr: automake: add missing -I flag
cherry-ignore: drop the "i965 bring back INTEL_PRECISE_TRIG"
Update version to 12.0.0-rc3
Update version to 12.0.0-rc4
Revert "swr: Refactor checks for compiler feature flags"
clover: conditionally use MESA_GIT_SHA1
anv: use cache uuid based on the build timestamp.
automake: don't mandate git_sha1.h/MESA_GIT_SHA1
swr: automake: don't ship LLVM version specific generated sources
anv: install the intel_icd.json to ${datarootdir} by default
anv: vulkan: remove the anv_device.$(OBJEXT) rule
bugzilla_mesa.sh: Drop "Bug " from sed command
Update version to 12.0.0(final)
docs: Update 12.0.0 release notes
Eric Engestrom (1):
st/osmesa: remove double-write (overwriting)
Francisco Jerez (17):
i965/fs: Teach regions_overlap() about COMPR4 MRF regions.
i965/fs: Simplify and improve accuracy of compute_to_mrf() by using regions_overlap().
i965/fs: Fix compute-to-mrf VGRF region coverage condition.
i965/fs: Refactor compute_to_mrf() to split search and rewrite into separate loops.
i965/fs: Teach compute_to_mrf() about the COMPR4 address transformation.
i965/fs: Fix compute_to_mrf() to coalesce VGRFs initialized by multiple single-GRF writes.
i965/fs: Extend remove_duplicate_mrf_writes() to handle non-VGRF to MRF copies.
i965/fs: Fix constant combining for instructions that cannot accept source mods.
i965/fs: Allow scalar source regions on SNB math instructions.
i965/fs: Skip SIMD lowering destination zipping if possible.
i965/fs: Reindent emit_zip().
i965/vec4: Fix cmod propagation not to propagate non-identity cmod into CMP(N).
Revert "i965/fs: Allow scalar source regions on SNB math instructions."
i965: Fix scratch overallocation if the original slot size was already a power of two.
i965: Keep track of the per-thread scratch allocation in brw_stage_state.
i965: Fix cross-primitive scratch corruption when changing the per-thread allocation.
i965/fs: Fix regs_written for SIMD-lowered instructions some more.
Iago Toral Quiroga (1):
i965/fs: Fix single-precision to double-precision conversions for CHV/BSW/BXT
Ian Romanick (6):
mesa: Fix bogus strncmp
i965: If control_data_header_size_bits is zero, don't do EndPrimitive
glsl: Use Geom.VerticesOut == -1 to specify unset
glsl: Always strip arrayness in precision_qualifier_allowed
mesa: If validation fails in a debug context just emit a debug message
mapi: Export all GLES 3.1 functions in libGLESv2.so
Ilia Mirkin (23):
nvc0/ir: fix spilling predicates to registers
nv50/ir: fix error finding free element in bitset in some situations
nir: allow sat on all float destination types
nvc0: mark bound buffer range valid
nvc0: fix memory barrier flag handling
nvc0: reduce overhead from always marking buffers dirty
nvc0: reduce overhead from always marking images dirty
nv50,nvc0: fix BGR10_A2UI vertex format
gk104/ir: fix conditions for adding a texbar
st/mesa: revalidate image atoms when a texture is updated
st/mesa: use buffer usage history to set dirty flags for revalidation
GL: update glext to svn 32957
GL: update glcorearb.h to svn 32433
mesa: add drawbuffer argument to ClearNamedFramebufferfi
nvc0/ir: limit max number of regs based on availability in SM
nv50/ir: record number of threads in a compute shader
gk104/ir: fix tex use generation to be more careful about eliding uses
nvc0: don't make use of push hint if there are no non-const user vbos
translate: fix start_instance parameter in sse version
nv50,nvc0: fix start_instance in manual push path
glsl: only match gl_FragData and not gl_SecondaryFragDataEXT
nvc0: when mapping directly, provide accurate xfer info + start
glsl: don't try to lower non-gl builtins as if they were gl_FragData
Jason Ekstrand (74):
i965/fs: Copy the offset when lowering logical pull constant sends
anv/clear: Handle ClearImage on 3-D images
nir/lower_indirect_derefs: Use the direct array deref for recursion
anv/pipeline: Refactor specialization constant handling a bit
nir/spirv: Use breaks instead of returns in constant handling
nir/spirv: Handle the WorkgroupSize builtin decoration
genxml/gen6,7,75: s/BackFace/Backface
anv/pipeline: Unify gen7/8 emit_ds_state
anv/pipeline: Silently pass tests if depth or stencil is missing
i965/fs Add a wm_prog_data bit for has_side_effects
anv/pipeline: Add support for early depth stencil
nir/spirv: Complete the list of capabilities
nir/spirv: Add string lookup tables for a couple of SPIR-V enums
nir/spirv: Add a way to print non-fatal warnings
nir/spirv: Make unhandled decorations and capabilities non-fatal
nir/spirv: Make a decoration switch complete
anv/copy: Account for the anv_surface.offset when creating a blit2d_surf
anv/blit: Use CLAMP_TO_EDGE for scaled blits
i965: Emit surface states for extra planes prior to gen8
anv/descriptor_set: Set array_size to zero for non-existant descriptors
anv/descriptor_set: Add a type field in debug builds
anv/descriptor_set: Ensure that bindings are always in increasing order
anv/pipeline: Store the (set, binding, index) tripple in the bind map
anv/pipeline_cache: Allow for an zero-sized cache
anv: Remove the PhysicalDeviceLimits FINISHME
anv/entrypoints: Emit #if guards for all platforms
anv/entrypoints: Use the function pointer types provided by vulkan.h
anv/entrypoints: Rework #if guards
nir/algebraic: Remove imprecise flog2 optimizations
nir: Add a pass for propagating invariant decorations
nir/alu_to_scalar: Respect the exact ALU operation qualifier
anv/pipeline: Do invariance propagation on SPIR-V shaders
anv/cmd_buffer: Don't crash if push constants are provided for missing stages
anv/cmd_buffer: Set depth/stencil extent based on the image
anv/cmd_buffer: Split emit_viewport in two
anv: Add proper support for depth clamping
spirv: Use the system value version of gl_FrontFace
anv/cmd: Move flush_descriptor_sets to anv_cmd_buffer.c
anv/cmd: Move emit_descriptor_pointers to genX_cmd_buffer.c
anv/cmd: Dirty descriptor sets when a new pipeline is bound
i965/gen4: Pull texture formats from the texture object not the miptree
i965/gen4-6: Handle gl_texture_object::BaseLevel and MinLayer correctly
i965: Drop the maximum 3D texture size to 512 on Sandy Bridge
i965/blorp/gen8: Use the correct max level and layer in emit_surface_states
i965/gen8: Use the qpitch from the aux_mt for AUX_QPITCH
i965/fs: Use a default Y coordinate of 0 for TXF on gen9+
i965/gen4: Subtract 1 from buffer sizes
genxml/gen8,9: Prefix the multisample format enum with MSFMT
isl/state: Don't use designated initializers for the surface state
isl/state: Remove some unused fields
isl/state: Put surface format setup at the top
isl/state: Put all dimension setup together and towards the top
isl/state: Put pitch calculations together
isl/state: Return an extent3d from the halign/valign helper
isl/state: Refactor the per-gen isl_to_gen_h/valign tables
isl/state: Refactor the setup of clear colors
isl/state: Don't force-disable L2 bypass for everything
isl/state: Set SurfaceArray based on the surface dimension
isl/state: Don't set RenderTargetViewExtent for texture surfaces
isl/format: Mark R9G9B9E5 as containing 9-bit unsigned float channels
isl/state: Set the IntegerSurfaceFormat bit on Haswell
isl/state: Use the layout for computing qpitch rather than dimensions
isl/state: Only set cube face enables if usage includes CUBE_BIT
isl/state: Emit no-op mip tail setup on SKL
isl/state: Use TILEWALK_XMAJOR for linear surfaces on gen7
isl/state: Don't set SurfacePitch for gen9 1-D textures
isl/state: Add assertions for buffer surface restrictions
isl/state: Don't use designated initializers for buffer surface state
isl/state: Allow for full 31-bit buffer texture sizes
anv,isl: Lower storage image formats in anv
genxml: Put append counter fields before MCS in RENDER_SURFACE_STATE on gen7
anv: Add an allocator for scratch buffers
genxml: Make ScratchSpaceBasePointer an address instead of an offset
anv: Use different BOs for different scratch sizes and stages
Jimmy Berry (1):
st/va: hardlink driver instances to gallium_drv_video.so
Jordan Justen (15):
glsl: Add glsl LowerCsDerivedVariables option
nir: Make lowering gl_LocalInvocationIndex optional
i965: Add nir channel_num system value
i965: Add uniform for a CS thread local base ID
i965: Put CS local thread ID uniform in last push register
i965: Add nir based intrinsic lowering and thread ID uniform
i965: Store number of threads in brw_cs_prog_data
i965: Add CS push constant info to brw_cs_prog_data
i965: Support new local ID push constant & cross-thread constants
anv: Support new local ID generation & cross-thread constants
i965: Enable cross-thread constants and compact local IDs for hsw+
i965: Remove old CS local ID handling
i965: Preserve the internal format of the dri image
i965: Skip update_texture_surface when the plane doesn't exist
i965: Use miptree to decide format on multi-plane images for gen < 7
Jose Fonseca (1):
include: Require MSVC 2013 Update 4.
Kenneth Graunke (32):
i965: Fix the passthrough TCS for isolines.
i965: Fix isoline reads in scalar TES.
i965: Fix shared local memory size for Gen9+.
i965: Set subslice_total on Gen7/7.5 platforms.
i965: Allocate scratch space for the maximum number of compute threads.
i965: Account for poor address calculations in Haswell CS scratch size.
i965: Fix Haswell CS per-thread scratch space encoding.
i965: Fix CS scratch size calculations on Ivybridge and Baytrail.
i965: Assert that the scratch spaces are in range.
i965: Use the correct number of threads for compute shaders.
i965: Don't leak scratch BOs for TCS/TES.
i965: Fix encode_slm_size() to take a generation, not a device info.
i965: Fix issues with number of VS URB entries on Cherryview/Broxton.
i965: Defeat the register stride checker in URB reads.
mesa: Pass gl_constant_value union into _mesa_fetch_state().
glsl: Optionally lower TES gl_PatchVerticesIn to a uniform.
i965: Use a uniform for gl_PatchVerticesIn in the TES.
glsl: Optionally lower TCS gl_PatchVerticesIn to a uniform.
i965: Use a uniform for gl_PatchVerticesIn in the TCS on Gen8+.
i965: Fix multiplication of immediates on Cherryview/Broxton.
i965: Reorganize prog_data->total_scratch code a bit.
glsl: Make constant propagation's folder not propagate into an LHS.
glsl: Split arrays even in the presence of whole-array copies.
glsl: Propagate invariant/precise after lowering const arrays.
i965: Copy propagate before doing variable index lowering.
glsl: Make lower_const_arrays_to_uniforms work directly on constants.
glsl: Don't constant propagate arrays.
i965: Combine 3DSTATE_STREAMOUT emitters and genX_sol_state atoms.
i965: Implement rasterizer discard via SOL unless required for queries.
i965: Set fs_inst::base_mrf = -1 by default.
glsl: Ignore ir_texture in lower_const_arrays_to_uniforms.
i965: Make emit_urb_writes() not produce an EOT message for GS.
Leo Liu (2):
vl/dri3: get Makefile properly
vl/dri3: support receiving new pixmap for front buffer
Lionel Landwerlin (1):
anv/wsi: create swapchain images using specified image usage
Marc-André Lureau (1):
virgl: fix checking fences
Marek Olšák (6):
mesa: fix crash in driver_RenderTexture_is_safe
r600g: write WAIT_UNTIL in the correct place
gallium/radeon: don't allocate DCC for non-renderable texture formats
radeonsi: fix a compute shader hang with big threadgroups on SI & CI
radeonsi: fix fractional odd tessellation spacing for Polaris
radeonsi: set PA_SU_SMALL_PRIM_FILTER_CNTL register on Polaris
Mathias Fröhlich (1):
osmesa: Export OSMesaCreateContextAttribs.
Mauro Rossi (2):
android: libmesa_glsl: add a dependency on libmesa_nir static
isl: add support for Android libmesa_isl static library
Nanley Chery (3):
mesa/extensions: Fix ES1 extension reporting
anv: Document and rename anv_pipeline_init_dynamic_state()
anv/pipeline: Don't dereference NULL dynamic state pointers
Neha Bhende (1):
svga: Fix failures caused in fedora 24
Nicolai Hähnle (15):
radeonsi: set descriptor dirty mask on shader buffer unbind
tgsi/scan: add uses_derivatives (v2)
st/mesa: directly compute level=0 texture size in st_finalize_texture
st/mesa: use base level size as "guess" when available
radeonsi: mark buffer texture range valid for shader images
mesa/main: fix integer overflows in _mesa_image_offset
radeonsi: raise SI_PM4_MAX_DW
radeonsi: fix calculation of valid RB mask per SE
st/mesa: flush bitmap cache before compute dispatch
st/mesa: flush bitmap cache before texture functions
st/mesa: flush bitmap cache before CopyImageSubData
radeonsi: use DRAW_(INDEX_)INDIRECT_MULTI on Polaris
radeonsi: drop the DRAW_PREAMBLE packet on Polaris
st/mesa: an incomplete texture may have a zero-size first image
st/mesa: check the texture image level in st_texture_match_image
Rob Clark (3):
freedreno: fix crash on smaller gpus and higher resolutions
i965: don't drop const initializers in vector splitting
glsl: add driconf to zero-init unintialized vars
Roland Scheidegger (1):
gallivm: don't use integer min/max sse intrinsics with llvm >= 3.9
Samuel Iglesias Gonsálvez (5):
i965/fs: fix FS_OPCODE_CINTERP for unpacked double input varyings
i965/fs: fix offset when loading double vector input varyings
i965/gs/scalar: Fix load input for doubles
i965: Defeat the register stride checker in pull uniform messages.
i965/fs: indirect addressing with doubles is not supported in CHV/BSW/BXT
Samuel Pitoiset (12):
nvc0: mark buffer texture range valid for shader images
nvc0: re-validate images after launching a grid on Fermi
nvc0: do not clear surfaces bins in the validate function
nv50/ir: use round toward 0 when converting doubles to integers
nvc0/ir: clamp the UBO index for compute on Kepler
gm107/ir: make use of IMUL32I for all immediates
gm107/ir: make use of MOV32I for all immediates
gm107/ir: make use of LOP32I for all immediates
gm107/ir: add missing setcond flags for LOP variants
gm107/ir: make sure that flagsDef is set when emitting setcond
gm107/ir: fix sign bit emission for FADD32I
nvc0/ir: reset the base offset for indirect images accesses
Tim Rowley (1):
swr: push/pop DEBUG macro around llvm includes
Timothy Arceri (2):
Revert "glsl: fix xfb_offset unsized array validation"
glsl: make sure UBO arrays are sized in ES
Tomasz Figa (1):
i965: Check return value of screen->image.loader->getBuffers (v2)
Topi Pohjolainen (2):
i965/gen9: Configure rbc buffers as plain for non-rbc tex views
i965: Add norbc debug option
Vedran Miletić (1):
clover: Update OpenCL version string to match OpenGL
sonjiang (3):
radeon: uvd add uvd fw version for amdgpu
radeon/uvd: separate uvd context buffer from DPB
radeon/uvd: fix a h265 context size bug
---
Android.mk | 2
Makefile.am | 2
VERSION | 2
bin/.cherry-ignore | 2
bin/bugzilla_mesa.sh | 2
configure.ac | 16
docs/envvars.html | 1
docs/relnotes/11.3.0.html | 89 -
docs/relnotes/12.0.0.html | 334 ++++++
include/GL/glcorearb.h | 108 +-
include/GL/glext.h | 87 +
include/c99_compat.h | 4
src/Makefile.am | 21
src/compiler/Android.glsl.mk | 5
src/compiler/Makefile.nir.am | 3
src/compiler/Makefile.sources | 3
src/compiler/glsl/ast.h | 3
src/compiler/glsl/ast_function.cpp | 4
src/compiler/glsl/ast_to_hir.cpp | 64 -
src/compiler/glsl/ast_type.cpp | 17
src/compiler/glsl/builtin_variables.cpp | 44
src/compiler/glsl/glsl_parser_extras.cpp | 7
src/compiler/glsl/glsl_parser_extras.h | 1
src/compiler/glsl/ir.cpp | 23
src/compiler/glsl/ir.h | 6
src/compiler/glsl/link_uniform_initializers.cpp | 2
src/compiler/glsl/link_varyings.cpp | 78 +
src/compiler/glsl/linker.cpp | 29
src/compiler/glsl/lower_const_arrays_to_uniforms.cpp | 18
src/compiler/glsl/lower_distance.cpp | 1
src/compiler/glsl/opt_array_splitting.cpp | 55 +
src/compiler/glsl/opt_constant_propagation.cpp | 4
src/compiler/glsl/opt_dead_builtin_varyings.cpp | 10
src/compiler/nir/nir.c | 4
src/compiler/nir/nir.h | 4
src/compiler/nir/nir_gather_info.c | 1
src/compiler/nir/nir_intrinsics.h | 2
src/compiler/nir/nir_lower_alu_to_scalar.c | 2
src/compiler/nir/nir_lower_indirect_derefs.c | 2
src/compiler/nir/nir_lower_system_values.c | 16
src/compiler/nir/nir_opt_algebraic.py | 2
src/compiler/nir/nir_propagate_invariant.c | 196 +++
src/compiler/nir/nir_validate.c | 4
src/compiler/spirv/spirv_info.c | 150 ++
src/compiler/spirv/spirv_info.h | 27
src/compiler/spirv/spirv_to_nir.c | 123 ++
src/compiler/spirv/vtn_private.h | 3
src/compiler/spirv/vtn_variables.c | 20
src/egl/drivers/dri2/platform_android.c | 15
src/gallium/auxiliary/Makefile.am | 7
src/gallium/auxiliary/Makefile.sources | 4
src/gallium/auxiliary/gallivm/lp_bld_arit.c | 6
src/gallium/auxiliary/tgsi/tgsi_scan.c | 30
src/gallium/auxiliary/tgsi/tgsi_scan.h | 1
src/gallium/auxiliary/translate/translate_sse.c | 14
src/gallium/auxiliary/util/u_blit.c | 8
src/gallium/auxiliary/vl/vl_winsys_dri3.c | 11
src/gallium/drivers/freedreno/freedreno_context.h | 2
src/gallium/drivers/nouveau/codegen/nv50_ir.cpp | 1
src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h | 1
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 20
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 4
src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 7
src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 62 -
src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h | 5
src/gallium/drivers/nouveau/codegen/nv50_ir_target.h | 5
src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp | 2
src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp | 4
src/gallium/drivers/nouveau/codegen/nv50_ir_util.cpp | 6
src/gallium/drivers/nouveau/nv50/nv50_formats.c | 2
src/gallium/drivers/nouveau/nv50/nv50_push.c | 16
src/gallium/drivers/nouveau/nvc0/nvc0_compute.c | 7
src/gallium/drivers/nouveau/nvc0/nvc0_context.c | 25
src/gallium/drivers/nouveau/nvc0/nvc0_context.h | 1
src/gallium/drivers/nouveau/nvc0/nvc0_state.c | 71 +
src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c | 3
src/gallium/drivers/nouveau/nvc0/nvc0_tex.c | 31
src/gallium/drivers/nouveau/nvc0/nvc0_transfer.c | 17
src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c | 4
src/gallium/drivers/nouveau/nvc0/nvc0_vbo_translate.c | 16
src/gallium/drivers/nouveau/nvc0/nve4_compute.c | 8
src/gallium/drivers/r600/r600_hw_context.c | 19
src/gallium/drivers/radeon/r600_cs.h | 22
src/gallium/drivers/radeon/r600_texture.c | 5
src/gallium/drivers/radeon/radeon_uvd.c | 109 +-
src/gallium/drivers/radeon/radeon_video.c | 2
src/gallium/drivers/radeon/radeon_winsys.h | 2
src/gallium/drivers/radeonsi/si_compute.c | 18
src/gallium/drivers/radeonsi/si_descriptors.c | 40
src/gallium/drivers/radeonsi/si_hw_context.c | 4
src/gallium/drivers/radeonsi/si_pipe.h | 1
src/gallium/drivers/radeonsi/si_pm4.h | 2
src/gallium/drivers/radeonsi/si_state.c | 26
src/gallium/drivers/radeonsi/si_state.h | 1
src/gallium/drivers/radeonsi/si_state_draw.c | 72 +
src/gallium/drivers/radeonsi/sid.h | 6
src/gallium/drivers/svga/svga_pipe_query.c | 16
src/gallium/drivers/svga/svga_screen.c | 2
src/gallium/drivers/svga/svga_winsys.h | 3
src/gallium/drivers/swr/Makefile.am | 46
src/gallium/drivers/swr/Makefile.sources | 10
src/gallium/drivers/swr/swr_shader.cpp | 10
src/gallium/drivers/swr/swr_state.cpp | 7
src/gallium/drivers/virgl/virgl_screen.c | 7
src/gallium/include/pipe/p_state.h | 12
src/gallium/include/state_tracker/st_api.h | 1
src/gallium/state_trackers/clover/Makefile.am | 1
src/gallium/state_trackers/clover/api/device.cpp | 7
src/gallium/state_trackers/clover/api/platform.cpp | 7
src/gallium/state_trackers/dri/dri_screen.c | 2
src/gallium/state_trackers/osmesa/osmesa.c | 1
src/gallium/targets/osmesa/osmesa.def | 1
src/gallium/targets/osmesa/osmesa.mingw.def | 1
src/gallium/targets/osmesa/osmesa.sym | 1
src/gallium/targets/va/Makefile.am | 14
src/gallium/winsys/amdgpu/drm/amdgpu_surface.c | 1
src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c | 11
src/gallium/winsys/svga/drm/vmw_screen_ioctl.c | 11
src/gallium/winsys/virgl/drm/virgl_drm_winsys.c | 2
src/gallium/winsys/virgl/vtest/virgl_vtest_winsys.c | 2
src/glx/glxcmds.c | 23
src/intel/genxml/Android.mk | 82 +
src/intel/genxml/Makefile.am | 4
src/intel/genxml/gen6.xml | 12
src/intel/genxml/gen7.xml | 20
src/intel/genxml/gen75.xml | 20
src/intel/genxml/gen8.xml | 17
src/intel/genxml/gen9.xml | 17
src/intel/genxml/gen_pack_header.py | 20
src/intel/isl/Android.mk | 155 ++
src/intel/isl/Makefile.am | 14
src/intel/isl/Makefile.sources | 1
src/intel/isl/gen_format_layout.py | 207 +++
src/intel/isl/isl_format_layout.csv | 2
src/intel/isl/isl_format_layout_gen.bash | 129 --
src/intel/isl/isl_surface_state.c | 394 +++----
src/intel/vulkan/Makefile.am | 8
src/intel/vulkan/Makefile.sources | 3
src/intel/vulkan/anv_allocator.c | 76 +
src/intel/vulkan/anv_cmd_buffer.c | 113 +-
src/intel/vulkan/anv_descriptor_set.c | 19
src/intel/vulkan/anv_device.c | 12
src/intel/vulkan/anv_entrypoints_gen.py | 44
src/intel/vulkan/anv_image.c | 3
src/intel/vulkan/anv_meta_blit.c | 3
src/intel/vulkan/anv_meta_clear.c | 7
src/intel/vulkan/anv_meta_copy.c | 34
src/intel/vulkan/anv_nir_apply_pipeline_layout.c | 7
src/intel/vulkan/anv_pipeline.c | 133 +-
src/intel/vulkan/anv_pipeline_cache.c | 5
src/intel/vulkan/anv_private.h | 42
src/intel/vulkan/anv_wsi_wayland.c | 10
src/intel/vulkan/anv_wsi_x11.c | 3
src/intel/vulkan/gen7_cmd_buffer.c | 118 --
src/intel/vulkan/gen7_pipeline.c | 74 -
src/intel/vulkan/gen8_cmd_buffer.c | 64 -
src/intel/vulkan/gen8_pipeline.c | 94 -
src/intel/vulkan/genX_cmd_buffer.c | 86 +
src/intel/vulkan/genX_pipeline.c | 22
src/intel/vulkan/genX_pipeline_util.h | 87 +
src/mapi/glapi/gen/ARB_direct_state_access.xml | 1
src/mapi/glapi/gen/static_data.py | 51
src/mesa/Makefile.am | 4
src/mesa/drivers/dri/common/drirc | 4
src/mesa/drivers/dri/common/xmlpool/t_options.h | 5
src/mesa/drivers/dri/i965/Android.mk | 3
src/mesa/drivers/dri/i965/Makefile.sources | 1
src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 17
src/mesa/drivers/dri/i965/brw_compiler.h | 54 -
src/mesa/drivers/dri/i965/brw_context.c | 72 +
src/mesa/drivers/dri/i965/brw_context.h | 25
src/mesa/drivers/dri/i965/brw_cs.c | 30
src/mesa/drivers/dri/i965/brw_defines.h | 3
src/mesa/drivers/dri/i965/brw_fs.cpp | 522 ++++++----
src/mesa/drivers/dri/i965/brw_fs.h | 1
src/mesa/drivers/dri/i965/brw_fs_combine_constants.cpp | 7
src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp | 8
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 4
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 188 +++
src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp | 12
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 7
src/mesa/drivers/dri/i965/brw_gs.c | 8
src/mesa/drivers/dri/i965/brw_ir_fs.h | 20
src/mesa/drivers/dri/i965/brw_link.cpp | 2
src/mesa/drivers/dri/i965/brw_nir.h | 2
src/mesa/drivers/dri/i965/brw_nir_intrinsics.c | 179 +++
src/mesa/drivers/dri/i965/brw_program.c | 22
src/mesa/drivers/dri/i965/brw_state.h | 2
src/mesa/drivers/dri/i965/brw_state_upload.c | 2
src/mesa/drivers/dri/i965/brw_tcs.c | 33
src/mesa/drivers/dri/i965/brw_tes.c | 8
src/mesa/drivers/dri/i965/brw_vec4_cmod_propagation.cpp | 12
src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp | 3
src/mesa/drivers/dri/i965/brw_vs.c | 8
src/mesa/drivers/dri/i965/brw_vs_state.c | 2
src/mesa/drivers/dri/i965/brw_wm.c | 7
src/mesa/drivers/dri/i965/brw_wm_state.c | 2
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 19
src/mesa/drivers/dri/i965/gen6_gs_state.c | 2
src/mesa/drivers/dri/i965/gen6_queryobj.c | 4
src/mesa/drivers/dri/i965/gen6_vs_state.c | 2
src/mesa/drivers/dri/i965/gen6_wm_state.c | 2
src/mesa/drivers/dri/i965/gen7_blorp.c | 5
src/mesa/drivers/dri/i965/gen7_cs_state.c | 161 +--
src/mesa/drivers/dri/i965/gen7_ds_state.c | 2
src/mesa/drivers/dri/i965/gen7_gs_state.c | 2
src/mesa/drivers/dri/i965/gen7_hs_state.c | 2
src/mesa/drivers/dri/i965/gen7_sol_state.c | 69 +
src/mesa/drivers/dri/i965/gen7_urb.c | 28
src/mesa/drivers/dri/i965/gen7_vs_state.c | 2
src/mesa/drivers/dri/i965/gen7_wm_state.c | 2
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 12
src/mesa/drivers/dri/i965/gen8_blorp.c | 5
src/mesa/drivers/dri/i965/gen8_ds_state.c | 10
src/mesa/drivers/dri/i965/gen8_gs_state.c | 2
src/mesa/drivers/dri/i965/gen8_hs_state.c | 2
src/mesa/drivers/dri/i965/gen8_ps_state.c | 2
src/mesa/drivers/dri/i965/gen8_sol_state.c | 90 -
src/mesa/drivers/dri/i965/gen8_surface_state.c | 36
src/mesa/drivers/dri/i965/gen8_vs_state.c | 2
src/mesa/drivers/dri/i965/intel_debug.c | 1
src/mesa/drivers/dri/i965/intel_debug.h | 1
src/mesa/drivers/dri/i965/intel_fbo.c | 2
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 2
src/mesa/drivers/dri/i965/intel_screen.c | 9
src/mesa/drivers/dri/i965/intel_tex_image.c | 13
src/mesa/drivers/osmesa/osmesa.def | 1
src/mesa/main/blit.c | 8
src/mesa/main/bufferobj.c | 2
src/mesa/main/clear.c | 4
src/mesa/main/clear.h | 2
src/mesa/main/copyimage.c | 13
src/mesa/main/extensions_table.h | 4
src/mesa/main/fbobject.c | 3
src/mesa/main/get_hash_params.py | 2
src/mesa/main/image.c | 8
src/mesa/main/mtypes.h | 10
src/mesa/main/pipelineobj.c | 17
src/mesa/main/samplerobj.c | 37
src/mesa/main/shader_query.cpp | 21
src/mesa/main/shaderobj.c | 2
src/mesa/program/prog_statevars.c | 19
src/mesa/program/prog_statevars.h | 2
src/mesa/state_tracker/st_atom_image.c | 12
src/mesa/state_tracker/st_cb_bufferobjects.c | 15
src/mesa/state_tracker/st_cb_compute.c | 3
src/mesa/state_tracker/st_cb_copyimage.c | 3
src/mesa/state_tracker/st_cb_eglimage.c | 3
src/mesa/state_tracker/st_cb_texture.c | 131 +-
src/mesa/state_tracker/st_extensions.c | 3
src/mesa/state_tracker/st_gen_mipmap.c | 3
src/mesa/state_tracker/st_manager.c | 3
src/mesa/state_tracker/st_texture.c | 3
src/mesa/state_tracker/st_texture.h | 6
src/mesa/state_tracker/st_vdpau.c | 3
255 files changed, 4956 insertions(+), 1917 deletions(-)
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