libdrm: Changes to 'debian-unstable'
.gitignore | 3
amdgpu/amdgpu.h | 4
configure.ac | 2
debian/changelog | 6
exynos/exynos_drm.c | 2
freedreno/freedreno_bo.c | 7
freedreno/freedreno_drmif.h | 1
freedreno/kgsl/kgsl_drm.h | 2
freedreno/kgsl/kgsl_pipe.c | 1
freedreno/kgsl/msm_kgsl.h | 4
freedreno/msm/msm_drm.h | 1
freedreno/msm/msm_pipe.c | 2
include/drm/drm.h | 68 +--
include/drm/drm_fourcc.h | 17
include/drm/drm_mode.h | 170 +++++---
include/drm/drm_sarea.h | 2
include/drm/i915_drm.h | 43 +-
include/drm/tegra_drm.h | 3
include/drm/vmwgfx_drm.h | 792 ++++++++++++++++++++++++++++++--------
intel/intel_bufmgr_fake.c | 2
intel/intel_bufmgr_gem.c | 2
intel/intel_chipset.h | 30 +
intel/intel_decode.c | 2
intel/tests/gen5-3d.batch-ref.txt | 2
intel/tests/gen6-3d.batch-ref.txt | 2
libkms/Android.mk | 2
tests/amdgpu/basic_tests.c | 6
tests/amdgpu/vce_tests.c | 20
tests/kms/kms-steal-crtc.c | 1
tests/modetest/modetest.c | 2
tests/proptest/proptest.c | 2
tests/util/kms.c | 1
xf86drm.c | 2
xf86drmMode.c | 2
34 files changed, 925 insertions(+), 283 deletions(-)
New commits:
commit 09e9210bcf5c2c6940f5514fc978731ba2c4710f
Author: Timo Aaltonen <tjaalton@debian.org>
Date: Tue May 3 14:30:20 2016 +0300
upload to unstable
diff --git a/debian/changelog b/debian/changelog
index 61fb15f..8fe6653 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,8 +1,8 @@
-libdrm (2.4.68-1) UNRELEASED; urgency=medium
+libdrm (2.4.68-1) unstable; urgency=medium
* New upstream release. (LP: #1577735)
- -- Timo Aaltonen <tjaalton@debian.org> Tue, 03 May 2016 14:27:40 +0300
+ -- Timo Aaltonen <tjaalton@debian.org> Tue, 03 May 2016 14:30:06 +0300
libdrm (2.4.67-1) unstable; urgency=medium
commit d62c51a0b49097330f7d5be516611abcfb59fe64
Author: Timo Aaltonen <tjaalton@debian.org>
Date: Tue May 3 14:30:04 2016 +0300
update changelog
diff --git a/debian/changelog b/debian/changelog
index ded83db..61fb15f 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,3 +1,9 @@
+libdrm (2.4.68-1) UNRELEASED; urgency=medium
+
+ * New upstream release. (LP: #1577735)
+
+ -- Timo Aaltonen <tjaalton@debian.org> Tue, 03 May 2016 14:27:40 +0300
+
libdrm (2.4.67-1) unstable; urgency=medium
* New upstream release.
commit fc09c5ab84240e9b6bd0bed01685ef004f56c4fa
Author: Kenneth Graunke <kenneth@whitecape.org>
Date: Wed Apr 27 17:52:50 2016 -0700
Bump version for release
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
diff --git a/configure.ac b/configure.ac
index ed07789..a04ce87 100644
--- a/configure.ac
+++ b/configure.ac
@@ -20,7 +20,7 @@
AC_PREREQ([2.63])
AC_INIT([libdrm],
- [2.4.67],
+ [2.4.68],
[https://bugs.freedesktop.org/enter_bug.cgi?product=DRI],
[libdrm])
commit e3623d34cad0ac3f181b0deee0931df202b8f909
Author: Michał Winiarski <michal.winiarski@intel.com>
Date: Wed Feb 17 11:40:19 2016 +0100
intel/skl: Add missing SKL PCI IDs
Used by production devices:
Intel(R) HD Graphics 510
Intel(R) HD Graphics 535
Intel(R) Iris(TM) Graphics 550
Intel(R) Iris(TM) Graphics P555
Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
Tested-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
index 8e42a40..e2554c3 100644
--- a/intel/intel_chipset.h
+++ b/intel/intel_chipset.h
@@ -168,6 +168,7 @@
#define PCI_CHIP_SKYLAKE_DT_GT1 0x1902
#define PCI_CHIP_SKYLAKE_ULT_GT1 0x1906
#define PCI_CHIP_SKYLAKE_SRV_GT1 0x190A /* Reserved */
+#define PCI_CHIP_SKYLAKE_H_GT1 0x190B
#define PCI_CHIP_SKYLAKE_ULX_GT1 0x190E /* Reserved */
#define PCI_CHIP_SKYLAKE_DT_GT2 0x1912
#define PCI_CHIP_SKYLAKE_FUSED0_GT2 0x1913 /* Reserved */
@@ -179,9 +180,12 @@
#define PCI_CHIP_SKYLAKE_WKS_GT2 0x191D
#define PCI_CHIP_SKYLAKE_ULX_GT2 0x191E
#define PCI_CHIP_SKYLAKE_MOBILE_GT2 0x1921 /* Reserved */
-#define PCI_CHIP_SKYLAKE_GT3 0x1926
-#define PCI_CHIP_SKYLAKE_HALO_GT3 0x192B /* Reserved */
+#define PCI_CHIP_SKYLAKE_ULT_GT3_0 0x1923
+#define PCI_CHIP_SKYLAKE_ULT_GT3_1 0x1926
+#define PCI_CHIP_SKYLAKE_ULT_GT3_2 0x1927
#define PCI_CHIP_SKYLAKE_SRV_GT4 0x192A
+#define PCI_CHIP_SKYLAKE_HALO_GT3 0x192B /* Reserved */
+#define PCI_CHIP_SKYLAKE_SRV_GT3 0x192D
#define PCI_CHIP_SKYLAKE_DT_GT4 0x1932
#define PCI_CHIP_SKYLAKE_SRV_GT4X 0x193A
#define PCI_CHIP_SKYLAKE_H_GT4 0x193B
@@ -375,10 +379,11 @@
#define IS_GEN8(devid) (IS_BROADWELL(devid) || \
IS_CHERRYVIEW(devid))
-#define IS_SKL_GT1(devid) ((devid) == PCI_CHIP_SKYLAKE_ULT_GT1 || \
- (devid) == PCI_CHIP_SKYLAKE_ULX_GT1 || \
- (devid) == PCI_CHIP_SKYLAKE_DT_GT1 || \
- (devid) == PCI_CHIP_SKYLAKE_SRV_GT1)
+#define IS_SKL_GT1(devid) ((devid) == PCI_CHIP_SKYLAKE_DT_GT1 || \
+ (devid) == PCI_CHIP_SKYLAKE_ULT_GT1 || \
+ (devid) == PCI_CHIP_SKYLAKE_SRV_GT1 || \
+ (devid) == PCI_CHIP_SKYLAKE_H_GT1 || \
+ (devid) == PCI_CHIP_SKYLAKE_ULX_GT1)
#define IS_SKL_GT2(devid) ((devid) == PCI_CHIP_SKYLAKE_DT_GT2 || \
(devid) == PCI_CHIP_SKYLAKE_FUSED0_GT2 || \
@@ -391,8 +396,11 @@
(devid) == PCI_CHIP_SKYLAKE_ULX_GT2 || \
(devid) == PCI_CHIP_SKYLAKE_MOBILE_GT2)
-#define IS_SKL_GT3(devid) ((devid) == PCI_CHIP_SKYLAKE_GT3 || \
- (devid) == PCI_CHIP_SKYLAKE_HALO_GT3)
+#define IS_SKL_GT3(devid) ((devid) == PCI_CHIP_SKYLAKE_ULT_GT3_0 || \
+ (devid) == PCI_CHIP_SKYLAKE_ULT_GT3_1 || \
+ (devid) == PCI_CHIP_SKYLAKE_ULT_GT3_2 || \
+ (devid) == PCI_CHIP_SKYLAKE_HALO_GT3 || \
+ (devid) == PCI_CHIP_SKYLAKE_SRV_GT3)
#define IS_SKL_GT4(devid) ((devid) == PCI_CHIP_SKYLAKE_SRV_GT4 || \
(devid) == PCI_CHIP_SKYLAKE_DT_GT4 || \
commit 739b8886025b31f2f9d09a535c8ff3670bb1d036
Author: Nicolas Dechesne <nicolas.dechesne@linaro.org>
Date: Mon Apr 11 16:50:23 2016 +0200
freedreno: add dummy fd_bo_from_fbdev implementation when KGSL is disabled
Make sure that this function is defined (even empty/dummy) when KGSL support is
disabled, since it's part of the driver i/f and it was reported to cause symbols
issues when building against musl libc implementation.
Reported-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Nicolas Dechesne <nicolas.dechesne@linaro.org>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
diff --git a/freedreno/freedreno_bo.c b/freedreno/freedreno_bo.c
index a23c65d..82c1f15 100644
--- a/freedreno/freedreno_bo.c
+++ b/freedreno/freedreno_bo.c
@@ -431,3 +431,10 @@ void fd_bo_cpu_fini(struct fd_bo *bo)
{
bo->funcs->cpu_fini(bo);
}
+
+#ifndef HAVE_FREEDRENO_KGSL
+struct fd_bo * fd_bo_from_fbdev(struct fd_pipe *pipe, int fbfd, uint32_t size)
+{
+ return NULL;
+}
+#endif
commit cc9a53f076d4e958e595e1daaff2c286ce1b7bb1
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Wed Mar 30 15:51:00 2016 +0200
headers: Update drm.h
This needs the kernel patch to make sure the C++ protection is in place.
Otherwise just new defines, using the right fixed-width types and
some shuffling in where stuff is defined (the DRM_CAP list moved, but
the #defines are the same).
Generated using make headers_install.
Generated fromd drm-misc commit 249c4f538b1aae55d41699f8bafc6cb762a7f48f
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
diff --git a/include/drm/drm.h b/include/drm/drm.h
index e213ec6..b4ebaa9 100644
--- a/include/drm/drm.h
+++ b/include/drm/drm.h
@@ -36,7 +36,7 @@
#ifndef _DRM_H_
#define _DRM_H_
-#if defined(__linux__)
+#if defined(__linux__)
#include <linux/types.h>
#include <asm/ioctl.h>
@@ -54,6 +54,7 @@ typedef int32_t __s32;
typedef uint32_t __u32;
typedef int64_t __s64;
typedef uint64_t __u64;
+typedef size_t __kernel_size_t;
typedef unsigned long drm_handle_t;
#endif
@@ -129,11 +130,11 @@ struct drm_version {
int version_major; /**< Major version */
int version_minor; /**< Minor version */
int version_patchlevel; /**< Patch level */
- size_t name_len; /**< Length of name buffer */
+ __kernel_size_t name_len; /**< Length of name buffer */
char *name; /**< Name of driver */
- size_t date_len; /**< Length of date buffer */
+ __kernel_size_t date_len; /**< Length of date buffer */
char *date; /**< User-space buffer to hold date */
- size_t desc_len; /**< Length of desc buffer */
+ __kernel_size_t desc_len; /**< Length of desc buffer */
char *desc; /**< User-space buffer to hold desc */
};
@@ -143,7 +144,7 @@ struct drm_version {
* \sa drmGetBusid() and drmSetBusId().
*/
struct drm_unique {
- size_t unique_len; /**< Length of unique */
+ __kernel_size_t unique_len; /**< Length of unique */
char *unique; /**< Unique name for driver instantiation */
};
@@ -180,7 +181,7 @@ enum drm_map_type {
_DRM_SHM = 2, /**< shared, cached */
_DRM_AGP = 3, /**< AGP/GART */
_DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */
- _DRM_CONSISTENT = 5, /**< Consistent memory for PCI DMA */
+ _DRM_CONSISTENT = 5 /**< Consistent memory for PCI DMA */
};
/**
@@ -466,12 +467,15 @@ struct drm_irq_busid {
enum drm_vblank_seq_type {
_DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */
_DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */
+ /* bits 1-6 are reserved for high crtcs */
+ _DRM_VBLANK_HIGH_CRTC_MASK = 0x0000003e,
_DRM_VBLANK_EVENT = 0x4000000, /**< Send event instead of blocking */
_DRM_VBLANK_FLIP = 0x8000000, /**< Scheduled buffer swap should flip */
_DRM_VBLANK_NEXTONMISS = 0x10000000, /**< If missed, wait for next vblank */
_DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */
_DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking, unsupported */
};
+#define _DRM_VBLANK_HIGH_CRTC_SHIFT 1
#define _DRM_VBLANK_TYPES_MASK (_DRM_VBLANK_ABSOLUTE | _DRM_VBLANK_RELATIVE)
#define _DRM_VBLANK_FLAGS_MASK (_DRM_VBLANK_EVENT | _DRM_VBLANK_SIGNAL | \
@@ -611,6 +615,28 @@ struct drm_gem_open {
__u64 size;
};
+#define DRM_CAP_DUMB_BUFFER 0x1
+#define DRM_CAP_VBLANK_HIGH_CRTC 0x2
+#define DRM_CAP_DUMB_PREFERRED_DEPTH 0x3
+#define DRM_CAP_DUMB_PREFER_SHADOW 0x4
+#define DRM_CAP_PRIME 0x5
+#define DRM_PRIME_CAP_IMPORT 0x1
+#define DRM_PRIME_CAP_EXPORT 0x2
+#define DRM_CAP_TIMESTAMP_MONOTONIC 0x6
+#define DRM_CAP_ASYNC_PAGE_FLIP 0x7
+/*
+ * The CURSOR_WIDTH and CURSOR_HEIGHT capabilities return a valid widthxheight
+ * combination for the hardware cursor. The intention is that a hardware
+ * agnostic userspace can query a cursor plane size to use.
+ *
+ * Note that the cross-driver contract is to merely return a valid size;
+ * drivers are free to attach another meaning on top, eg. i915 returns the
+ * maximum plane size.
+ */
+#define DRM_CAP_CURSOR_WIDTH 0x8
+#define DRM_CAP_CURSOR_HEIGHT 0x9
+#define DRM_CAP_ADDFB2_MODIFIERS 0x10
+
/** DRM_IOCTL_GET_CAP ioctl argument type */
struct drm_get_cap {
__u64 capability;
@@ -629,17 +655,17 @@ struct drm_get_cap {
/**
* DRM_CLIENT_CAP_UNIVERSAL_PLANES
*
- * if set to 1, the DRM core will expose the full universal plane list
- * (including primary and cursor planes).
+ * If set to 1, the DRM core will expose all planes (overlay, primary, and
+ * cursor) to userspace.
*/
-#define DRM_CLIENT_CAP_UNIVERSAL_PLANES 2
+#define DRM_CLIENT_CAP_UNIVERSAL_PLANES 2
/**
* DRM_CLIENT_CAP_ATOMIC
*
- * If set to 1, the DRM core will allow atomic modesetting requests.
+ * If set to 1, the DRM core will expose atomic properties to userspace
*/
-#define DRM_CLIENT_CAP_ATOMIC 3
+#define DRM_CLIENT_CAP_ATOMIC 3
/** DRM_IOCTL_SET_CLIENT_CAP ioctl argument type */
struct drm_set_client_cap {
@@ -647,6 +673,7 @@ struct drm_set_client_cap {
__u64 value;
};
+#define DRM_RDWR O_RDWR
#define DRM_CLOEXEC O_CLOEXEC
struct drm_prime_handle {
__u32 handle;
@@ -742,8 +769,8 @@ struct drm_prime_handle {
#define DRM_IOCTL_MODE_SETGAMMA DRM_IOWR(0xA5, struct drm_mode_crtc_lut)
#define DRM_IOCTL_MODE_GETENCODER DRM_IOWR(0xA6, struct drm_mode_get_encoder)
#define DRM_IOCTL_MODE_GETCONNECTOR DRM_IOWR(0xA7, struct drm_mode_get_connector)
-#define DRM_IOCTL_MODE_ATTACHMODE DRM_IOWR(0xA8, struct drm_mode_mode_cmd)
-#define DRM_IOCTL_MODE_DETACHMODE DRM_IOWR(0xA9, struct drm_mode_mode_cmd)
+#define DRM_IOCTL_MODE_ATTACHMODE DRM_IOWR(0xA8, struct drm_mode_mode_cmd) /* deprecated (never worked) */
+#define DRM_IOCTL_MODE_DETACHMODE DRM_IOWR(0xA9, struct drm_mode_mode_cmd) /* deprecated (never worked) */
#define DRM_IOCTL_MODE_GETPROPERTY DRM_IOWR(0xAA, struct drm_mode_get_property)
#define DRM_IOCTL_MODE_SETPROPERTY DRM_IOWR(0xAB, struct drm_mode_connector_set_property)
@@ -770,7 +797,7 @@ struct drm_prime_handle {
/**
* Device specific ioctls should only be in their respective headers
- * The device specific ioctl range is from 0x40 to 0x99.
+ * The device specific ioctl range is from 0x40 to 0x9f.
* Generic IOCTLS restart at 0xA0.
*
* \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and
@@ -808,18 +835,6 @@ struct drm_event_vblank {
__u32 reserved;
};
-#define DRM_CAP_DUMB_BUFFER 0x1
-#define DRM_CAP_VBLANK_HIGH_CRTC 0x2
-#define DRM_CAP_DUMB_PREFERRED_DEPTH 0x3
-#define DRM_CAP_DUMB_PREFER_SHADOW 0x4
-#define DRM_CAP_PRIME 0x5
-#define DRM_CAP_TIMESTAMP_MONOTONIC 0x6
-#define DRM_CAP_ASYNC_PAGE_FLIP 0x7
-#define DRM_CAP_ADDFB2_MODIFIERS 0x10
-
-#define DRM_PRIME_CAP_IMPORT 0x1
-#define DRM_PRIME_CAP_EXPORT 0x2
-
/* typedef area */
typedef struct drm_clip_rect drm_clip_rect_t;
typedef struct drm_drawable_info drm_drawable_info_t;
commit 89cdda3d5f4fcfcbc3508cc4ebe0c43768e2a65c
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Wed Mar 30 15:44:42 2016 +0200
headers: Update drm_mode.h
Generated using make headers_install.
Only cosmetics&new definitions here now.
Generated fromd drm-misc commit 249c4f538b1aae55d41699f8bafc6cb762a7f48f
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
diff --git a/include/drm/drm_mode.h b/include/drm/drm_mode.h
index 115f36e..7a7856e 100644
--- a/include/drm/drm_mode.h
+++ b/include/drm/drm_mode.h
@@ -27,6 +27,8 @@
#ifndef _DRM_MODE_H
#define _DRM_MODE_H
+#include "drm.h"
+
#define DRM_DISPLAY_INFO_LEN 32
#define DRM_CONNECTOR_NAME_LEN 32
#define DRM_DISPLAY_MODE_LEN 32
@@ -56,6 +58,10 @@
#define DRM_MODE_FLAG_PIXMUX (1<<11)
#define DRM_MODE_FLAG_DBLCLK (1<<12)
#define DRM_MODE_FLAG_CLKDIV2 (1<<13)
+ /*
+ * When adding a new stereo mode don't forget to adjust DRM_MODE_FLAGS_3D_MAX
+ * (define not exposed to user space).
+ */
#define DRM_MODE_FLAG_3D_MASK (0x1f<<14)
#define DRM_MODE_FLAG_3D_NONE (0<<14)
#define DRM_MODE_FLAG_3D_FRAME_PACKING (1<<14)
@@ -82,6 +88,11 @@
#define DRM_MODE_SCALE_CENTER 2 /* Centered, no scaling */
#define DRM_MODE_SCALE_ASPECT 3 /* Full screen, preserve aspect */
+/* Picture aspect ratio options */
+#define DRM_MODE_PICTURE_ASPECT_NONE 0
+#define DRM_MODE_PICTURE_ASPECT_4_3 1
+#define DRM_MODE_PICTURE_ASPECT_16_9 2
+
/* Dithering mode options */
#define DRM_MODE_DITHERING_OFF 0
#define DRM_MODE_DITHERING_ON 1
@@ -94,8 +105,16 @@
struct drm_mode_modeinfo {
__u32 clock;
- __u16 hdisplay, hsync_start, hsync_end, htotal, hskew;
- __u16 vdisplay, vsync_start, vsync_end, vtotal, vscan;
+ __u16 hdisplay;
+ __u16 hsync_start;
+ __u16 hsync_end;
+ __u16 htotal;
+ __u16 hskew;
+ __u16 vdisplay;
+ __u16 vsync_start;
+ __u16 vsync_end;
+ __u16 vtotal;
+ __u16 vscan;
__u32 vrefresh;
@@ -113,8 +132,10 @@ struct drm_mode_card_res {
__u32 count_crtcs;
__u32 count_connectors;
__u32 count_encoders;
- __u32 min_width, max_width;
- __u32 min_height, max_height;
+ __u32 min_width;
+ __u32 max_width;
+ __u32 min_height;
+ __u32 max_height;
};
struct drm_mode_crtc {
@@ -124,30 +145,35 @@ struct drm_mode_crtc {
__u32 crtc_id; /**< Id */
__u32 fb_id; /**< Id of framebuffer */
- __u32 x, y; /**< Position on the frameuffer */
+ __u32 x; /**< x Position on the framebuffer */
+ __u32 y; /**< y Position on the framebuffer */
__u32 gamma_size;
__u32 mode_valid;
struct drm_mode_modeinfo mode;
};
-#define DRM_MODE_PRESENT_TOP_FIELD (1<<0)
-#define DRM_MODE_PRESENT_BOTTOM_FIELD (1<<1)
+#define DRM_MODE_PRESENT_TOP_FIELD (1<<0)
+#define DRM_MODE_PRESENT_BOTTOM_FIELD (1<<1)
/* Planes blend with or override other bits on the CRTC */
struct drm_mode_set_plane {
__u32 plane_id;
__u32 crtc_id;
__u32 fb_id; /* fb object contains surface format type */
- __u32 flags;
+ __u32 flags; /* see above flags */
/* Signed dest location allows it to be partially off screen */
- __s32 crtc_x, crtc_y;
- __u32 crtc_w, crtc_h;
+ __s32 crtc_x;
+ __s32 crtc_y;
+ __u32 crtc_w;
+ __u32 crtc_h;
/* Source values are 16.16 fixed point */
- __u32 src_x, src_y;
- __u32 src_h, src_w;
+ __u32 src_x;
+ __u32 src_y;
+ __u32 src_h;
+ __u32 src_w;
};
struct drm_mode_get_plane {
@@ -233,8 +259,11 @@ struct drm_mode_get_connector {
__u32 connector_type_id;
__u32 connection;
- __u32 mm_width, mm_height; /**< HxW in millimeters */
+ __u32 mm_width; /**< width in millimeters */
+ __u32 mm_height; /**< height in millimeters */
__u32 subpixel;
+
+ __u32 pad;
};
#define DRM_MODE_PROP_PENDING (1<<0)
@@ -259,6 +288,13 @@ struct drm_mode_get_connector {
#define DRM_MODE_PROP_OBJECT DRM_MODE_PROP_TYPE(1)
#define DRM_MODE_PROP_SIGNED_RANGE DRM_MODE_PROP_TYPE(2)
+/* the PROP_ATOMIC flag is used to hide properties from userspace that
+ * is not aware of atomic properties. This is mostly to work around
+ * older userspace (DDX drivers) that read/write each prop they find,
+ * witout being aware that this could be triggering a lengthy modeset.
+ */
+#define DRM_MODE_PROP_ATOMIC 0x80000000
+
struct drm_mode_property_enum {
__u64 value;
char name[DRM_PROP_NAME_LEN];
@@ -273,6 +309,8 @@ struct drm_mode_get_property {
char name[DRM_PROP_NAME_LEN];
__u32 count_values;
+ /* This is only used to count enum values, not blobs. The _blobs is
+ * simply because of a historical reason, i.e. backwards compat. */
__u32 count_enum_blobs;
};
@@ -290,6 +328,7 @@ struct drm_mode_connector_set_property {
#define DRM_MODE_OBJECT_FB 0xfbfbfbfb
#define DRM_MODE_OBJECT_BLOB 0xbbbbbbbb
#define DRM_MODE_OBJECT_PLANE 0xeeeeeeee
+#define DRM_MODE_OBJECT_ANY 0
struct drm_mode_obj_get_properties {
__u64 props_ptr;
@@ -314,7 +353,8 @@ struct drm_mode_get_blob {
struct drm_mode_fb_cmd {
__u32 fb_id;
- __u32 width, height;
+ __u32 width;
+ __u32 height;
__u32 pitch;
__u32 bpp;
__u32 depth;
@@ -327,9 +367,10 @@ struct drm_mode_fb_cmd {
struct drm_mode_fb_cmd2 {
__u32 fb_id;
- __u32 width, height;
+ __u32 width;
+ __u32 height;
__u32 pixel_format; /* fourcc code from drm_fourcc.h */
- __u32 flags;
+ __u32 flags; /* see above flags */
/*
* In case of planar formats, this ioctl allows up to 4
@@ -341,9 +382,9 @@ struct drm_mode_fb_cmd2 {
* followed by an interleaved U/V plane containing
* 8 bit 2x2 subsampled colour difference samples.
*
- * So it would consist of Y as offset[0] and UV as
- * offset[1]. Note that offset[0] will generally
- * be 0.
+ * So it would consist of Y as offsets[0] and UV as
+ * offsets[1]. Note that offsets[0] will generally
+ * be 0 (but this is not required).
*
* To accommodate tiled, compressed, etc formats, a per-plane
* modifier can be specified. The default value of zero
@@ -362,6 +403,8 @@ struct drm_mode_fb_cmd2 {
#define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
#define DRM_MODE_FB_DIRTY_FLAGS 0x03
+#define DRM_MODE_FB_DIRTY_MAX_CLIPS 256
+
/*
* Mark a region of a framebuffer as dirty.
*
@@ -402,20 +445,21 @@ struct drm_mode_mode_cmd {
struct drm_mode_modeinfo mode;
};
-#define DRM_MODE_CURSOR_BO (1<<0)
-#define DRM_MODE_CURSOR_MOVE (1<<1)
+#define DRM_MODE_CURSOR_BO 0x01
+#define DRM_MODE_CURSOR_MOVE 0x02
+#define DRM_MODE_CURSOR_FLAGS 0x03
/*
- * depending on the value in flags diffrent members are used.
+ * depending on the value in flags different members are used.
*
* CURSOR_BO uses
- * crtc
+ * crtc_id
* width
* height
- * handle - if 0 turns the cursor of
+ * handle - if 0 turns the cursor off
*
* CURSOR_MOVE uses
- * crtc
+ * crtc_id
* x
* y
*/
@@ -453,6 +497,21 @@ struct drm_mode_crtc_lut {
__u64 blue;
};
+struct drm_color_ctm {
+ /* Conversion matrix in S31.32 format. */
+ __s64 matrix[9];
+};
+
+struct drm_color_lut {
+ /*
+ * Data is U0.16 fixed point format.
+ */
+ __u16 red;
+ __u16 green;
+ __u16 blue;
+ __u16 reserved;
+};
+
#define DRM_MODE_PAGE_FLIP_EVENT 0x01
#define DRM_MODE_PAGE_FLIP_ASYNC 0x02
#define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT|DRM_MODE_PAGE_FLIP_ASYNC)
@@ -469,11 +528,14 @@ struct drm_mode_crtc_lut {
* flip is already pending as the ioctl is called, EBUSY will be
* returned.
*
- * The ioctl supports one flag, DRM_MODE_PAGE_FLIP_EVENT, which will
- * request that drm sends back a vblank event (see drm.h: struct
- * drm_event_vblank) when the page flip is done. The user_data field
- * passed in with this ioctl will be returned as the user_data field
- * in the vblank event struct.
+ * Flag DRM_MODE_PAGE_FLIP_EVENT requests that drm sends back a vblank
+ * event (see drm.h: struct drm_event_vblank) when the page flip is
+ * done. The user_data field passed in with this ioctl will be
+ * returned as the user_data field in the vblank event struct.
+ *
+ * Flag DRM_MODE_PAGE_FLIP_ASYNC requests that the flip happen
+ * 'as soon as possible', meaning that it not delay waiting for vblank.
+ * This may cause tearing on the screen.
*
* The reserved field must be zero until we figure out something
* clever to use it for.
@@ -489,27 +551,27 @@ struct drm_mode_crtc_page_flip {
/* create a dumb scanout buffer */
struct drm_mode_create_dumb {
- __u32 height;
- __u32 width;
- __u32 bpp;
- __u32 flags;
- /* handle, pitch, size will be returned */
- __u32 handle;
- __u32 pitch;
- __u64 size;
+ __u32 height;
+ __u32 width;
+ __u32 bpp;
+ __u32 flags;
+ /* handle, pitch, size will be returned */
+ __u32 handle;
+ __u32 pitch;
+ __u64 size;
};
/* set up for mmap of a dumb scanout buffer */
struct drm_mode_map_dumb {
- /** Handle for the object being mapped. */
- __u32 handle;
- __u32 pad;
- /**
- * Fake offset to use for subsequent mmap call
- *
- * This is a fixed-size type for 32/64 compatibility.
- */
- __u64 offset;
+ /** Handle for the object being mapped. */
+ __u32 handle;
+ __u32 pad;
+ /**
+ * Fake offset to use for subsequent mmap call
+ *
+ * This is a fixed-size type for 32/64 compatibility.
+ */
+ __u64 offset;
};
struct drm_mode_destroy_dumb {
@@ -517,9 +579,16 @@ struct drm_mode_destroy_dumb {
};
/* page-flip flags are valid, plus: */
-#define DRM_MODE_ATOMIC_TEST_ONLY 0x0100
-#define DRM_MODE_ATOMIC_NONBLOCK 0x0200
-#define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400
+#define DRM_MODE_ATOMIC_TEST_ONLY 0x0100
+#define DRM_MODE_ATOMIC_NONBLOCK 0x0200
+#define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400
+
+#define DRM_MODE_ATOMIC_FLAGS (\
+ DRM_MODE_PAGE_FLIP_EVENT |\
+ DRM_MODE_PAGE_FLIP_ASYNC |\
+ DRM_MODE_ATOMIC_TEST_ONLY |\
+ DRM_MODE_ATOMIC_NONBLOCK |\
+ DRM_MODE_ATOMIC_ALLOW_MODESET)
struct drm_mode_atomic {
__u32 flags;
@@ -552,5 +621,4 @@ struct drm_mode_destroy_blob {
__u32 blob_id;
};
-
#endif
commit 268ae7cae5afd76462c3ef14ed9021a2d40c2e57
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Wed Mar 30 15:39:12 2016 +0200
headers: Update drm_fourcc.h
Only real difference is switching to kernel types for fixed-width
integers, like we should.
Generated fromd drm-misc commit 249c4f538b1aae55d41699f8bafc6cb762a7f48f
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
diff --git a/include/drm/drm_fourcc.h b/include/drm/drm_fourcc.h
index e741b09..4d8da69 100644
--- a/include/drm/drm_fourcc.h
+++ b/include/drm/drm_fourcc.h
@@ -24,16 +24,23 @@
#ifndef DRM_FOURCC_H
#define DRM_FOURCC_H
-#include <inttypes.h>
+#include "drm.h"
-#define fourcc_code(a,b,c,d) ((uint32_t)(a) | ((uint32_t)(b) << 8) | \
- ((uint32_t)(c) << 16) | ((uint32_t)(d) << 24))
+#define fourcc_code(a, b, c, d) ((__u32)(a) | ((__u32)(b) << 8) | \
+ ((__u32)(c) << 16) | ((__u32)(d) << 24))
#define DRM_FORMAT_BIG_ENDIAN (1<<31) /* format is big endian instead of little endian */
/* color index */
#define DRM_FORMAT_C8 fourcc_code('C', '8', ' ', ' ') /* [7:0] C */
+/* 8 bpp Red */
+#define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
+
+/* 16 bpp RG */
+#define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */
+#define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */
+
/* 8 bpp RGB */
#define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */
#define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */
@@ -106,6 +113,8 @@
#define DRM_FORMAT_NV21 fourcc_code('N', 'V', '2', '1') /* 2x2 subsampled Cb:Cr plane */
#define DRM_FORMAT_NV16 fourcc_code('N', 'V', '1', '6') /* 2x1 subsampled Cr:Cb plane */
#define DRM_FORMAT_NV61 fourcc_code('N', 'V', '6', '1') /* 2x1 subsampled Cb:Cr plane */
+#define DRM_FORMAT_NV24 fourcc_code('N', 'V', '2', '4') /* non-subsampled Cr:Cb plane */
+#define DRM_FORMAT_NV42 fourcc_code('N', 'V', '4', '2') /* non-subsampled Cb:Cr plane */
/*
* 3 plane YCbCr
@@ -216,7 +225,7 @@
* - multiple of 128 pixels for the width
* - multiple of 32 pixels for the height
*
- * For more information: see http://linuxtv.org/downloads/v4l-dvb-apis/re32.html
+ * For more information: see https://linuxtv.org/downloads/v4l-dvb-apis/re32.html
*/
#define DRM_FORMAT_MOD_SAMSUNG_64_32_TILE fourcc_mod_code(SAMSUNG, 1)
commit f37b9a8edded6f3ceb973eb05d184125b5c6297d
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Wed Mar 30 15:38:28 2016 +0200
headers: Update drm_sarea.h
Generated using make headers_install. Only difference is a new value
of SAREA_MAX for mips. Not that we ever shipped a dri1 driver on that
platform probably ...
Generated fromd drm-misc commit 249c4f538b1aae55d41699f8bafc6cb762a7f48f
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
diff --git a/include/drm/drm_sarea.h b/include/drm/drm_sarea.h
index 7325558..502934e 100644
--- a/include/drm/drm_sarea.h
+++ b/include/drm/drm_sarea.h
@@ -37,6 +37,8 @@
/* SAREA area needs to be at least a page */
#if defined(__alpha__)
#define SAREA_MAX 0x2000U
+#elif defined(__mips__)
+#define SAREA_MAX 0x4000U
#elif defined(__ia64__)
#define SAREA_MAX 0x10000U /* 64kB */
#else
commit 7cba3bb75ec7366be7e01394329bb8a2658cbe14
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Wed Mar 30 15:36:55 2016 +0200
headers: Update drm_i915.h
Generated using make header_install.
Generated fromd drm-intel-next-queued commit
55c561a708eec328822721233b1148119e80f5c3
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index 0e51d42..c4ce6b2 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -772,10 +772,12 @@ struct drm_i915_gem_execbuffer2 {
#define I915_EXEC_HANDLE_LUT (1<<12)
/** Used for switching BSD rings on the platforms with two BSD rings */
-#define I915_EXEC_BSD_MASK (3<<13)
-#define I915_EXEC_BSD_DEFAULT (0<<13) /* default ping-pong mode */
-#define I915_EXEC_BSD_RING1 (1<<13)
-#define I915_EXEC_BSD_RING2 (2<<13)
+#define I915_EXEC_BSD_SHIFT (13)
+#define I915_EXEC_BSD_MASK (3 << I915_EXEC_BSD_SHIFT)
+/* default ping-pong mode */
+#define I915_EXEC_BSD_DEFAULT (0 << I915_EXEC_BSD_SHIFT)
+#define I915_EXEC_BSD_RING1 (1 << I915_EXEC_BSD_SHIFT)
+#define I915_EXEC_BSD_RING2 (2 << I915_EXEC_BSD_SHIFT)
/** Tell the kernel that the batchbuffer is processed by
* the resource streamer.
@@ -812,10 +814,35 @@ struct drm_i915_gem_busy {
/** Handle of the buffer to check for busy */
__u32 handle;
- /** Return busy status (1 if busy, 0 if idle).
- * The high word is used to indicate on which rings the object
- * currently resides:
- * 16:31 - busy (r or r/w) rings (16 render, 17 bsd, 18 blt, etc)
+ /** Return busy status
+ *
+ * A return of 0 implies that the object is idle (after
+ * having flushed any pending activity), and a non-zero return that
+ * the object is still in-flight on the GPU. (The GPU has not yet
+ * signaled completion for all pending requests that reference the
+ * object.)
+ *
+ * The returned dword is split into two fields to indicate both
+ * the engines on which the object is being read, and the
+ * engine on which it is currently being written (if any).
+ *
+ * The low word (bits 0:15) indicate if the object is being written
+ * to by any engine (there can only be one, as the GEM implicit
+ * synchronisation rules force writes to be serialised). Only the
+ * engine for the last write is reported.
+ *
+ * The high word (bits 16:31) are a bitmask of which engines are
+ * currently reading from the object. Multiple engines may be
+ * reading from the object simultaneously.
+ *
+ * The value of each engine is the same as specified in the
+ * EXECBUFFER2 ioctl, i.e. I915_EXEC_RENDER, I915_EXEC_BSD etc.
+ * Note I915_EXEC_DEFAULT is a symbolic value and is mapped to
+ * the I915_EXEC_RENDER engine for execution, and so it is never
+ * reported as active itself. Some hardware may have parallel
+ * execution engines, e.g. multiple media engines, which are
+ * mapped to the same identifier in the EXECBUFFER2 ioctl and
+ * so are not separately reported for busyness.
*/
__u32 busy;
};
commit 1e5c590a24a34cd74c5fb86eec8809d326a1c572
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Wed Mar 30 16:18:53 2016 +0200
tests/kms-steal-crtc: Use correct includes
It was relying on drm_fourcc.h providing <stdint.h>, which is silly.
Fix it.
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
diff --git a/tests/kms/kms-steal-crtc.c b/tests/kms/kms-steal-crtc.c
index 497772e..4b830d2 100644
--- a/tests/kms/kms-steal-crtc.c
+++ b/tests/kms/kms-steal-crtc.c
@@ -29,6 +29,7 @@
#include <fcntl.h>
#include <signal.h>
#include <stdio.h>
+#include <stdint.h>
#include <string.h>
#include <unistd.h>
#ifdef HAVE_SYS_SELECT_H
commit 81506da8cfc1d0677dda7286bc705c1157bfcf4e
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Wed Mar 30 15:40:26 2016 +0200
headers: Remove _DRM_GEM
This was purely a kernel-internal type used in a early patch version
to add GEM bo mmap support. It was never used in-kernel in merged code
nor in userspace. Nuke it to align with kernel headers.
For reference the kernel patch:
commit 05f51722a154e73019434bd020e50ddb941046c5
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Wed Dec 11 11:34:32 2013 +0100
drm/bufs: remove handling of _DRM_GEM mappings
Gone with the new gem vma offset manager from David.
We can also ditch the uapi header definition from the enum since
userspace never used this. It ended up in there purely for historical
reasons (for reusing the old drm mmap code essentially), not because
userspace ever needed it.
Cc: David Herrmann <dh.herrmann@gmail.com>
Reviewed-by: David Herrmann <dh.herrmann@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
diff --git a/include/drm/drm.h b/include/drm/drm.h
index a950b58..e213ec6 100644
--- a/include/drm/drm.h
+++ b/include/drm/drm.h
@@ -181,7 +181,6 @@ enum drm_map_type {
_DRM_AGP = 3, /**< AGP/GART */
_DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */
_DRM_CONSISTENT = 5, /**< Consistent memory for PCI DMA */
- _DRM_GEM = 6 /**< GEM object */
};
/**
commit 65ea85d85c5b4da22d9f4ea18ae368bc48fbf60a
Author: Thierry Reding <treding@nvidia.com>
Date: Thu Mar 31 12:41:10 2016 +0200
tegra: Sync with Linux kernel UAPI header
Update the UAPI header to the latest version in the Linux kernel. This
changes the struct drm_tegra_gem_mmap to properly handle offsets on 64-
bit architectures.
See commit bdf765071a8b ("drm/tegra: gem: Return 64-bit offset for
mmap(2)") in the Linux kernel (as of v4.1).
Signed-off-by: Thierry Reding <treding@nvidia.com>
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