mesa: Changes to 'debian-unstable'
VERSION | 2
bin/get-pick-list.sh | 2
configure.ac | 4
debian/changelog | 6
docs/relnotes/10.6.5.html | 3
docs/relnotes/10.6.6.html | 164 ++++++++++++++++++
docs/relnotes/10.6.7.html | 74 ++++++++
src/gallium/drivers/nouveau/nv50/nv50_surface.c | 6
src/gallium/drivers/nouveau/nvc0/nvc0_surface.c | 1
src/gallium/drivers/r600/r600_asm.c | 2
src/gallium/drivers/r600/r600_shader.c | 4
src/gallium/drivers/r600/r600_state.c | 2
src/gallium/drivers/r600/sb/sb_bc_decoder.cpp | 1
src/gallium/drivers/r600/sb/sb_bc_finalize.cpp | 3
src/gallium/drivers/r600/sb/sb_bc_parser.cpp | 9
src/gallium/drivers/r600/sb/sb_sched.cpp | 2
src/gallium/drivers/radeon/r600_query.c | 16 -
src/gallium/drivers/radeonsi/si_shader.h | 1
src/gallium/drivers/radeonsi/si_state.c | 16 +
src/gallium/drivers/radeonsi/si_state.h | 2
src/gallium/drivers/radeonsi/si_state_shaders.c | 11 +
src/glsl/linker.cpp | 84 +++++----
src/glsl/program.h | 4
src/mesa/drivers/dri/i965/brw_context.c | 6
src/mesa/drivers/dri/i965/brw_draw_upload.c | 30 +--
src/mesa/drivers/dri/i965/brw_fs.cpp | 12 -
src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp | 1
src/mesa/drivers/dri/i965/brw_misc_state.c | 3
src/mesa/drivers/dri/i965/gen8_draw_upload.c | 71 ++++++-
src/mesa/drivers/dri/i965/intel_blit.c | 70 +++----
src/mesa/main/get.c | 86 +++++++++
src/mesa/main/glformats.c | 37 +++-
src/mesa/main/readpix.c | 3
src/mesa/main/texcompress_fxt1.c | 2
src/mesa/main/texcompress_s3tc.c | 8
src/mesa/main/texgetimage.c | 7
src/mesa/main/teximage.c | 13 -
src/mesa/main/texparam.c | 12 +
src/mesa/main/texstorage.c | 15 +
src/mesa/main/texstore.c | 2
src/mesa/main/uniform_query.cpp | 21 +-
src/mesa/main/uniforms.c | 9
src/mesa/program/ir_to_mesa.cpp | 2
src/mesa/state_tracker/st_cb_readpixels.c | 4
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 14 -
45 files changed, 675 insertions(+), 172 deletions(-)
New commits:
commit 53e852db5ffc94ba59f0c4884971b1d56545282a
Author: Timo Aaltonen <tjaalton@debian.org>
Date: Mon Sep 14 11:29:59 2015 +0300
release to unstable
diff --git a/debian/changelog b/debian/changelog
index 6f4980f..c2abbff 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,8 +1,8 @@
-mesa (10.6.7-1) UNRELEASED; urgency=medium
+mesa (10.6.7-1) unstable; urgency=medium
* New upstream release.
- -- Timo Aaltonen <tjaalton@debian.org> Mon, 14 Sep 2015 11:13:39 +0300
+ -- Timo Aaltonen <tjaalton@debian.org> Mon, 14 Sep 2015 11:15:23 +0300
mesa (10.6.5-1) unstable; urgency=medium
commit 29e6fc603bb86947511fe9891da93efcb93021a7
Author: Timo Aaltonen <tjaalton@debian.org>
Date: Mon Sep 14 11:15:15 2015 +0300
update the changelog
diff --git a/debian/changelog b/debian/changelog
index bd2fde3..6f4980f 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,3 +1,9 @@
+mesa (10.6.7-1) UNRELEASED; urgency=medium
+
+ * New upstream release.
+
+ -- Timo Aaltonen <tjaalton@debian.org> Mon, 14 Sep 2015 11:13:39 +0300
+
mesa (10.6.5-1) unstable; urgency=medium
[ Andreas Boll ]
commit 32efdc87cbf89cfe08ad9571cd756e27c803caa8
Author: Emil Velikov <emil.l.velikov@gmail.com>
Date: Thu Sep 10 18:45:17 2015 +0100
docs: add release notes for 10.6.7
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
diff --git a/docs/relnotes/10.6.7.html b/docs/relnotes/10.6.7.html
new file mode 100644
index 0000000..3af0b0a
--- /dev/null
+++ b/docs/relnotes/10.6.7.html
@@ -0,0 +1,74 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd";>
+<html lang="en">
+<head>
+ <meta http-equiv="content-type" content="text/html; charset=utf-8">
+ <title>Mesa Release Notes</title>
+ <link rel="stylesheet" type="text/css" href="../mesa.css">
+</head>
+<body>
+
+<div class="header">
+ <h1>The Mesa 3D Graphics Library</h1>
+</div>
+
+<iframe src="../contents.html"></iframe>
+<div class="content">
+
+<h1>Mesa 10.6.7 Release Notes / September 10, 2015</h1>
+
+<p>
+Mesa 10.6.7 is a bug fix release which fixes bugs found since the 10.6.6 release.
+</p>
+<p>
+Mesa 10.6.7 implements the OpenGL 3.3 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 3.3. OpenGL
+3.3 is <strong>only</strong> available if requested at context creation
+because compatibility contexts are not supported.
+</p>
+
+
+<h2>SHA256 checksums</h2>
+<pre>
+TBD
+</pre>
+
+
+<h2>New features</h2>
+<p>None</p>
+
+<h2>Bug fixes</h2>
+
+<p>This list is likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90751";>Bug 90751</a> - [BDW Bisected]dEQP-GLES3.functional.fbo.completeness.renderable.texture.stencil.stencil_index8 fails</li>
+
+</ul>
+
+
+<h2>Changes</h2>
+
+<p>Dave Airlie (1):</p>
+<ul>
+ <li>mesa/teximage: use correct extension for accept stencil texture.</li>
+</ul>
+
+<p>Emil Velikov (3):</p>
+<ul>
+ <li>docs: add sha256 checksums for 10.6.6</li>
+ <li>Revert "i965: Momentarily pretend to support ARB_texture_stencil8 for blits."</li>
+ <li>Update version to 10.6.7</li>
+</ul>
+
+<p>Kenneth Graunke (1):</p>
+<ul>
+ <li>glsl: Handle attribute aliasing in attribute storage limit check.</li>
+</ul>
+
+
+</div>
+</body>
+</html>
commit c87643377dc682583164ebd2d301c334d731a2c9
Author: Emil Velikov <emil.l.velikov@gmail.com>
Date: Thu Sep 10 18:41:07 2015 +0100
Update version to 10.6.7
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
diff --git a/VERSION b/VERSION
index 77fbf87..11ffa66 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-10.6.6
+10.6.7
commit a08cb25d8150d0f04146ca7e250e7ab07827ac21
Author: Kenneth Graunke <kenneth@whitecape.org>
Date: Wed Sep 2 10:42:57 2015 -0700
glsl: Handle attribute aliasing in attribute storage limit check.
In various versions of OpenGL and GLSL, it's possible to declare
multiple VS input variables with aliasing attribute locations.
So, when computing the storage requirements for vertex attributes,
we can't simply add up the sizes. Instead, we need to look at the
enabled slots.
This patch begins tracking which attributes are double types that
are larger than 128-bits (i.e. take up two vec4 slots). We then
count normal attributes once, and count the double-size attributes
a second time.
Fixes deQP functional.attribute_location.bind_aliasing.max_cond_* tests
on i965, which regressed with commit ad208d975a6d3aebe14f7c2c16039ee20.
No Piglit changes on llvmpipe (which actually supports dvecs).
Cc: "10.6 11.0" <mesa-stable@lists.freedesktop.org>
Tested-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit c3294ca5a13cf3f0eb3d9907a46ff8ce4bc2963b)
diff --git a/src/glsl/linker.cpp b/src/glsl/linker.cpp
index c218758..8bb21dd 100644
--- a/src/glsl/linker.cpp
+++ b/src/glsl/linker.cpp
@@ -1960,6 +1960,7 @@ assign_attribute_or_color_locations(gl_shader_program *prog,
*/
unsigned used_locations = (max_index >= 32)
? ~0 : ~((1 << max_index) - 1);
+ unsigned double_storage_locations = 0;
assert((target_index == MESA_SHADER_VERTEX)
|| (target_index == MESA_SHADER_FRAGMENT));
@@ -2054,34 +2055,6 @@ assign_attribute_or_color_locations(gl_shader_program *prog,
const unsigned slots = var->type->count_attribute_slots();
- /* From GL4.5 core spec, section 11.1.1 (Vertex Attributes):
- *
- * "A program with more than the value of MAX_VERTEX_ATTRIBS active
- * attribute variables may fail to link, unless device-dependent
- * optimizations are able to make the program fit within available
- * hardware resources. For the purposes of this test, attribute variables
- * of the type dvec3, dvec4, dmat2x3, dmat2x4, dmat3, dmat3x4, dmat4x3,
- * and dmat4 may count as consuming twice as many attributes as equivalent
- * single-precision types. While these types use the same number of
- * generic attributes as their single-precision equivalents,
- * implementations are permitted to consume two single-precision vectors
- * of internal storage for each three- or four-component double-precision
- * vector."
- * Until someone has a good reason in Mesa, enforce that now.
- */
- if (target_index == MESA_SHADER_VERTEX) {
- total_attribs_size += slots;
- if (var->type->without_array() == glsl_type::dvec3_type ||
- var->type->without_array() == glsl_type::dvec4_type ||
- var->type->without_array() == glsl_type::dmat2x3_type ||
- var->type->without_array() == glsl_type::dmat2x4_type ||
- var->type->without_array() == glsl_type::dmat3_type ||
- var->type->without_array() == glsl_type::dmat3x4_type ||
- var->type->without_array() == glsl_type::dmat4x3_type ||
- var->type->without_array() == glsl_type::dmat4_type)
- total_attribs_size += slots;
- }
-
/* If the variable is not a built-in and has a location statically
* assigned in the shader (presumably via a layout qualifier), make sure
* that it doesn't collide with other assigned locations. Otherwise,
@@ -2196,6 +2169,38 @@ assign_attribute_or_color_locations(gl_shader_program *prog,
}
used_locations |= (use_mask << attr);
+
+ /* From the GL 4.5 core spec, section 11.1.1 (Vertex Attributes):
+ *
+ * "A program with more than the value of MAX_VERTEX_ATTRIBS
+ * active attribute variables may fail to link, unless
+ * device-dependent optimizations are able to make the program
+ * fit within available hardware resources. For the purposes
+ * of this test, attribute variables of the type dvec3, dvec4,
+ * dmat2x3, dmat2x4, dmat3, dmat3x4, dmat4x3, and dmat4 may
+ * count as consuming twice as many attributes as equivalent
+ * single-precision types. While these types use the same number
+ * of generic attributes as their single-precision equivalents,
+ * implementations are permitted to consume two single-precision
+ * vectors of internal storage for each three- or four-component
+ * double-precision vector."
+ *
+ * Mark this attribute slot as taking up twice as much space
+ * so we can count it properly against limits. According to
+ * issue (3) of the GL_ARB_vertex_attrib_64bit behavior, this
+ * is optional behavior, but it seems preferable.
+ */
+ const glsl_type *type = var->type->without_array();
+ if (type == glsl_type::dvec3_type ||
+ type == glsl_type::dvec4_type ||
+ type == glsl_type::dmat2x3_type ||
+ type == glsl_type::dmat2x4_type ||
+ type == glsl_type::dmat3_type ||
+ type == glsl_type::dmat3x4_type ||
+ type == glsl_type::dmat4x3_type ||
+ type == glsl_type::dmat4_type) {
+ double_storage_locations |= (use_mask << attr);
+ }
}
continue;
@@ -2207,6 +2212,9 @@ assign_attribute_or_color_locations(gl_shader_program *prog,
}
if (target_index == MESA_SHADER_VERTEX) {
+ unsigned total_attribs_size =
+ _mesa_bitcount(used_locations & ((1 << max_index) - 1)) +
+ _mesa_bitcount(double_storage_locations);
if (total_attribs_size > max_index) {
linker_error(prog,
"attempt to use %d vertex attribute slots only %d available ",
commit fc654a37ea422ecbcbca1727513dc3c298221112
Author: Dave Airlie <airlied@gmail.com>
Date: Sun Apr 5 16:48:47 2015 +1000
mesa/teximage: use correct extension for accept stencil texture.
This was using the wrong extension, ARB_stencil_texturing
doesn't mention any changes in this area.
Fixes "dEQP-GLES3.functional.fbo.completeness.renderable.texture.
stencil.stencil_index8."
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90751
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit f7aad9da20b13c98f77d6a690b327716f39c0a47)
Nominated-by: Mark Janes <mark.a.janes@intel.com>
diff --git a/src/mesa/main/teximage.c b/src/mesa/main/teximage.c
index cc62b88..3a2eb45 100644
--- a/src/mesa/main/teximage.c
+++ b/src/mesa/main/teximage.c
@@ -222,7 +222,7 @@ _mesa_base_tex_format( struct gl_context *ctx, GLint internalFormat )
}
}
- if (ctx->Extensions.ARB_stencil_texturing) {
+ if (ctx->Extensions.ARB_texture_stencil8) {
switch (internalFormat) {
case GL_STENCIL_INDEX:
case GL_STENCIL_INDEX1:
commit 4f531da24b88661af8f49becb5296a78ec79ce54
Author: Emil Velikov <emil.l.velikov@gmail.com>
Date: Thu Sep 10 14:02:04 2015 +0100
Revert "i965: Momentarily pretend to support ARB_texture_stencil8 for blits."
This reverts commit 6811df8d3510c35899e992bae82c063e20e62cc8.
Erroneous nomination. See mailing list for details.
diff --git a/src/mesa/drivers/dri/i965/brw_meta_stencil_blit.c b/src/mesa/drivers/dri/i965/brw_meta_stencil_blit.c
index d079197..fc7018d 100644
--- a/src/mesa/drivers/dri/i965/brw_meta_stencil_blit.c
+++ b/src/mesa/drivers/dri/i965/brw_meta_stencil_blit.c
@@ -414,12 +414,6 @@ brw_meta_stencil_blit(struct brw_context *brw,
GLenum target;
_mesa_meta_fb_tex_blit_begin(ctx, &blit);
- /* XXX: Pretend to support stencil textures so _mesa_base_tex_format()
- * returns a valid format. When we properly support the extension, we
- * should remove this.
- */
- assert(ctx->Extensions.ARB_texture_stencil8 == false);
- ctx->Extensions.ARB_texture_stencil8 = true;
_mesa_GenFramebuffers(1, &fbo);
/* Force the surface to be configured for level zero. */
@@ -457,7 +451,6 @@ brw_meta_stencil_blit(struct brw_context *brw,
_mesa_DrawArrays(GL_TRIANGLE_FAN, 0, 4);
error:
- ctx->Extensions.ARB_texture_stencil8 = false;
_mesa_meta_fb_tex_blit_end(ctx, target, &blit);
_mesa_meta_end(ctx);
commit e3e2a3e0e581da39dcd9268951edb52f68916940
Author: Emil Velikov <emil.l.velikov@gmail.com>
Date: Fri Sep 4 23:05:47 2015 +0100
docs: add sha256 checksums for 10.6.6
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
diff --git a/docs/relnotes/10.6.6.html b/docs/relnotes/10.6.6.html
index 7acbdc7..eaf54c4 100644
--- a/docs/relnotes/10.6.6.html
+++ b/docs/relnotes/10.6.6.html
@@ -31,7 +31,8 @@ because compatibility contexts are not supported.
<h2>SHA256 checksums</h2>
<pre>
-TBD
+416517aa9df4791f97d34451a9e4da33c966afcd18c115c5769b92b15b018ef5 mesa-10.6.6.tar.gz
+570f2154b7340ff5db61ff103bc6e85165b8958798b78a50fa2df488e98e5778 mesa-10.6.6.tar.xz
</pre>
commit 4b05739e9d718a48415270b95c0a73b56666c364
Author: Emil Velikov <emil.l.velikov@gmail.com>
Date: Fri Sep 4 22:16:07 2015 +0100
docs: add release notes for 10.6.6
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
diff --git a/docs/relnotes/10.6.6.html b/docs/relnotes/10.6.6.html
new file mode 100644
index 0000000..7acbdc7
--- /dev/null
+++ b/docs/relnotes/10.6.6.html
@@ -0,0 +1,163 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd";>
+<html lang="en">
+<head>
+ <meta http-equiv="content-type" content="text/html; charset=utf-8">
+ <title>Mesa Release Notes</title>
+ <link rel="stylesheet" type="text/css" href="../mesa.css">
+</head>
+<body>
+
+<div class="header">
+ <h1>The Mesa 3D Graphics Library</h1>
+</div>
+
+<iframe src="../contents.html"></iframe>
+<div class="content">
+
+<h1>Mesa 10.6.6 Release Notes / September 04, 2015</h1>
+
+<p>
+Mesa 10.6.6 is a bug fix release which fixes bugs found since the 10.6.5 release.
+</p>
+<p>
+Mesa 10.6.6 implements the OpenGL 3.3 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 3.3. OpenGL
+3.3 is <strong>only</strong> available if requested at context creation
+because compatibility contexts are not supported.
+</p>
+
+
+<h2>SHA256 checksums</h2>
+<pre>
+TBD
+</pre>
+
+
+<h2>New features</h2>
+<p>None</p>
+
+<h2>Bug fixes</h2>
+
+<p>This list is likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84677";>Bug 84677</a> - Triangle disappears with glPolygonMode GL_LINE</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90734";>Bug 90734</a> - glBufferSubData is corrupting data when buffer is > 32k</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90748";>Bug 90748</a> - [BDW Bisected]dEQP-GLES3.functional.fbo.completeness.renderable.texture.depth.rg_half_float_oes fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90902";>Bug 90902</a> - [bsw][regression] dEQP: "Found invalid pixel values"</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90925";>Bug 90925</a> - "high fidelity": Segfault in _mesa_program_resource_find_name</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91254";>Bug 91254</a> - (regresion) video using VA-API on Intel slow and freeze system with mesa 10.6 or 10.6.1</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91292";>Bug 91292</a> - [BDW+] glVertexAttribDivisor not working in combination with glPolygonMode</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91673";>Bug 91673</a> - Segfault when calling glTexSubImage2D on storage texture to bound FBO</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91726";>Bug 91726</a> - R600 asserts in tgsi_cmp/make_src_for_op3</li>
+
+</ul>
+
+
+<h2>Changes</h2>
+
+<p>Chris Wilson (2):</p>
+<ul>
+ <li>i965: Prevent coordinate overflow in intel_emit_linear_blit</li>
+ <li>i965: Always re-emit the pipeline select during invariant state emission</li>
+</ul>
+
+<p>Daniel Scharrer (1):</p>
+<ul>
+ <li>mesa: add missing queries for ARB_direct_state_access</li>
+</ul>
+
+<p>Dave Airlie (8):</p>
+<ul>
+ <li>mesa/arb_gpu_shader_fp64: add support for glGetUniformdv</li>
+ <li>mesa/texgetimage: fix missing stencil check</li>
+ <li>st/readpixels: fix accel path for skipimages.</li>
+ <li>texcompress_s3tc/fxt1: fix stride checks (v1.1)</li>
+ <li>mesa/readpixels: check strides are equal before skipping conversion</li>
+ <li>mesa: enable texture stencil8 for multisample</li>
+ <li>r600/sb: update last_cf for finalize if.</li>
+ <li>r600g: fix calculation for gpr allocation</li>
+</ul>
+
+<p>David Heidelberg (1):</p>
+<ul>
+ <li>st/nine: Require gcc >= 4.6</li>
+</ul>
+
+<p>Emil Velikov (2):</p>
+<ul>
+ <li>docs: add sha256 checksums for 10.6.5</li>
+ <li>get-pick-list.sh: Require explicit "10.6" for nominating stable patches</li>
+</ul>
+
+<p>Glenn Kennard (4):</p>
+<ul>
+ <li>r600g: Fix assert in tgsi_cmp</li>
+ <li>r600g/sb: Handle undef in read port tracker</li>
+ <li>r600g/sb: Don't read junk after EOP</li>
+ <li>r600g/sb: Don't crash on empty if jump target</li>
+</ul>
+
+<p>Ilia Mirkin (5):</p>
+<ul>
+ <li>st/mesa: fix assignments with 4-operand arguments (i.e. BFI)</li>
+ <li>st/mesa: pass through 4th opcode argument in bitmap/pixel visitors</li>
+ <li>nv50,nvc0: disable depth bounds test on blit</li>
+ <li>nv50: fix 2d engine blits for 64- and 128-bit formats</li>
+ <li>mesa: only copy the requested teximage faces</li>
+</ul>
+
+<p>Jason Ekstrand (1):</p>
+<ul>
+ <li>i965/fs: Split VGRFs after lowering pull constants</li>
+</ul>
+
+<p>Kenneth Graunke (3):</p>
+<ul>
+ <li>i965: Fix copy propagation type changes.</li>
+ <li>Revert "i965: Advertise a line width of 40.0 on Cherryview and Skylake."</li>
+ <li>i965: Momentarily pretend to support ARB_texture_stencil8 for blits.</li>
+</ul>
+
+<p>Marek Olšák (3):</p>
+<ul>
+ <li>gallium/radeon: fix the ADDRESS_HI mask for EVENT_WRITE CIK packets</li>
+ <li>mesa: create multisample fallback textures like normal textures</li>
+ <li>radeonsi: fix a Unigine Heaven hang when drirc is missing</li>
+</ul>
+
+<p>Matt Turner (1):</p>
+<ul>
+ <li>i965/fs: Handle MRF destinations in lower_integer_multiplication().</li>
+</ul>
+
+<p>Neil Roberts (2):</p>
+<ul>
+ <li>i965: Swap the order of the vertex ID and edge flag attributes</li>
+ <li>i965/bdw: Fix 3DSTATE_VF_INSTANCING when the edge flag is used</li>
+</ul>
+
+<p>Tapani Pälli (5):</p>
+<ul>
+ <li>mesa: update fbo state in glTexStorage</li>
+ <li>glsl: build stageref mask using IR, not symbol table</li>
+ <li>glsl: expose build_program_resource_list function</li>
+ <li>glsl: create program resource list after LinkShader</li>
+ <li>mesa: add GL_RED, GL_RG support for floating point textures</li>
+</ul>
+
+
+</div>
+</body>
+</html>
commit 67ba1b714ad220eec5fa28d32d9bcf262bc95303
Author: Emil Velikov <emil.l.velikov@gmail.com>
Date: Fri Sep 4 22:35:55 2015 +0100
Update version to 10.6.6
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
diff --git a/VERSION b/VERSION
index cac93e5..77fbf87 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-10.6.5
+10.6.6
commit 6811df8d3510c35899e992bae82c063e20e62cc8
Author: Kenneth Graunke <kenneth@whitecape.org>
Date: Tue Jun 9 14:33:47 2015 -0700
i965: Momentarily pretend to support ARB_texture_stencil8 for blits.
Broadwell's stencil blitting code attempts to bind a renderbuffer as a
texture, using dd->BindRenderbufferTexImage().
This calls _mesa_init_teximage_fields(), which then attempts to set
img->_BaseFormat = _mesa_base_tex_format(ctx, internalFormat), which
assert fails if internalFormat is GL_STENCIL_INDEX8 but
ARB_texture_stencil8 is unsupported.
To work around this, just pretend to support the extension momentarily,
during the blit. Meta has already munged a variety of other things in
the context (including the API!), so it's not that much worse than what
we're already doing.
Fixes regressions since commit f7aad9da20b13c98f77d6a690b327716f39c0a47
(mesa/teximage: use correct extension for accept stencil texture.).
v2: Add an XXX comment explaining the situation (requested by Jason
Ekstrand and Martin Peres), and an assert that we don't support
the extension so we remember to remove this hack (requested by
Neil Roberts).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
(cherry picked from commit f83b9e58f6e8a748def367c7d523eb7285b1aeb7)
Nominated-by: Mark Janes <mark.a.janes@intel.com>
diff --git a/src/mesa/drivers/dri/i965/brw_meta_stencil_blit.c b/src/mesa/drivers/dri/i965/brw_meta_stencil_blit.c
index fc7018d..d079197 100644
--- a/src/mesa/drivers/dri/i965/brw_meta_stencil_blit.c
+++ b/src/mesa/drivers/dri/i965/brw_meta_stencil_blit.c
@@ -414,6 +414,12 @@ brw_meta_stencil_blit(struct brw_context *brw,
GLenum target;
_mesa_meta_fb_tex_blit_begin(ctx, &blit);
+ /* XXX: Pretend to support stencil textures so _mesa_base_tex_format()
+ * returns a valid format. When we properly support the extension, we
+ * should remove this.
+ */
+ assert(ctx->Extensions.ARB_texture_stencil8 == false);
+ ctx->Extensions.ARB_texture_stencil8 = true;
_mesa_GenFramebuffers(1, &fbo);
/* Force the surface to be configured for level zero. */
@@ -451,6 +457,7 @@ brw_meta_stencil_blit(struct brw_context *brw,
_mesa_DrawArrays(GL_TRIANGLE_FAN, 0, 4);
error:
+ ctx->Extensions.ARB_texture_stencil8 = false;
_mesa_meta_fb_tex_blit_end(ctx, target, &blit);
_mesa_meta_end(ctx);
commit cab11e0f73ad8e3ac42297621b1b49ea9724aabb
Author: Tapani Pälli <tapani.palli@intel.com>
Date: Tue Jun 9 12:26:48 2015 +0300
mesa: add GL_RED, GL_RG support for floating point textures
Mesa supports EXT_texture_rg and OES_texture_float. This patch adds
support for using unsized enums GL_RED and GL_RG for floating point
targets and writes proper checks for internalformat when format is
GL_RED or GL_RG and type is of GL_FLOAT or GL_HALF_FLOAT.
Later, internalformat will get adjusted by adjust_for_oes_float_texture
after these checks.
v2: simplify to check vs supported enums
v3: follow the style and break out if internalFormat ok (Kenneth)
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90748
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 5b0d6f5c1bc3f7bd37c6efebf48f80ca6ff3ef87)
Nominated-by: Mark Janes <mark.a.janes@intel.com>
diff --git a/src/mesa/main/glformats.c b/src/mesa/main/glformats.c
index 4fc85ab..3374637 100644
--- a/src/mesa/main/glformats.c
+++ b/src/mesa/main/glformats.c
@@ -2292,8 +2292,18 @@ _mesa_es3_error_check_format_and_type(const struct gl_context *ctx,
break;
case GL_HALF_FLOAT:
- if (internalFormat != GL_RG16F)
- return GL_INVALID_OPERATION;
+ case GL_HALF_FLOAT_OES:
+ switch (internalFormat) {
+ case GL_RG16F:
+ break;
+ case GL_RG:
+ if (ctx->Extensions.ARB_texture_rg &&
+ ctx->Extensions.OES_texture_half_float)
+ break;
+ /* fallthrough */
+ default:
+ return GL_INVALID_OPERATION;
+ }
break;
case GL_FLOAT:
@@ -2301,6 +2311,11 @@ _mesa_es3_error_check_format_and_type(const struct gl_context *ctx,
case GL_RG16F:
case GL_RG32F:
break;
+ case GL_RG:
+ if (ctx->Extensions.ARB_texture_rg &&
+ ctx->Extensions.OES_texture_float)
+ break;
+ /* fallthrough */
default:
return GL_INVALID_OPERATION;
}
@@ -2361,8 +2376,19 @@ _mesa_es3_error_check_format_and_type(const struct gl_context *ctx,
break;
case GL_HALF_FLOAT:
- if (internalFormat != GL_R16F)
+ case GL_HALF_FLOAT_OES:
+ switch (internalFormat) {
+ case GL_R16F:
+ break;
+ case GL_RG:
+ case GL_RED:
+ if (ctx->Extensions.ARB_texture_rg &&
+ ctx->Extensions.OES_texture_half_float)
+ break;
+ /* fallthrough */
+ default:
return GL_INVALID_OPERATION;
+ }
break;
case GL_FLOAT:
@@ -2370,6 +2396,11 @@ _mesa_es3_error_check_format_and_type(const struct gl_context *ctx,
case GL_R16F:
case GL_R32F:
break;
+ case GL_RED:
+ if (ctx->Extensions.ARB_texture_rg &&
+ ctx->Extensions.OES_texture_float)
+ break;
+ /* fallthrough */
default:
return GL_INVALID_OPERATION;
}
commit 0639ada6753ca23b33ee34dbc8fc92c8b68b605e
Author: Kenneth Graunke <kenneth@whitecape.org>
Date: Tue Jun 9 09:20:58 2015 -0700
Revert "i965: Advertise a line width of 40.0 on Cherryview and Skylake."
This reverts commit f3b709c0ac073cd0ec90a3a0d91d1ee94668e043.
The "dEQP-GLES3.functional.rasterization.fbo.rbo_multisample_4.
interpolation.lines_wide" test appears to be broken on Cherryview when
we expose line widths greater than 12.0. I'm not sure why.
For now, just go back to the limits we used on older platforms.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90902
Acked-by: Matt Turner <mattst88@gmail.com>
(cherry picked from commit 16658f426dbd81fcbc317b21ae9a3f7c9b6448fb)
Nominated-by: Mark Janes <mark.a.janes@intel.com>
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index 492b62d..781a634 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -428,11 +428,7 @@ brw_initialize_context_constants(struct brw_context *brw)
ctx->Const.MinLineWidth = 1.0;
ctx->Const.MinLineWidthAA = 1.0;
- if (brw->gen >= 9 || brw->is_cherryview) {
- ctx->Const.MaxLineWidth = 40.0;
- ctx->Const.MaxLineWidthAA = 40.0;
- ctx->Const.LineWidthGranularity = 0.125;
- } else if (brw->gen >= 6) {
+ if (brw->gen >= 6) {
ctx->Const.MaxLineWidth = 7.375;
ctx->Const.MaxLineWidthAA = 7.375;
ctx->Const.LineWidthGranularity = 0.125;
commit e5861dab85ca12286f707c54f07f572a6452a84d
Author: Kenneth Graunke <kenneth@whitecape.org>
Date: Wed Sep 2 16:39:27 2015 -0700
i965: Fix copy propagation type changes.
commit 472ef9a02f2e5c5d0caa2809cb736a0f4f0d4693 introduced code to
change the types of SEL and MOV instructions for moves that simply
"copy bits around". It didn't account for type conversion moves,
however. So it would happily turn this:
mov(8) vgrf6:D, -vgrf5:D
mov(8) vgrf7:F, vgrf6:UD
into this:
mov(8) vgrf6:D, -vgrf5:D
mov(8) vgrf7:D, -vgrf5:D
which erroneously drops the conversion to float.
Cc: "11.0 10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
(cherry picked from commit 2ace64fd598816fd1be9877962734242fc27b87b)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp b/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
index c92aae4..6a6c3f9 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
@@ -279,6 +279,7 @@ static bool
can_change_source_types(fs_inst *inst)
{
return !inst->src[0].abs && !inst->src[0].negate &&
+ inst->dst.type == inst->src[0].type &&
(inst->opcode == BRW_OPCODE_MOV ||
(inst->opcode == BRW_OPCODE_SEL &&
inst->predicate != BRW_PREDICATE_NONE &&
commit 34d34076ff9e2ed3aeb5d5df4685d44d5c7b4b8f
Author: Matt Turner <mattst88@gmail.com>
Date: Wed Sep 2 12:49:08 2015 -0700
i965/fs: Handle MRF destinations in lower_integer_multiplication().
The lowered code reads from the destination, which isn't possible from
message registers.
Fixes the following dEQP tests on SNB:
dEQP-GLES3.functional.shaders.precision.int.highp_mul_fragment
dEQP-GLES3.functional.shaders.precision.int.mediump_mul_fragment
dEQP-GLES3.functional.shaders.precision.int.lowp_mul_fragment
Cc: "10.6 11.0" <mesa-stable@lists.freedesktop.org>
Tested-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
(cherry picked from commit 9390cb84593bda516e8c1521c87a08475574d1be)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 6790a5e..bbf9c23 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -3607,7 +3607,8 @@ fs_visitor::lower_integer_multiplication()
* schedule multi-component multiplications much better.
*/
- if (inst->conditional_mod && inst->dst.is_null()) {
+ fs_reg orig_dst = inst->dst;
+ if (orig_dst.is_null() || orig_dst.file == MRF) {
inst->dst = fs_reg(GRF, alloc.allocate(dispatch_width / 8),
inst->dst.type, dispatch_width);
}
@@ -3673,9 +3674,8 @@ fs_visitor::lower_integer_multiplication()
insert(ADD(dst, low, high));
- if (inst->conditional_mod) {
- fs_reg null(retype(brw_null_reg(), inst->dst.type));
- fs_inst *mov = MOV(null, inst->dst);
+ if (inst->conditional_mod || orig_dst.file == MRF) {
+ fs_inst *mov = MOV(orig_dst, inst->dst);
mov->conditional_mod = inst->conditional_mod;
insert(mov);
}
commit b0bce4c7831ffb1706fbbc51dc23cefd51022692
Author: Marek Olšák <marek.olsak@amd.com>
Date: Sat Aug 29 22:59:23 2015 +0200
radeonsi: fix a Unigine Heaven hang when drirc is missing
Cc: 10.6 11.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
(cherry picked from commit 9b510a9652297a63677f1d55b2bf444694fd94e1)
Conflicts:
src/gallium/drivers/radeonsi/si_shader.h
src/gallium/drivers/radeonsi/si_state_shaders.c
diff --git a/src/gallium/drivers/radeonsi/si_shader.h b/src/gallium/drivers/radeonsi/si_shader.h
index 9e0b2ec..850e704 100644
--- a/src/gallium/drivers/radeonsi/si_shader.h
+++ b/src/gallium/drivers/radeonsi/si_shader.h
@@ -116,6 +116,7 @@ struct si_shader_selector {
unsigned gs_output_prim;
unsigned gs_max_out_vertices;
uint64_t gs_used_inputs; /* mask of "get_unique_index" bits */
+ uint32_t ps_colors_written;
};
union si_shader_key {
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 4d38a32..a673ada 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -29,6 +29,7 @@
#include "sid.h"
#include "radeon/r600_cs.h"
+#include "util/u_dual_blend.h"
#include "util/u_format.h"
#include "util/u_format_s3tc.h"
#include "util/u_memory.h"
@@ -218,8 +219,10 @@ static unsigned si_pack_float_12p4(float x)
* - The COLOR1 format isn't INVALID because of possible dual-source blending,
* so COLOR1 is enabled pretty much all the time.
* So CB_TARGET_MASK is the only register that can disable COLOR1.
+ *
+ * Another reason is to avoid a hang with dual source blending.
*/
-static void si_update_fb_blend_state(struct si_context *sctx)
+void si_update_fb_blend_state(struct si_context *sctx)
{
struct si_pm4_state *pm4;
struct si_state_blend *blend = sctx->queued.named.blend;
@@ -237,6 +240,16 @@ static void si_update_fb_blend_state(struct si_context *sctx)
mask |= 0xf << (4*i);
mask &= blend->cb_target_mask;
+ /* Avoid a hang that happens when dual source blending is enabled
+ * but there is not enough color outputs. This is undefined behavior,
+ * so disable color writes completely.
+ *
+ * Reproducible with Unigine Heaven 4.0 and drirc missing.
+ */
+ if (blend->dual_src_blend &&
+ (sctx->ps_shader->ps_colors_written & 0x3) != 0x3)
+ mask = 0;
+
si_pm4_set_reg(pm4, R_028238_CB_TARGET_MASK, mask);
si_pm4_set_state(sctx, fb_blend, pm4);
}
@@ -328,6 +341,7 @@ static void *si_create_blend_state_mode(struct pipe_context *ctx,
return NULL;
blend->alpha_to_one = state->alpha_to_one;
+ blend->dual_src_blend = util_blend_state_is_dual(state, 0);
if (state->logicop_enable) {
color_control |= S_028808_ROP3(state->logicop_func | (state->logicop_func << 4));
diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h
index b549913..940c4d7 100644
--- a/src/gallium/drivers/radeonsi/si_state.h
+++ b/src/gallium/drivers/radeonsi/si_state.h
@@ -39,6 +39,7 @@ struct si_state_blend {
struct si_pm4_state pm4;
uint32_t cb_target_mask;
bool alpha_to_one;
+ bool dual_src_blend;
};
struct si_state_sample_mask {
@@ -247,6 +248,7 @@ void si_shader_change_notify(struct si_context *sctx);
/* si_state.c */
struct si_shader_selector;
+void si_update_fb_blend_state(struct si_context *sctx);
boolean si_is_format_supported(struct pipe_screen *screen,
enum pipe_format format,
enum pipe_texture_target target,
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index d86e2dc..78ae7b4 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -493,6 +493,16 @@ static void *si_create_shader_state(struct pipe_context *ctx,
1llu << si_shader_io_get_unique_index(name, index);
}
}
+ break;
+ case PIPE_SHADER_FRAGMENT:
+ for (i = 0; i < sel->info.num_outputs; i++) {
+ unsigned name = sel->info.output_semantic_name[i];
+ unsigned index = sel->info.output_semantic_index[i];
+
+ if (name == TGSI_SEMANTIC_COLOR)
+ sel->ps_colors_written |= 1 << index;
+ }
+ break;
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