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Bug#757435: marked as done (/usr/lib/x86_64-linux-gnu/dri/i965_dri.so: i965 crashes in glClear in DRI3 mode with stencil(?) enabled)

Your message dated Mon, 31 Aug 2015 17:08:35 +0200
with message-id <CACiKqBeZG5Fi5rb5QqnM1_mZ5=d1WT5cZuB1daZ=_WvFHmaCSw@mail.gmail.com>
and subject line Close bug #757435
has caused the Debian Bug report #757435,
regarding /usr/lib/x86_64-linux-gnu/dri/i965_dri.so: i965 crashes in glClear in DRI3 mode with stencil(?) enabled
to be marked as done.

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If this is not the case it is now your responsibility to reopen the
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-- 
757435: http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=757435
Debian Bug Tracking System
Contact owner@bugs.debian.org with problems
--- Begin Message --- 
Package: libgl1-mesa-dri
Version: 10.2.4-1
Severity: normal
File: /usr/lib/x86_64-linux-gnu/dri/i965_dri.so

Dear Maintainer,

google chrome GPU process crashes in glClear when running  DRII3 i965 in
DRI3 mode.

#0  get_stencil_miptree (irb=<optimized out>) at
../../../../../../../src/mesa/drivers/dri/i965/brw_misc_state.c:225
#1  brw_workaround_depthstencil_alignment (brw=brw@entry=0x2f62b8b61028,
clear_mask=clear_mask@entry=50)
at ../../../../../../../src/mesa/drivers/dri/i965/brw_misc_state.c:241
#2  0x00007f7b6b941170 in brw_clear (ctx=0x2f62b8b61028, mask=50) at
../../../../../../../src/mesa/drivers/dri/i965/brw_clear.c:235


Dump of assembler code for function brw_workaround_depthstencil_alignment:
   0x00007f7b6b989a20 <+0>:	push   %r15
   0x00007f7b6b989a22 <+2>:	push   %r14
   0x00007f7b6b989a24 <+4>:	push   %r13
   0x00007f7b6b989a26 <+6>:	push   %r12
   0x00007f7b6b989a28 <+8>:	push   %rbp
   0x00007f7b6b989a29 <+9>:	push   %rbx
   0x00007f7b6b989a2a <+10>:	sub    $0x38,%rsp
   0x00007f7b6b989a2e <+14>:	mov    0xe8(%rdi),%rax
   0x00007f7b6b989a35 <+21>:	mov    0x1c0(%rax),%r12
   0x00007f7b6b989a3c <+28>:	test   %r12,%r12
   0x00007f7b6b989a3f <+31>:	je     0x7f7b6b989a50 <brw_workaround_depthstencil_alignment+48>
   0x00007f7b6b989a41 <+33>:	cmpl   $0x12345678,0x28(%r12)
   0x00007f7b6b989a4a <+42>:	je     0x7f7b6b989e90 <brw_workaround_depthstencil_alignment+1136>
   0x00007f7b6b989a50 <+48>:	mov    0x1e8(%rax),%rbp
   0x00007f7b6b989a57 <+55>:	test   %rbp,%rbp
   0x00007f7b6b989a5a <+58>:	je     0x7f7b6b98a484 <brw_workaround_depthstencil_alignment+2660>
   0x00007f7b6b989a60 <+64>:	xor    %r12d,%r12d
   0x00007f7b6b989a63 <+67>:	cmpl   $0x12345678,0x28(%rbp)
   0x00007f7b6b989a6a <+74>:	je     0x7f7b6b989ad8 <brw_workaround_depthstencil_alignment+184>
   0x00007f7b6b989a6c <+76>:	xor    %ebp,%ebp
   0x00007f7b6b989a6e <+78>:	xor    %r15d,%r15d
   0x00007f7b6b989a71 <+81>:	movl   $0x0,0x20(%rsp)
   0x00007f7b6b989a79 <+89>:	movl   $0x0,0x24(%rsp)
   0x00007f7b6b989a81 <+97>:	movl   $0x0,0x25cdc(%rdi)
   0x00007f7b6b989a8b <+107>:	movl   $0x0,0x25ce0(%rdi)
   0x00007f7b6b989a95 <+117>:	xor    %r12d,%r12d
   0x00007f7b6b989a98 <+120>:	movl   $0x0,0x25cd0(%rdi)
   0x00007f7b6b989aa2 <+130>:	movl   $0x0,0x25cd8(%rdi)
   0x00007f7b6b989aac <+140>:	xor    %r14d,%r14d
   0x00007f7b6b989aaf <+143>:	movl   $0x0,0x25cd4(%rdi)
   0x00007f7b6b989ab9 <+153>:	movq   $0x0,0x25cc0(%rdi)
   0x00007f7b6b989ac4 <+164>:	movq   $0x0,0x25cc8(%rdi)
   0x00007f7b6b989acf <+175>:	jmpq   0x7f7b6b989b52 <brw_workaround_depthstencil_alignment+306>
   0x00007f7b6b989ad4 <+180>:	nopl   0x0(%rax)
   0x00007f7b6b989ad8 <+184>:	mov    0x88(%rbp),%rax
   0x00007f7b6b989adf <+191>:	movl   $0x0,0x20(%rsp)
   0x00007f7b6b989ae7 <+199>:	movl   $0x0,0x24(%rsp)
=> 0x00007f7b6b989aef <+207>:	mov    0x200(%rax),%r15

info registers 
rax            0x0	0
rbx            0x2f62b8b61028	52101052239912
rcx            0x0	0
rdx            0x1	1
rsi            0x32	50
rdi            0x2f62b8b61028	52101052239912
rbp            0x2f62b8b0c210	0x2f62b8b0c210
rsp            0x7fff55808710	0x7fff55808710
r8             0xc0ff	49407
r9             0x1	1
r10            0x0	0
r11            0x0	0
r12            0x2f62b8b0c210	52101051892240
r13            0x2f62b9c3e680	52101069923968
r14            0x0	0
r15            0x7f7b7f3e6e00	140168392502784
rip            0x7f7b6b989aef	0x7f7b6b989aef <brw_workaround_depthstencil_alignment+207>
eflags         0x10246	[ PF ZF IF RF ]
cs             0x33	51
ss             0x2b	43
ds             0x0	0
es             0x0	0
fs             0x0	0
gs             0x0	0


rax is zero that means irb->mt is a null pointer. DRI2 mode works without
problems.

workaround:
export LIBGL_DRI3_DISABLE=1

-- System Information:
Debian Release: jessie/sid
  APT prefers unstable
  APT policy: (500, 'unstable'), (500, 'testing'), (1, 'experimental')
Architecture: amd64 (x86_64)
Foreign Architectures: i386

Kernel: Linux 3.14-2-amd64 (SMP w/4 CPU cores)
Locale: LANG=en_GB.UTF-8, LC_CTYPE=en_GB.UTF-8 (charmap=UTF-8)
Shell: /bin/sh linked to /bin/dash

Versions of packages libgl1-mesa-dri:amd64 depends on:
ii  libc6              2.19-7
ii  libdrm-intel1      2.4.54-1
ii  libdrm-nouveau2    2.4.54-1
ii  libdrm-radeon1     2.4.54-1
ii  libdrm2            2.4.54-1
ii  libelf1            0.159-4
ii  libexpat1          2.1.0-6
ii  libffi6            3.1-2
ii  libgcc1            1:4.9.1-4
ii  libllvm3.4         1:3.4.2-6
ii  libstdc++6         4.9.1-4
ii  libtinfo5          5.9+20140712-2
ii  multiarch-support  2.19-7

depends to enable DRI3:
ii  xserver-xorg-video-intel  2:2.99.914-1~exp1 

Versions of packages libgl1-mesa-dri:amd64 recommends:
ii  libtxc-dxtn-s2tc0 [libtxc-dxtn0]  0~git20131104-1.1

Versions of packages libgl1-mesa-dri:amd64 suggests:
pn  libglide3  <none>

-- no debconf information

--- End Message ---
--- Begin Message --- 
The upstream bugtracker [1] has marked this bug as resolved.
Closing here as well.
Feel free to reopen if this still doesn't work for you.

https://bugs.freedesktop.org/show_bug.cgi?id=77402

--- End Message ---
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