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xserver-xorg-video-intel: Changes to 'ubuntu-trusty'



 debian/changelog                                             |    7 
 debian/patches/series                                        |    1 
 debian/patches/sna-mark-the-chv-vsync-method-as-unknown.diff |   79 +++++++++++
 3 files changed, 87 insertions(+)

New commits:
commit 74fc25242ee851cddbd9f8281ca8ab0c855cdb2e
Author: Timo Aaltonen <tjaalton@debian.org>
Date:   Fri Apr 17 08:02:56 2015 +0300

    sna-mark-the-chv-vsync-method-as-unknown.diff: Fix video playback on CHV. (LP: #1445221)

diff --git a/debian/changelog b/debian/changelog
index 9173a6c..c451dc3 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,3 +1,10 @@
+xserver-xorg-video-intel (2:2.99.910-0ubuntu1.6) trusty-proposed; urgency=medium
+
+  * sna-mark-the-chv-vsync-method-as-unknown.diff: Fix video playback
+    on CHV. (LP: #1445221)
+
+ -- Timo Aaltonen <tjaalton@debian.org>  Fri, 17 Apr 2015 08:00:47 +0300
+
 xserver-xorg-video-intel (2:2.99.910-0ubuntu1.5) trusty-proposed; urgency=medium
 
   * bdw-annotate-more-64bit-pointer-locations.diff
diff --git a/debian/patches/series b/debian/patches/series
index d59c64f..936f609 100644
--- a/debian/patches/series
+++ b/debian/patches/series
@@ -28,3 +28,4 @@ sna-add-more-checks-and-asserts-for-blt.diff
 fix-sna-external-slave-rotation.patch
 bdw-annotate-more-64bit-pointer-locations.diff
 bdw-clamp-urb-allocations-for-gt3.diff
+sna-mark-the-chv-vsync-method-as-unknown.diff
diff --git a/debian/patches/sna-mark-the-chv-vsync-method-as-unknown.diff b/debian/patches/sna-mark-the-chv-vsync-method-as-unknown.diff
new file mode 100644
index 0000000..1e90381
--- /dev/null
+++ b/debian/patches/sna-mark-the-chv-vsync-method-as-unknown.diff
@@ -0,0 +1,79 @@
+commit 2afeef0c3ffeae768198fc08c9f365ccd28b7f5d
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date:   Thu May 15 11:28:48 2014 +0100
+
+    sna: Mark the CHV vsync method as unknown
+    
+    Similar to the story with Baytrail, vsync is a lost art.
+    
+    Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+--- a/src/sna/sna_display.c
++++ b/src/sna/sna_display.c
+@@ -4209,52 +4209,6 @@ static bool sna_emit_wait_for_scanline_h
+ 	return true;
+ }
+ 
+-static bool sna_emit_wait_for_scanline_vlv(struct sna *sna,
+-					   xf86CrtcPtr crtc,
+-					   int pipe, int y1, int y2,
+-					   bool full_height)
+-{
+-	uint32_t display_base = 0x180000;
+-	uint32_t event;
+-	uint32_t *b;
+-
+-	return false; /* synchronisation? I've heard of that */
+-
+-	if (!sna->kgem.has_secure_batches)
+-		return false;
+-
+-	assert(y1 >= 0);
+-	assert(y2 > y1);
+-	assert(sna->kgem.mode);
+-
+-	/* Always program one less than the desired value */
+-	if (--y1 < 0)
+-		y1 = crtc->bounds.y2;
+-	y2--;
+-
+-	b = kgem_get_batch(&sna->kgem);
+-	sna->kgem.nbatch += 4;
+-
+-	if (pipe == 0) {
+-		if (full_height)
+-			event = MI_WAIT_FOR_PIPEA_SVBLANK;
+-		else
+-			event = MI_WAIT_FOR_PIPEA_SCAN_LINE_WINDOW;
+-	} else {
+-		if (full_height)
+-			event = MI_WAIT_FOR_PIPEB_SVBLANK;
+-		else
+-			event = MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW;
+-	}
+-	b[0] = MI_LOAD_REGISTER_IMM | 1;
+-	b[1] = display_base + 0x70004 + 0x1000 * pipe;
+-	b[2] = (1 << 31) | (y1 << 16) | y2;
+-	b[3] = MI_WAIT_FOR_EVENT | event;
+-
+-	sna->kgem.batch_flags |= I915_EXEC_SECURE;
+-	return true;
+-}
+-
+ static bool sna_emit_wait_for_scanline_ivb(struct sna *sna,
+ 					   xf86CrtcPtr crtc,
+ 					   int pipe, int y1, int y2,
+@@ -4472,10 +4426,12 @@ sna_wait_for_scanline(struct sna *sna,
+ 
+ 	if (sna->kgem.gen >= 0110)
+ 		ret = false;
++	else if (sna->kgem.gen == 0101)
++		ret = false; /* chv, vsync method unknown */
+ 	else if (sna->kgem.gen >= 075)
+ 		ret = sna_emit_wait_for_scanline_hsw(sna, crtc, pipe, y1, y2, full_height);
+ 	else if (sna->kgem.gen == 071)
+-		ret = sna_emit_wait_for_scanline_vlv(sna, crtc, pipe, y1, y2, full_height);
++		ret = false; /* vlv, vsync method unknown */
+ 	else if (sna->kgem.gen >= 070)
+ 		ret = sna_emit_wait_for_scanline_ivb(sna, crtc, pipe, y1, y2, full_height);
+ 	else if (sna->kgem.gen >= 060)


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