mesa: Changes to 'debian-experimental'
VERSION | 2
debian/changelog | 4
docs/relnotes/10.4.1.html | 4
docs/relnotes/10.4.2.html | 125 ++++++++++
src/gallium/auxiliary/util/u_cpu_detect.c | 8
src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp | 3
src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 3
src/gallium/drivers/nouveau/nv50/nv50_3d.xml.h | 2
src/gallium/drivers/nouveau/nv50/nv50_screen.c | 9
src/gallium/drivers/nouveau/nv50/nv50_state.c | 9
src/gallium/drivers/nouveau/nv50/nv50_stateobj.h | 2
src/gallium/drivers/nouveau/nv50/nv50_vbo.c | 8
src/gallium/drivers/nouveau/nvc0/mme/com9097.mme | 7
src/gallium/drivers/nouveau/nvc0/mme/com9097.mme.h | 12
src/gallium/drivers/nouveau/nvc0/nvc0_3d.xml.h | 2
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 2
src/gallium/drivers/nouveau/nvc0/nvc0_state.c | 4
src/gallium/drivers/nouveau/nvc0/nvc0_stateobj.h | 2
src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c | 8
src/gallium/drivers/r600/r600_shader.c | 2
src/gallium/drivers/r600/sb/sb_bc.h | 2
src/gallium/drivers/r600/sb/sb_bc_finalize.cpp | 109 +++++---
src/gallium/drivers/r600/sb/sb_bc_parser.cpp | 2
src/gallium/drivers/r600/sb/sb_context.cpp | 2
src/gallium/drivers/r600/sb/sb_if_conversion.cpp | 4
src/gallium/drivers/r600/sb/sb_ir.h | 9
src/gallium/drivers/r600/sb/sb_pass.h | 5
src/gallium/drivers/r600/sb/sb_sched.cpp | 3
src/gallium/drivers/radeonsi/si_shader.c | 7
src/gallium/drivers/radeonsi/si_state.c | 6
src/mesa/drivers/dri/i965/brw_context.h | 7
src/mesa/drivers/dri/i965/brw_draw.c | 15 -
src/mesa/drivers/dri/i965/brw_draw_upload.c | 12
src/mesa/drivers/dri/i965/brw_performance_monitor.c | 2
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 8
src/mesa/drivers/dri/i965/intel_tex_subimage.c | 7
src/mesa/state_tracker/st_draw.c | 3
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 3
src/mesa/vbo/vbo_exec_array.c | 3
39 files changed, 312 insertions(+), 115 deletions(-)
New commits:
commit eb20f2280accadd2db19abef42ea97fec0ac6ddd
Author: Timo Aaltonen <tjaalton@debian.org>
Date: Tue Jan 13 15:23:49 2015 +0200
releasing package mesa version 10.4.2-1
diff --git a/debian/changelog b/debian/changelog
index 181f843..08fb74e 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,11 +1,11 @@
-mesa (10.4.1-1) UNRELEASED; urgency=medium
+mesa (10.4.2-1) experimental; urgency=medium
* New upstream release.
* control, rules, libopenvg*, libgbm1, libegl1-mesa-drivers:
Drop EGL/GBM state trackers and OpenVG.
* control: Make libegl1-mesa-drivers transitional.
- -- Timo Aaltonen <tjaalton@debian.org> Thu, 08 Jan 2015 14:47:42 +0200
+ -- Timo Aaltonen <tjaalton@debian.org> Tue, 13 Jan 2015 13:43:51 +0200
mesa (10.3.2-1) unstable; urgency=medium
commit 02f2e97c3ee4a10696bfce79b6299d478bb6e59a
Author: Emil Velikov <emil.l.velikov@gmail.com>
Date: Mon Jan 12 10:30:28 2015 +0000
Add release notes for the 10.4.2 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
diff --git a/docs/relnotes/10.4.2.html b/docs/relnotes/10.4.2.html
new file mode 100644
index 0000000..84813a5
--- /dev/null
+++ b/docs/relnotes/10.4.2.html
@@ -0,0 +1,125 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd";>
+<html lang="en">
+<head>
+ <meta http-equiv="content-type" content="text/html; charset=utf-8">
+ <title>Mesa Release Notes</title>
+ <link rel="stylesheet" type="text/css" href="../mesa.css">
+</head>
+<body>
+
+<div class="header">
+ <h1>The Mesa 3D Graphics Library</h1>
+</div>
+
+<iframe src="../contents.html"></iframe>
+<div class="content">
+
+<h1>Mesa 10.4.2 Release Notes / January 12, 2015</h1>
+
+<p>
+Mesa 10.4.2 is a bug fix release which fixes bugs found since the 10.4.1 release.
+</p>
+<p>
+Mesa 10.4.2 implements the OpenGL 3.3 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 3.3. OpenGL
+3.3 is <strong>only</strong> available if requested at context creation
+because compatibility contexts are not supported.
+</p>
+
+<h2>SHA256 checksums</h2>
+<pre>
+TBD
+</pre>
+
+<h2>New features</h2>
+<p>None</p>
+
+<h2>Bug fixes</h2>
+
+<p>This list is likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85529";>Bug 85529</a> - Surfaces not drawn in Unvanquished</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=87619";>Bug 87619</a> - Changes to state such as render targets change fragment shader without marking it dirty.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=87658";>Bug 87658</a> - [llvmpipe] SEGV in sse2_has_daz on ancient Pentium4-M</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=87913";>Bug 87913</a> - CPU cacheline size of 0 can be returned by CPUID leaf 0x80000006 in some virtual machines</li>
+
+</ul>
+
+
+<h2>Changes</h2>
+
+<p>Chad Versace (2):</p>
+<ul>
+ <li>i965: Use safer pointer arithmetic in intel_texsubimage_tiled_memcpy()</li>
+ <li>i965: Use safer pointer arithmetic in gather_oa_results()</li>
+</ul>
+
+<p>Dave Airlie (3):</p>
+<ul>
+ <li>Revert "r600g/sb: fix issues cause by GLSL switching to loops for switch"</li>
+ <li>r600g: fix regression since UCMP change</li>
+ <li>r600g/sb: implement r600 gpr index workaround. (v3.1)</li>
+</ul>
+
+<p>Emil Velikov (2):</p>
+<ul>
+ <li>docs: Add sha256 sums for the 10.4.1 release</li>
+ <li>Update version to 10.4.2</li>
+</ul>
+
+<p>Ilia Mirkin (2):</p>
+<ul>
+ <li>nv50,nvc0: set vertex id base to index_bias</li>
+ <li>nv50/ir: fix texture offsets in release builds</li>
+</ul>
+
+<p>Kenneth Graunke (2):</p>
+<ul>
+ <li>i965: Add missing BRW_NEW_*_PROG_DATA to texture/renderbuffer atoms.</li>
+ <li>i965: Fix start/base_vertex_location for >1 prims but !BRW_NEW_VERTICES.</li>
+</ul>
+
+<p>Leonid Shatz (1):</p>
+<ul>
+ <li>gallium/util: make sure cache line size is not zero</li>
+</ul>
+
+<p>Marek Olšák (4):</p>
+<ul>
+ <li>glsl_to_tgsi: fix a bug in copy propagation</li>
+ <li>vbo: ignore primitive restart if FixedIndex is enabled in DrawArrays</li>
+ <li>st/mesa: fix GL_PRIMITIVE_RESTART_FIXED_INDEX</li>
+ <li>radeonsi: fix VertexID for OpenGL</li>
+</ul>
+
+<p>Michel Dänzer (1):</p>
+<ul>
+ <li>radeonsi: Don't modify PA_SC_RASTER_CONFIG register value if rb_mask == 0</li>
+</ul>
+
+<p>Roland Scheidegger (1):</p>
+<ul>
+ <li>gallium/util: fix crash with daz detection on x86</li>
+</ul>
+
+<p>Tiziano Bacocco (1):</p>
+<ul>
+ <li>nv50,nvc0: implement half_pixel_center</li>
+</ul>
+
+<p>Vadim Girlin (1):</p>
+<ul>
+ <li>r600g/sb: fix issues with loops created for switch</li>
+</ul>
+
+
+</div>
+</body>
+</html>
commit 5906dd6c9944b5464ba3ee350968b92051e2f5d2
Author: Emil Velikov <emil.l.velikov@gmail.com>
Date: Mon Jan 12 10:24:59 2015 +0000
Update version to 10.4.2
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
diff --git a/VERSION b/VERSION
index da772b9..bb13e7c 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-10.4.1
+10.4.2
commit 2d05942b7453613d0b5badcca00973179b5f8937
Author: Dave Airlie <airlied@redhat.com>
Date: Tue Dec 9 16:46:55 2014 +1000
r600g/sb: implement r600 gpr index workaround. (v3.1)
r600, rv610 and rv630 all have a bug in their GPR indexing
and how the hw inserts access to PV.
If the base index for the src is the same as the dst gpr
in a previous group, then it will use PV instead of using
the indexed gpr correctly.
The workaround is to insert a NOP when you detect this.
v2: add second part of fix detecting DST rel writes followed
by same src base index reads.
v3: forget adding stuff to structs, just iterate over the
previous node group again, makes it more obvious.
v3.1: drop local_nop.
Fixes ~200 piglit regressions on rv635 since SB was introduced.
Reviewed-By: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 3c8ef3a74b51d5c79bbbc3e73244085efd89206b)
diff --git a/src/gallium/drivers/r600/sb/sb_bc.h b/src/gallium/drivers/r600/sb/sb_bc.h
index d03da98..6d3dc4d 100644
--- a/src/gallium/drivers/r600/sb/sb_bc.h
+++ b/src/gallium/drivers/r600/sb/sb_bc.h
@@ -616,6 +616,8 @@ public:
unsigned num_slots;
bool uses_mova_gpr;
+ bool r6xx_gpr_index_workaround;
+
bool stack_workaround_8xx;
bool stack_workaround_9xx;
diff --git a/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp b/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp
index 3f362c4..8d0be06 100644
--- a/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp
+++ b/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp
@@ -38,6 +38,18 @@
namespace r600_sb {
+void bc_finalizer::insert_rv6xx_load_ar_workaround(alu_group_node *b4) {
+
+ alu_group_node *g = sh.create_alu_group();
+ alu_node *a = sh.create_alu();
+
+ a->bc.set_op(ALU_OP0_NOP);
+ a->bc.last = 1;
+
+ g->push_back(a);
+ b4->insert_before(g);
+}
+
int bc_finalizer::run() {
run_on(sh.root);
@@ -211,12 +223,12 @@ void bc_finalizer::finalize_if(region_node* r) {
}
void bc_finalizer::run_on(container_node* c) {
-
+ node *prev_node = NULL;
for (node_iterator I = c->begin(), E = c->end(); I != E; ++I) {
node *n = *I;
if (n->is_alu_group()) {
- finalize_alu_group(static_cast<alu_group_node*>(n));
+ finalize_alu_group(static_cast<alu_group_node*>(n), prev_node);
} else {
if (n->is_alu_clause()) {
cf_node *c = static_cast<cf_node*>(n);
@@ -251,17 +263,22 @@ void bc_finalizer::run_on(container_node* c) {
if (n->is_container())
run_on(static_cast<container_node*>(n));
}
+ prev_node = n;
}
}
-void bc_finalizer::finalize_alu_group(alu_group_node* g) {
+void bc_finalizer::finalize_alu_group(alu_group_node* g, node *prev_node) {
alu_node *last = NULL;
+ alu_group_node *prev_g = NULL;
+ bool add_nop = false;
+ if (prev_node && prev_node->is_alu_group()) {
+ prev_g = static_cast<alu_group_node*>(prev_node);
+ }
for (node_iterator I = g->begin(), E = g->end(); I != E; ++I) {
alu_node *n = static_cast<alu_node*>(*I);
unsigned slot = n->bc.slot;
-
value *d = n->dst.empty() ? NULL : n->dst[0];
if (d && d->is_special_reg()) {
@@ -299,17 +316,22 @@ void bc_finalizer::finalize_alu_group(alu_group_node* g) {
update_ngpr(n->bc.dst_gpr);
- finalize_alu_src(g, n);
+ add_nop |= finalize_alu_src(g, n, prev_g);
last = n;
}
+ if (add_nop) {
+ if (sh.get_ctx().r6xx_gpr_index_workaround) {
+ insert_rv6xx_load_ar_workaround(g);
+ }
+ }
last->bc.last = 1;
}
-void bc_finalizer::finalize_alu_src(alu_group_node* g, alu_node* a) {
+bool bc_finalizer::finalize_alu_src(alu_group_node* g, alu_node* a, alu_group_node *prev) {
vvec &sv = a->src;
-
+ bool add_nop = false;
FBC_DUMP(
sblog << "finalize_alu_src: ";
dump::dump_op(a);
@@ -336,6 +358,15 @@ void bc_finalizer::finalize_alu_src(alu_group_node* g, alu_node* a) {
if (!v->rel->is_const()) {
src.rel = 1;
update_ngpr(v->array->gpr.sel() + v->array->array_size -1);
+ if (prev && !add_nop) {
+ for (node_iterator pI = prev->begin(), pE = prev->end(); pI != pE; ++pI) {
+ alu_node *pn = static_cast<alu_node*>(*pI);
+ if (pn->bc.dst_gpr == src.sel) {
+ add_nop = true;
+ break;
+ }
+ }
+ }
} else
src.rel = 0;
@@ -393,11 +424,23 @@ void bc_finalizer::finalize_alu_src(alu_group_node* g, alu_node* a) {
assert(!"unknown value kind");
break;
}
+ if (prev && !add_nop) {
+ for (node_iterator pI = prev->begin(), pE = prev->end(); pI != pE; ++pI) {
+ alu_node *pn = static_cast<alu_node*>(*pI);
+ if (pn->bc.dst_rel) {
+ if (pn->bc.dst_gpr == src.sel) {
+ add_nop = true;
+ break;
+ }
+ }
+ }
+ }
}
while (si < 3) {
a->bc.src[si++].sel = 0;
}
+ return add_nop;
}
void bc_finalizer::copy_fetch_src(fetch_node &dst, fetch_node &src, unsigned arg_start)
diff --git a/src/gallium/drivers/r600/sb/sb_context.cpp b/src/gallium/drivers/r600/sb/sb_context.cpp
index 8e11428..5dba85b 100644
--- a/src/gallium/drivers/r600/sb/sb_context.cpp
+++ b/src/gallium/drivers/r600/sb/sb_context.cpp
@@ -61,6 +61,8 @@ int sb_context::init(r600_isa *isa, sb_hw_chip chip, sb_hw_class cclass) {
uses_mova_gpr = is_r600() && chip != HW_CHIP_RV670;
+ r6xx_gpr_index_workaround = is_r600() && chip != HW_CHIP_RV670 && chip != HW_CHIP_RS780 && chip != HW_CHIP_RS880;
+
switch (chip) {
case HW_CHIP_RV610:
case HW_CHIP_RS780:
diff --git a/src/gallium/drivers/r600/sb/sb_pass.h b/src/gallium/drivers/r600/sb/sb_pass.h
index 812d14a..0346df1 100644
--- a/src/gallium/drivers/r600/sb/sb_pass.h
+++ b/src/gallium/drivers/r600/sb/sb_pass.h
@@ -695,8 +695,9 @@ public:
void run_on(container_node *c);
- void finalize_alu_group(alu_group_node *g);
- void finalize_alu_src(alu_group_node *g, alu_node *a);
+ void insert_rv6xx_load_ar_workaround(alu_group_node *b4);
+ void finalize_alu_group(alu_group_node *g, node *prev_node);
+ bool finalize_alu_src(alu_group_node *g, alu_node *a, alu_group_node *prev_node);
void emit_set_grad(fetch_node* f);
void finalize_fetch(fetch_node *f);
commit 099ed78a0460fc8ff8cbaa97d9f108e46d411a74
Author: Dave Airlie <airlied@redhat.com>
Date: Tue Dec 9 11:28:52 2014 +1000
r600g: fix regression since UCMP change
Since d8da6deceadf5e48201d848b7061dad17a5b7cac where the
state tracker started using UCMP on cayman a number of tests
regressed.
this seems to be r600g is doing CNDGE_INT for UCMP which is >= 0,
we should be doing CNDE_INT with reverse arguments.
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 0d4272cd8e7c45157140dc8e283707714a8238d5)
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index eb6486c..6d2ea72 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -6071,7 +6071,7 @@ static int tgsi_ucmp(struct r600_shader_ctx *ctx)
continue;
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
- alu.op = ALU_OP3_CNDGE_INT;
+ alu.op = ALU_OP3_CNDE_INT;
r600_bytecode_src(&alu.src[0], &ctx->src[0], i);
r600_bytecode_src(&alu.src[1], &ctx->src[2], i);
r600_bytecode_src(&alu.src[2], &ctx->src[1], i);
commit 91c5770ba1cfedad2c94a4920b93feafd539f34d
Author: Vadim Girlin <vadimgirlin@gmail.com>
Date: Wed Dec 10 14:41:10 2014 +0300
r600g/sb: fix issues with loops created for switch
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit de0fd375f6de8f3357d05decc4a7dc231c679645)
diff --git a/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp b/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp
index f0849ca..3f362c4 100644
--- a/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp
+++ b/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp
@@ -110,6 +110,8 @@ int bc_finalizer::run() {
void bc_finalizer::finalize_loop(region_node* r) {
+ update_nstack(r);
+
cf_node *loop_start = sh.create_cf(CF_OP_LOOP_START_DX10);
cf_node *loop_end = sh.create_cf(CF_OP_LOOP_END);
diff --git a/src/gallium/drivers/r600/sb/sb_bc_parser.cpp b/src/gallium/drivers/r600/sb/sb_bc_parser.cpp
index d787e5b..403f938 100644
--- a/src/gallium/drivers/r600/sb/sb_bc_parser.cpp
+++ b/src/gallium/drivers/r600/sb/sb_bc_parser.cpp
@@ -758,6 +758,8 @@ int bc_parser::prepare_loop(cf_node* c) {
c->insert_before(reg);
rep->move(c, end->next);
+ reg->src_loop = true;
+
loop_stack.push(reg);
return 0;
}
diff --git a/src/gallium/drivers/r600/sb/sb_if_conversion.cpp b/src/gallium/drivers/r600/sb/sb_if_conversion.cpp
index 93edace..3f2b1b1 100644
--- a/src/gallium/drivers/r600/sb/sb_if_conversion.cpp
+++ b/src/gallium/drivers/r600/sb/sb_if_conversion.cpp
@@ -115,13 +115,13 @@ void if_conversion::convert_kill_instructions(region_node *r,
bool if_conversion::check_and_convert(region_node *r) {
depart_node *nd1 = static_cast<depart_node*>(r->first);
- if (!nd1->is_depart())
+ if (!nd1->is_depart() || nd1->target != r)
return false;
if_node *nif = static_cast<if_node*>(nd1->first);
if (!nif->is_if())
return false;
depart_node *nd2 = static_cast<depart_node*>(nif->first);
- if (!nd2->is_depart())
+ if (!nd2->is_depart() || nd2->target != r)
return false;
value* &em = nif->cond;
diff --git a/src/gallium/drivers/r600/sb/sb_ir.h b/src/gallium/drivers/r600/sb/sb_ir.h
index 85c3d06..711c2eb 100644
--- a/src/gallium/drivers/r600/sb/sb_ir.h
+++ b/src/gallium/drivers/r600/sb/sb_ir.h
@@ -1089,7 +1089,8 @@ typedef std::vector<repeat_node*> repeat_vec;
class region_node : public container_node {
protected:
region_node(unsigned id) : container_node(NT_REGION, NST_LIST), region_id(id),
- loop_phi(), phi(), vars_defined(), departs(), repeats() {}
+ loop_phi(), phi(), vars_defined(), departs(), repeats(), src_loop()
+ {}
public:
unsigned region_id;
@@ -1101,12 +1102,16 @@ public:
depart_vec departs;
repeat_vec repeats;
+ // true if region was created for loop in the parser, sometimes repeat_node
+ // may be optimized away so we need to remember this information
+ bool src_loop;
+
virtual bool accept(vpass &p, bool enter);
unsigned dep_count() { return departs.size(); }
unsigned rep_count() { return repeats.size() + 1; }
- bool is_loop() { return !repeats.empty(); }
+ bool is_loop() { return src_loop || !repeats.empty(); }
container_node* get_entry_code_location() {
node *p = first;
diff --git a/src/gallium/drivers/r600/sb/sb_sched.cpp b/src/gallium/drivers/r600/sb/sb_sched.cpp
index 1413916..4fbdc4f 100644
--- a/src/gallium/drivers/r600/sb/sb_sched.cpp
+++ b/src/gallium/drivers/r600/sb/sb_sched.cpp
@@ -1527,6 +1527,9 @@ bool post_scheduler::check_copy(node *n) {
if (!s->is_prealloc()) {
recolor_local(s);
+
+ if (!s->chunk || s->chunk != d->chunk)
+ return false;
}
if (s->gpr == d->gpr) {
commit 3306ed6fd7b804e25976d990d02ec14628968a73
Author: Dave Airlie <airlied@redhat.com>
Date: Tue Dec 9 10:11:46 2014 +1000
Revert "r600g/sb: fix issues cause by GLSL switching to loops for switch"
This reverts commit 7b0067d23a6f64cf83c42e7f11b2cd4100c569fe.
Vadim's patch fixes this a lot better.
(cherry picked from commit 34e512d9ead1a4b67cea761a05f008ff92bb368d)
diff --git a/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp b/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp
index 0fa0910..f0849ca 100644
--- a/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp
+++ b/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp
@@ -46,22 +46,15 @@ int bc_finalizer::run() {
for (regions_vec::reverse_iterator I = rv.rbegin(), E = rv.rend(); I != E;
++I) {
region_node *r = *I;
- bool is_if = false;
+
assert(r);
- assert(r->first);
- if (r->first->is_container()) {
- container_node *repdep1 = static_cast<container_node*>(r->first);
- assert(repdep1->is_depart() || repdep1->is_repeat());
- if_node *n_if = static_cast<if_node*>(repdep1->first);
- if (n_if && n_if->is_if())
- is_if = true;
- }
+ bool loop = r->is_loop();
- if (is_if)
- finalize_if(r);
- else
+ if (loop)
finalize_loop(r);
+ else
+ finalize_if(r);
r->expand();
}
@@ -119,33 +112,16 @@ void bc_finalizer::finalize_loop(region_node* r) {
cf_node *loop_start = sh.create_cf(CF_OP_LOOP_START_DX10);
cf_node *loop_end = sh.create_cf(CF_OP_LOOP_END);
- bool has_instr = false;
-
- if (!r->is_loop()) {
- for (depart_vec::iterator I = r->departs.begin(), E = r->departs.end();
- I != E; ++I) {
- depart_node *dep = *I;
- if (!dep->empty()) {
- has_instr = true;
- break;
- }
- }
- } else
- has_instr = true;
- if (has_instr) {
- loop_start->jump_after(loop_end);
- loop_end->jump_after(loop_start);
- }
+ loop_start->jump_after(loop_end);
+ loop_end->jump_after(loop_start);
for (depart_vec::iterator I = r->departs.begin(), E = r->departs.end();
I != E; ++I) {
depart_node *dep = *I;
- if (has_instr) {
- cf_node *loop_break = sh.create_cf(CF_OP_LOOP_BREAK);
- loop_break->jump(loop_end);
- dep->push_back(loop_break);
- }
+ cf_node *loop_break = sh.create_cf(CF_OP_LOOP_BREAK);
+ loop_break->jump(loop_end);
+ dep->push_back(loop_break);
dep->expand();
}
@@ -161,10 +137,8 @@ void bc_finalizer::finalize_loop(region_node* r) {
rep->expand();
}
- if (has_instr) {
- r->push_front(loop_start);
- r->push_back(loop_end);
- }
+ r->push_front(loop_start);
+ r->push_back(loop_end);
}
void bc_finalizer::finalize_if(region_node* r) {
commit 81f8006f7d6366f25bfc193a925f1b08471ed21f
Author: Marek Olšák <marek.olsak@amd.com>
Date: Sun Jan 4 14:41:49 2015 +0100
radeonsi: fix VertexID for OpenGL
This fixes all failing piglit VertexID tests.
Cc: 10.4 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
(cherry picked from commit d7c6f397f44ae6a0ba63d8734b133196fe88443e)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 40a2f90..541e733 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -590,8 +590,11 @@ static void declare_system_value(
break;
case TGSI_SEMANTIC_VERTEXID:
- value = LLVMGetParam(radeon_bld->main_fn,
- si_shader_ctx->param_vertex_id);
+ value = LLVMBuildAdd(gallivm->builder,
+ LLVMGetParam(radeon_bld->main_fn,
+ si_shader_ctx->param_vertex_id),
+ LLVMGetParam(radeon_bld->main_fn,
+ SI_PARAM_BASE_VERTEX), "");
break;
case TGSI_SEMANTIC_SAMPLEID:
commit 1b498cf5b7d1587bb80a1ba8c0a23967e0a82d43
Author: Marek Olšák <marek.olsak@amd.com>
Date: Sun Jan 4 15:43:47 2015 +0100
st/mesa: fix GL_PRIMITIVE_RESTART_FIXED_INDEX
Cc: 10.2 10.3 10.4 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit eaae92a349af1fd6641c4bdd4bfd1185b1b6fe3e)
diff --git a/src/mesa/state_tracker/st_draw.c b/src/mesa/state_tracker/st_draw.c
index 64d6ef5..b6ccdd7 100644
--- a/src/mesa/state_tracker/st_draw.c
+++ b/src/mesa/state_tracker/st_draw.c
@@ -40,6 +40,7 @@
#include "main/image.h"
#include "main/bufferobj.h"
#include "main/macros.h"
+#include "main/varray.h"
#include "vbo/vbo.h"
@@ -234,7 +235,7 @@ st_draw_vbo(struct gl_context *ctx,
* so we only set these fields for indexed drawing:
*/
info.primitive_restart = ctx->Array._PrimitiveRestart;
- info.restart_index = ctx->Array.RestartIndex;
+ info.restart_index = _mesa_primitive_restart_index(ctx, ib->type);
}
else {
/* Transform feedback drawing is always non-indexed. */
commit 8c77be7ef9b1a53167f9f4427d205623dcaaa830
Author: Marek Olšák <marek.olsak@amd.com>
Date: Sun Jan 4 14:27:33 2015 +0100
vbo: ignore primitive restart if FixedIndex is enabled in DrawArrays
From GL 4.4 Core profile:
If both PRIMITIVE_RESTART and PRIMITIVE_RESTART_FIXED_INDEX are
enabled, the index value determined by PRIMITIVE_RESTART_FIXED_INDEX is
used. If PRIMITIVE_RESTART_FIXED_INDEX is enabled, primitive restart is not
performed for array elements transferred by any drawing command not taking a
type parameter, including all of the *Draw* commands other than *DrawEle-
ments*.
Cc: 10.2 10.3 10.4 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 8f5d3095211eee609dfd52eee9f64ce8492b956b)
diff --git a/src/mesa/vbo/vbo_exec_array.c b/src/mesa/vbo/vbo_exec_array.c
index e623b36..011b2d1 100644
--- a/src/mesa/vbo/vbo_exec_array.c
+++ b/src/mesa/vbo/vbo_exec_array.c
@@ -596,7 +596,8 @@ vbo_draw_arrays(struct gl_context *ctx, GLenum mode, GLint start,
prim[0].is_indirect = 0;
/* Implement the primitive restart index */
- if (ctx->Array.PrimitiveRestart && ctx->Array.RestartIndex < count) {
+ if (ctx->Array.PrimitiveRestart && !ctx->Array.PrimitiveRestartFixedIndex &&
+ ctx->Array.RestartIndex < count) {
GLuint primCount = 0;
if (ctx->Array.RestartIndex == start) {
commit ef43d21bbc34ef53a08dd6c1a0d6268676bf3273
Author: Leonid Shatz <leonid.shatz@ravellosystems.com>
Date: Wed Dec 31 19:07:44 2014 +0100
gallium/util: make sure cache line size is not zero
The "normal" detection (querying clflush size) already made sure it is
non-zero, however another method did not. This lead to crashes if this
value happened to be zero (apparently can happen in virtualized environments
at least).
This fixes https://bugs.freedesktop.org/show_bug.cgi?id=87913
Cc: "10.4" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 5fea39ace311723dab53460ae7b51b80746e0d3f)
diff --git a/src/gallium/auxiliary/util/u_cpu_detect.c b/src/gallium/auxiliary/util/u_cpu_detect.c
index 28197f4..23ab46c 100644
--- a/src/gallium/auxiliary/util/u_cpu_detect.c
+++ b/src/gallium/auxiliary/util/u_cpu_detect.c
@@ -409,8 +409,12 @@ util_cpu_detect(void)
}
if (regs[0] >= 0x80000006) {
+ /* should we really do this if the clflush size above worked? */
+ unsigned int cacheline;
cpuid(0x80000006, regs2);
- util_cpu_caps.cacheline = regs2[2] & 0xFF;
+ cacheline = regs2[2] & 0xFF;
+ if (cacheline > 0)
+ util_cpu_caps.cacheline = cacheline;
}
if (!util_cpu_caps.has_sse) {
commit ac3ca98a1bca8d00f7ebc8c656d67909b820ac70
Author: Roland Scheidegger <sroland@vmware.com>
Date: Wed Dec 31 17:39:57 2014 +0100
gallium/util: fix crash with daz detection on x86
The code used PIPE_ALIGN_VAR for the variable used by fxsave, however this
does not work if the stack isn't aligned. Hence use PIPE_ALIGN_STACK function
decoration to fix the segfault which can happen if stack alignment is only
4 bytes.
This fixes https://bugs.freedesktop.org/show_bug.cgi?id=87658.
Cc: "10.4" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit b59c7ed0ab1ac5b6d9f8d409f1a90401ab7775b6)
diff --git a/src/gallium/auxiliary/util/u_cpu_detect.c b/src/gallium/auxiliary/util/u_cpu_detect.c
index 5d9db59..28197f4 100644
--- a/src/gallium/auxiliary/util/u_cpu_detect.c
+++ b/src/gallium/auxiliary/util/u_cpu_detect.c
@@ -272,7 +272,7 @@ static INLINE uint64_t xgetbv(void)
#if defined(PIPE_ARCH_X86)
-static INLINE boolean sse2_has_daz(void)
+PIPE_ALIGN_STACK static INLINE boolean sse2_has_daz(void)
{
struct {
uint32_t pad1[7];
commit af1a690075de8b13044864440f1e7d0f2b40b59e
Author: Ilia Mirkin <imirkin@alum.mit.edu>
Date: Sun Jan 4 18:03:20 2015 -0500
nv50/ir: fix texture offsets in release builds
assert's get compiled out in release builds, so they can't be relied
upon to perform logic.
Reported-by: Pierre Moreau <pierre.morrow@free.fr>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Tested-by: Roy Spliet <rspliet@eclipso.eu>
Cc: "10.2 10.3 10.4" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit fb1afd1ea5fd25d82c75c5c3a2aba0bcb53b6d47)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp
index e283424..0d7612e 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp
@@ -772,7 +772,8 @@ NV50LoweringPreSSA::handleTEX(TexInstruction *i)
if (i->tex.useOffsets) {
for (int c = 0; c < 3; ++c) {
ImmediateValue val;
- assert(i->offset[0][c].getImmediate(val));
+ if (!i->offset[0][c].getImmediate(val))
+ assert(!"non-immediate offset");
i->tex.offset[c] = val.reg.data.u32;
i->offset[0][c].set(NULL);
}
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index 9c06d04..c234131 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -754,7 +754,8 @@ NVC0LoweringPass::handleTEX(TexInstruction *i)
assert(i->tex.useOffsets == 1);
for (c = 0; c < 3; ++c) {
ImmediateValue val;
- assert(i->offset[0][c].getImmediate(val));
+ if (!i->offset[0][c].getImmediate(val))
+ assert(!"non-immediate offset passed to non-TXG");
imm |= (val.reg.data.u32 & 0xf) << (c * 4);
}
if (i->op == OP_TXD && chipset >= NVISA_GK104_CHIPSET) {
commit fffe533f08d7c0cc61841195216e54587a1b77ad
Author: Chad Versace <chad.versace@linux.intel.com>
Date: Mon Dec 22 15:58:49 2014 -0600
i965: Use safer pointer arithmetic in gather_oa_results()
This patch reduces the likelihood of pointer arithmetic overflow bugs in
gather_oa_results(), like the one fixed by b69c7c5dac.
I haven't yet encountered any overflow bugs in the wild along this
patch's codepath. But I get nervous when I see code patterns like this:
(void*) + (int) * (int)
I smell 32-bit overflow all over this code.
This patch retypes 'snapshot_size' to 'ptrdiff_t', which should fix any
potential overflow.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
(cherry picked from commit 414be86c96836b35571185da776d2bce1b620c6a)
diff --git a/src/mesa/drivers/dri/i965/brw_performance_monitor.c b/src/mesa/drivers/dri/i965/brw_performance_monitor.c
index edfa3d2..e683e40 100644
--- a/src/mesa/drivers/dri/i965/brw_performance_monitor.c
+++ b/src/mesa/drivers/dri/i965/brw_performance_monitor.c
@@ -907,7 +907,7 @@ gather_oa_results(struct brw_context *brw,
return;
}
- const int snapshot_size = brw->perfmon.entries_per_oa_snapshot;
+ const ptrdiff_t snapshot_size = brw->perfmon.entries_per_oa_snapshot;
/* First, add the contributions from the "head" interval:
* (snapshot taken at BeginPerfMonitor time,
commit 4d5e0f78b7c1a8239800a3f2a5f8c82178b5f868
Author: Chad Versace <chad.versace@linux.intel.com>
Date: Mon Dec 22 15:58:48 2014 -0600
i965: Use safer pointer arithmetic in intel_texsubimage_tiled_memcpy()
This patch reduces the likelihood of pointer arithmetic overflow bugs in
intel_texsubimage_tiled_memcpy() , like the one fixed by b69c7c5dac.
I haven't yet encountered any overflow bugs in the wild along this
patch's codepath. But I recently solved, in commit b69c7c5dac, an overflow
bug in a line of code that looks very similar to pointer arithmetic in
this function.
This patch conceptually applies the same fix as in b69c7c5dac. Instead
of retyping the variables, though, this patch adds some casts. (I tried
to retype the variables as ptrdiff_t, but it quickly got very messy. The
casts are cleaner).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
(cherry picked from commit 225a09790da0b1605a0b68acbbe1e0f30eee3e6f)
diff --git a/src/mesa/drivers/dri/i965/intel_tex_subimage.c b/src/mesa/drivers/dri/i965/intel_tex_subimage.c
index cb5738a..3e4ed1b 100644
--- a/src/mesa/drivers/dri/i965/intel_tex_subimage.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_subimage.c
@@ -488,8 +488,8 @@ linear_to_tiled(uint32_t xt1, uint32_t xt2,
/* Translate by (xt,yt) for single-tile copier. */
tile_copy(x0-xt, x1-xt, x2-xt, x3-xt,
y0-yt, y1-yt,
- dst + xt * th + yt * dst_pitch,
- src + xt + yt * src_pitch,
+ dst + (ptrdiff_t) xt * th + (ptrdiff_t) yt * dst_pitch,
+ src + (ptrdiff_t) xt + (ptrdiff_t) yt * src_pitch,
src_pitch,
swizzle_bit,
mem_copy);
@@ -654,7 +654,8 @@ intel_texsubimage_tiled_memcpy(struct gl_context * ctx,
linear_to_tiled(
xoffset * cpp, (xoffset + width) * cpp,
yoffset, yoffset + height,
- bo->virtual, pixels - yoffset * src_pitch - xoffset * cpp,
+ bo->virtual,
+ pixels - (ptrdiff_t) yoffset * src_pitch - (ptrdiff_t) xoffset * cpp,
image->mt->pitch, src_pitch,
brw->has_swizzling,
image->mt->tiling,
commit b9e56ea151c179439836aeaf8e768723ce8a4197
Author: Marek Olšák <marek.olsak@amd.com>
Date: Fri Jan 2 14:13:43 2015 +0100
glsl_to_tgsi: fix a bug in copy propagation
This fixes the new piglit test: arb_uniform_buffer_object/2-buffers-bug
Cc: 10.2 10.3 10.4 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
(cherry picked from commit 48094d0e6554a9df36bf00fc2793ade46cf92406)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 5f30355..ed7746c 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -3527,7 +3527,8 @@ glsl_to_tgsi_visitor::copy_propagate(void)
first = copy_chan;
} else {
if (first->src[0].file != copy_chan->src[0].file ||
- first->src[0].index != copy_chan->src[0].index) {
+ first->src[0].index != copy_chan->src[0].index ||
+ first->src[0].index2D != copy_chan->src[0].index2D) {
good = false;
break;
}
commit e05c595acd270e5602f6e337dc489a994250f9d3
Author: Kenneth Graunke <kenneth@whitecape.org>
Date: Thu Dec 18 04:45:40 2014 -0800
i965: Fix start/base_vertex_location for >1 prims but !BRW_NEW_VERTICES.
This is a partial revert of c89306983c07e5a88c0d636267e5ccf263cb4213.
It split the {start,base}_vertex_location handling into several steps:
1. Set brw->draw.start_vertex_location = prim[i].start
and brw->draw.base_vertex_location = prim[i].basevertex.
(This happened once per _mesa_prim, in the main drawing loop.)
2. Add brw->vb.start_vertex_bias and brw->ib.start_vertex_offset
appropriately. (This happened in brw_prepare_shader_draw_parameters,
which was called just after brw_prepare_vertices, as part of state
upload, and only happened when BRW_NEW_VERTICES was flagged.)
3. Use those values when emitting 3DPRIMITIVE (once per _mesa_prim).
If we drew multiple _mesa_prims, but didn't flag BRW_NEW_VERTICES on
the second (or later) primitives, we would do step #1, but not #2.
The first _mesa_prim would get correct values, but subsequent ones
would only get the first half of the summation.
The reason I originally did this was because I needed the value of
gl_BaseVertexARB to exist in a buffer object prior to uploading
3DSTATE_VERTEX_BUFFERS. I believed I wanted to upload the value
of 3DPRIMITIVE's "Base Vertex Location" field, which was computed
as: (prims[i].indexed ? prims[i].start : prims[i].basevertex) +
brw->vb.start_vertex_bias. The latter value wasn't available until
after brw_prepare_vertices, and the former weren't available in the
Reply to: