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xserver-xorg-video-intel: Changes to 'ubuntu-utopic'

 debian/changelog                                            |    5 
 debian/patches/series                                       |    2 
 debian/patches/sna-add-more-checks-and-asserts-for-blt.diff |  200 ++++++++++++
 debian/patches/sna-tweak-alignment-constraints-on-gen8.diff |   34 ++
 4 files changed, 240 insertions(+), 1 deletion(-)

New commits:
commit 1b9d692cb8ff8eba2e43755a04552808ae9b3b69
Author: Timo Aaltonen <tjaalton@debian.org>
Date:   Tue Jan 13 14:55:18 2015 +0200

    add two more patches

diff --git a/debian/changelog b/debian/changelog
index 804a8d1..f82989f 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -2,7 +2,10 @@ xserver-xorg-video-intel (2:2.99.914-1~exp1ubuntu4.2) UNRELEASED; urgency=medium
 
   * Added patches:
     - disable-dri3.diff: Disable DRI3. (LP: #1401784)
-    - sna-fix-gen8-blt.diff: Fix GEN8 BLT with 4bit address. (LP: #1401788)
+    - sna-fix-gen8-blt.diff,
+      sna-add-more-checks-and-asserts-for-blt.diff,
+      sna-tweak-alignment-constraints-on-gen8.diff:
+      Fix GEN8 BLT with 4bit address. (LP: #1401788)
 
  -- Timo Aaltonen <tjaalton@debian.org>  Fri, 12 Dec 2014 10:53:54 +0200
 
diff --git a/debian/patches/series b/debian/patches/series
index e8f787e..02ff016 100644
--- a/debian/patches/series
+++ b/debian/patches/series
@@ -8,3 +8,5 @@ fix-uxa-fglrx-stealing.diff
 sna-use-vmask-in-3dstate-ps.diff
 disable-dri3.diff
 sna-fix-gen8-blt.diff
+sna-tweak-alignment-constraints-on-gen8.diff
+sna-add-more-checks-and-asserts-for-blt.diff
diff --git a/debian/patches/sna-add-more-checks-and-asserts-for-blt.diff b/debian/patches/sna-add-more-checks-and-asserts-for-blt.diff
new file mode 100644
index 0000000..c9e9068
--- /dev/null
+++ b/debian/patches/sna-add-more-checks-and-asserts-for-blt.diff
@@ -0,0 +1,200 @@
+commit 8dee52997891108eec8e4df12dd02f3a060d9cb8
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date:   Wed Nov 19 13:38:20 2014 +0000
+
+    sna: Add more checks and asserts for BLT capable bo
+    
+    Before we use the BLT for core acceleration, double check that we can.
+    This should catch the case where we attempt to operate on SHM pixmaps
+    which do not meet the restrictions.
+    
+    Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+--- a/src/sna/sna_accel.c
++++ b/src/sna/sna_accel.c
+@@ -4642,6 +4642,9 @@ sna_put_xybitmap_blt(DrawablePtr drawabl
+ 		}
+ 	}
+ 
++	if (!kgem_bo_can_blt(&sna->kgem, bo))
++	        return false;
++
+ 	assert_pixmap_contains_box(pixmap, RegionExtents(region));
+ 	if (damage)
+ 		sna_damage_add(damage, region);
+@@ -4654,6 +4657,7 @@ sna_put_xybitmap_blt(DrawablePtr drawabl
+ 	y += dy + drawable->y;
+ 
+ 	kgem_set_mode(&sna->kgem, KGEM_BLT, bo);
++	assert(kgem_bo_can_blt(&sna->kgem, bo));
+ 
+ 	/* Region is pre-clipped and translated into pixmap space */
+ 	box = RegionRects(region);
+@@ -4802,6 +4806,9 @@ sna_put_xypixmap_blt(DrawablePtr drawabl
+ 		}
+ 	}
+ 
++	if (!kgem_bo_can_blt(&sna->kgem, bo))
++		return false;
++
+ 	assert_pixmap_contains_box(pixmap, RegionExtents(region));
+ 	if (damage)
+ 		sna_damage_add(damage, region);
+@@ -4814,6 +4821,7 @@ sna_put_xypixmap_blt(DrawablePtr drawabl
+ 	y += dy + drawable->y;
+ 
+ 	kgem_set_mode(&sna->kgem, KGEM_BLT, bo);
++	assert(kgem_bo_can_blt(&sna->kgem, bo));
+ 
+ 	skip = h * BitmapBytePad(w + left);
+ 	for (i = 1 << (gc->depth-1); i; i >>= 1, bits += skip) {
+@@ -7570,6 +7578,7 @@ sna_copy_bitmap_blt(DrawablePtr _bitmap,
+ 	br13 |= copy_ROP[gc->alu] << 16;
+ 
+ 	kgem_set_mode(&sna->kgem, KGEM_BLT, arg->bo);
++	assert(kgem_bo_can_blt(&sna->kgem, arg->bo));
+ 	do {
+ 		int bx1 = (box->x1 + sx) & ~7;
+ 		int bx2 = (box->x2 + sx + 7) & ~7;
+@@ -7789,6 +7798,7 @@ sna_copy_plane_blt(DrawablePtr source, D
+ 	br13 |= copy_ROP[gc->alu] << 16;
+ 
+ 	kgem_set_mode(&sna->kgem, KGEM_BLT, arg->bo);
++	assert(kgem_bo_can_blt(&sna->kgem, arg->bo));
+ 	do {
+ 		int bx1 = (box->x1 + sx) & ~7;
+ 		int bx2 = (box->x2 + sx + 7) & ~7;
+@@ -8074,6 +8084,10 @@ sna_copy_plane(DrawablePtr src, Drawable
+ 				goto fallback;
+ 			}
+ 		}
++
++		if (!kgem_bo_can_blt(&sna->kgem, arg.bo))
++		        return false;
++		
+ 		RegionUninit(&region);
+ 		return sna_do_copy(src, dst, gc,
+ 				   src_x, src_y,
+@@ -11472,9 +11486,14 @@ sna_poly_fill_rect_tiled_8x8_blt(Drawabl
+ 	if (tile_bo->tiling)
+ 		return false;
+ 
++	if (!kgem_bo_can_blt(&sna->kgem, bo) ||
++            !kgem_bo_can_blt(&sna->kgem, tile_bo))
++                return false;
++
+ 	assert(tile_bo->pitch == 8 * drawable->bitsPerPixel >> 3);
+ 
+ 	kgem_set_mode(&sna->kgem, KGEM_BLT, bo);
++	assert(kgem_bo_can_blt(&sna->kgem, bo));
+ 	if (!kgem_check_batch(&sna->kgem, 10+2*3) ||
+ 	    !kgem_check_reloc(&sna->kgem, 2) ||
+ 	    !kgem_check_many_bo_fenced(&sna->kgem, bo, tile_bo, NULL)) {
+@@ -12266,6 +12285,7 @@ sna_poly_fill_rect_stippled_8x8_blt(Draw
+ 	}
+ 
+ 	kgem_set_mode(&sna->kgem, KGEM_BLT, bo);
++	assert(kgem_bo_can_blt(&sna->kgem, bo));
+ 	if (!kgem_check_batch(&sna->kgem, 10 + 2*3) ||
+ 	    !kgem_check_bo_fenced(&sna->kgem, bo) ||
+ 	    !kgem_check_reloc(&sna->kgem, 1)) {
+@@ -12642,6 +12662,7 @@ sna_poly_fill_rect_stippled_1_blt(Drawab
+ 
+ 	get_drawable_deltas(drawable, pixmap, &dx, &dy);
+ 	kgem_set_mode(&sna->kgem, KGEM_BLT, bo);
++	assert(kgem_bo_can_blt(&sna->kgem, bo));
+ 
+ 	br00 = 3 << 20;
+ 	br13 = bo->pitch;
+@@ -13542,6 +13563,7 @@ sna_poly_fill_rect_stippled_n_blt__imm(D
+ 
+ 	get_drawable_deltas(drawable, pixmap, &dx, &dy);
+ 	kgem_set_mode(&sna->kgem, KGEM_BLT, bo);
++	assert(kgem_bo_can_blt(&sna->kgem, bo));
+ 
+ 	br00 = XY_MONO_SRC_COPY_IMM | 3 << 20;
+ 	br13 = bo->pitch;
+@@ -13686,6 +13708,7 @@ sna_poly_fill_rect_stippled_n_blt(Drawab
+ 
+ 	get_drawable_deltas(drawable, pixmap, &dx, &dy);
+ 	kgem_set_mode(&sna->kgem, KGEM_BLT, bo);
++	assert(kgem_bo_can_blt(&sna->kgem, bo));
+ 
+ 	br00 = XY_MONO_SRC_COPY | 3 << 20;
+ 	br13 = bo->pitch;
+@@ -13813,10 +13836,9 @@ sna_poly_fill_rect_stippled_blt(Drawable
+ {
+ 
+ 	PixmapPtr stipple = gc->stipple;
++	PixmapPtr pixmap = get_drawable_pixmap(drawable);
+ 
+ 	if (bo->tiling == I915_TILING_Y) {
+-		PixmapPtr pixmap = get_drawable_pixmap(drawable);
+-
+ 		DBG(("%s: converting bo from Y-tiling\n", __FUNCTION__));
+ 		/* This is cheating, but only the gpu_bo can be tiled */
+ 		assert(bo == __sna_pixmap_get_bo(pixmap));
+@@ -13828,6 +13850,9 @@ sna_poly_fill_rect_stippled_blt(Drawable
+ 		}
+ 	}
+ 
++	if (!kgem_bo_can_blt(&to_sna_from_pixmap(pixmap)->kgem, bo))
++                return false;
++
+ 	if (!sna_drawable_move_to_cpu(&stipple->drawable, MOVE_READ))
+ 		return false;
+ 
+@@ -14368,6 +14393,9 @@ sna_glyph_blt(DrawablePtr drawable, GCPt
+ 		}
+ 	}
+ 
++	if (!kgem_bo_can_blt(&sna->kgem, bo))
++                return false;
++
+ 	if (get_drawable_deltas(drawable, pixmap, &dx, &dy))
+ 		RegionTranslate(clip, dx, dy);
+ 	_x += drawable->x + dx;
+@@ -14386,6 +14414,7 @@ sna_glyph_blt(DrawablePtr drawable, GCPt
+ 	}
+ 
+ 	kgem_set_mode(&sna->kgem, KGEM_BLT, bo);
++	assert(kgem_bo_can_blt(&sna->kgem, bo));
+ 	if (!kgem_check_batch(&sna->kgem, 20) ||
+ 	    !kgem_check_bo_fenced(&sna->kgem, bo) ||
+ 	    !kgem_check_reloc(&sna->kgem, 1)) {
+@@ -15084,6 +15113,9 @@ sna_reversed_glyph_blt(DrawablePtr drawa
+ 		}
+ 	}
+ 
++	if (!kgem_bo_can_blt(&sna->kgem, bo))
++                return false;
++
+ 	if (get_drawable_deltas(drawable, pixmap, &dx, &dy))
+ 		RegionTranslate(clip, dx, dy);
+ 	_x += drawable->x + dx;
+@@ -15102,6 +15134,7 @@ sna_reversed_glyph_blt(DrawablePtr drawa
+ 	}
+ 
+ 	kgem_set_mode(&sna->kgem, KGEM_BLT, bo);
++	assert(kgem_bo_can_blt(&sna->kgem, bo));
+ 	if (!kgem_check_batch(&sna->kgem, 20) ||
+ 	    !kgem_check_bo_fenced(&sna->kgem, bo) ||
+ 	    !kgem_check_reloc(&sna->kgem, 1)) {
+@@ -15542,6 +15575,9 @@ sna_push_pixels_solid_blt(GCPtr gc,
+ 		}
+ 	}
+ 
++	if (!kgem_bo_can_blt(&sna->kgem, bo))
++               return false;
++
+ 	if (get_drawable_deltas(drawable, pixmap, &dx, &dy))
+ 		RegionTranslate(region, dx, dy);
+ 
+@@ -15555,6 +15591,7 @@ sna_push_pixels_solid_blt(GCPtr gc,
+ 	     region->extents.x2, region->extents.y2));
+ 
+ 	kgem_set_mode(&sna->kgem, KGEM_BLT, bo);
++	assert(kgem_bo_can_blt(&sna->kgem, bo));
+ 
+ 	/* Region is pre-clipped and translated into pixmap space */
+ 	box = RegionRects(region);
diff --git a/debian/patches/sna-tweak-alignment-constraints-on-gen8.diff b/debian/patches/sna-tweak-alignment-constraints-on-gen8.diff
new file mode 100644
index 0000000..c1b8893
--- /dev/null
+++ b/debian/patches/sna-tweak-alignment-constraints-on-gen8.diff
@@ -0,0 +1,34 @@
+commit a90cc3b3889fafbd91c11c42d068a9d6474e218b
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date:   Tue Nov 18 08:37:25 2014 +0000
+
+    sna: Tweak alignment constraints on gen8 to allow BLT
+    
+    The previous commits prevent us from using the BLT if the destination
+    address is misaligned. Honour that restriction when creating buffers as
+    well, so that they are always usuable by the BLT.
+    
+    Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+diff --git a/src/sna/kgem.c b/src/sna/kgem.c
+index fe225d2..72ffb04 100644
+--- a/src/sna/kgem.c
++++ b/src/sna/kgem.c
+@@ -1797,6 +1797,8 @@ inline static uint32_t kgem_pitch_alignment(struct kgem *kgem, unsigned flags)
+ 		return 256;
+ 	if (flags & CREATE_SCANOUT)
+ 		return 64;
++	if (kgem->gen >= 0100)
++		return 32;
+ 	return 8;
+ }
+ 
+@@ -7234,7 +7236,7 @@ struct kgem_bo *kgem_create_buffer_2d(struct kgem *kgem,
+ 	assert(width > 0 && height > 0);
+ 	assert(ret != NULL);
+ 	stride = ALIGN(width, 2) * bpp >> 3;
+-	stride = ALIGN(stride, 4);
++	stride = ALIGN(stride, kgem->gen >= 0100 ? 32 : 4);
+ 
+ 	DBG(("%s: %dx%d, %d bpp, stride=%d\n",
+ 	     __FUNCTION__, width, height, bpp, stride));
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