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mesa: Changes to 'upstream-experimental'



Rebased ref, commits from common ancestor:
commit 60e2e04fe8d9a55aeeeb8737a52c301e8a270458
Author: Emil Velikov <emil.l.velikov@gmail.com>
Date:   Tue Dec 30 02:11:34 2014 +0000

    Add release notes for the 10.4.1 release
    
    Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

diff --git a/docs/relnotes/10.4.1.html b/docs/relnotes/10.4.1.html
new file mode 100644
index 0000000..ec6d3c0
--- /dev/null
+++ b/docs/relnotes/10.4.1.html
@@ -0,0 +1,95 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd";>
+<html lang="en">
+<head>
+  <meta http-equiv="content-type" content="text/html; charset=utf-8">
+  <title>Mesa Release Notes</title>
+  <link rel="stylesheet" type="text/css" href="../mesa.css">
+</head>
+<body>
+
+<div class="header">
+  <h1>The Mesa 3D Graphics Library</h1>
+</div>
+
+<iframe src="../contents.html"></iframe>
+<div class="content">
+
+<h1>Mesa 10.4.1 Release Notes / December 29, 2014</h1>
+
+<p>
+Mesa 10.4.1 is a bug fix release which fixes bugs found since the 10.4.0 release.
+</p>
+<p>
+Mesa 10.4.1 implements the OpenGL 3.3 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 3.3.  OpenGL
+3.3 is <strong>only</strong> available if requested at context creation
+because compatibility contexts are not supported.
+</p>
+
+<h2>SHA256 checksums</h2>
+<pre>
+TBD
+</pre>
+
+<h2>New features</h2>
+<p>None</p>
+
+<h2>Bug fixes</h2>
+
+<p>This list is likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82585";>Bug 82585</a> - geometry shader with optional out variable segfaults</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82991";>Bug 82991</a> - Inverted bumpmap in webgl applications</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83908";>Bug 83908</a> - [i965] Incorrect icon colors in Steam Big Picture</li>
+
+</ul>
+
+
+<h2>Changes</h2>
+
+<p>Andres Gomez (1):</p>
+<ul>
+  <li>i965/brw_reg: struct constructor now needs explicit negate and abs values.</li>
+</ul>
+
+<p>Cody Northrop (1):</p>
+<ul>
+  <li>i965: Require pixel alignment for GPU copy blit</li>
+</ul>
+
+<p>Emil Velikov (3):</p>
+<ul>
+  <li>docs: Add 10.4 sha256 sums, news item and link release notes</li>
+  <li>Revert "glx/dri3: Request non-vsynced Present for swapinterval zero. (v3)"</li>
+  <li>Update version to 10.4.1</li>
+</ul>
+
+<p>Ian Romanick (2):</p>
+<ul>
+  <li>linker: Wrap access of producer_var with a NULL check</li>
+  <li>linker: Assign varying locations geometry shader inputs for SSO</li>
+</ul>
+
+<p>Mario Kleiner (4):</p>
+<ul>
+  <li>glx/dri3: Fix glXWaitForSbcOML() to handle targetSBC==0 correctly. (v2)</li>
+  <li>glx/dri3: Track separate (ust, msc) for PresentPixmap vs. PresentNotifyMsc (v2)</li>
+  <li>glx/dri3: Request non-vsynced Present for swapinterval zero. (v3)</li>
+  <li>glx/dri3: Don't fail on glXSwapBuffersMscOML(dpy, window, 0, 0, 0) (v2)</li>
+</ul>
+
+<p>Maxence Le Doré (1):</p>
+<ul>
+  <li>glsl: Add gl_MaxViewports to available builtin constants</li>
+</ul>
+
+
+</div>
+</body>
+</html>

commit 1a3df8cc777af497f1557d9c6ad9360f7322b7fb
Author: Emil Velikov <emil.l.velikov@gmail.com>
Date:   Tue Dec 30 02:07:33 2014 +0000

    Update version to 10.4.1
    
    Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

diff --git a/VERSION b/VERSION
index 816c071..da772b9 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-10.4.0
+10.4.1

commit 45416a255f304c53ef14c5d78a079f0979b72600
Author: Emil Velikov <emil.l.velikov@gmail.com>
Date:   Tue Dec 30 01:03:14 2014 +0000

    Revert "glx/dri3: Request non-vsynced Present for swapinterval zero. (v3)"
    
    This reverts commit ee241a688904211663e9445ed90e6d51aca3204f.
    
    May not be the correct fix. Discussion is ongoing.
    
    http://lists.freedesktop.org/archives/mesa-dev/2014-December/072969.html

diff --git a/src/glx/dri3_glx.c b/src/glx/dri3_glx.c
index 1ddc723..0bda670 100644
--- a/src/glx/dri3_glx.c
+++ b/src/glx/dri3_glx.c
@@ -1526,7 +1526,6 @@ dri3_swap_buffers(__GLXDRIdrawable *pdraw, int64_t target_msc, int64_t divisor,
    xcb_connection_t *c = XGetXCBConnection(dpy);
    struct dri3_buffer *back;
    int64_t ret = 0;
-   uint32_t options = XCB_PRESENT_OPTION_NONE;
 
    unsigned flags = __DRI2_FLUSH_DRAWABLE;
    if (flush)
@@ -1579,17 +1578,6 @@ dri3_swap_buffers(__GLXDRIdrawable *pdraw, int64_t target_msc, int64_t divisor,
          remainder = 0;
       }
 
-      /* From the GLX_EXT_swap_control spec:
-       *
-       *     "If <interval> is set to a value of 0, buffer swaps are not
-       *      synchronized to a video frame."
-       *
-       * Implementation note: It is possible to enable triple buffering behaviour
-       * by not using XCB_PRESENT_OPTION_ASYNC, but this should not be the default.
-       */
-      if (priv->swap_interval == 0)
-          options |= XCB_PRESENT_OPTION_ASYNC;
-
       back->busy = 1;
       back->last_swap = priv->send_sbc;
       xcb_present_pixmap(c,
@@ -1603,7 +1591,7 @@ dri3_swap_buffers(__GLXDRIdrawable *pdraw, int64_t target_msc, int64_t divisor,
                          None,                                 /* target_crtc */
                          None,
                          back->sync_fence,
-                         options,
+                         XCB_PRESENT_OPTION_NONE,
                          target_msc,
                          divisor,
                          remainder, 0, NULL);

commit fb3f7c0bc599f705dec0024188f1cb5deed93495
Author: Cody Northrop <cody@lunarg.com>
Date:   Mon Sep 15 16:14:20 2014 -0600

    i965: Require pixel alignment for GPU copy blit
    
    The blitter will start at a pixel's natural alignment. For PBOs, if the
    provided offset if not aligned, bits will get dropped.
    
    This change adds offset alignment check for src and dst, kicking back if
    the requirements are not met.
    
    The change is based on following verbiage from BSPEC:
     Color pixel sizes supported are 8, 16, and 32 bits per pixel (bpp).
     All pixels are naturally aligned.
    
    Found in the following locations:
    page 35 of intel-gfx-prm-osrc-hsw-blitter.pdf
    page 29 of ivb_ihd_os_vol1_part4.pdf
    page 29 of snb_ihd_os_vol1_part5.pdf
    
    This behavior was observed with Steam Big Picture rendering incorrect
    icon colors.  The fix has been tested on Ubuntu and SteamOS on Haswell.
    
    Signed-off-by: Cody Northrop <cody@lunarg.com>
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83908
    Reviewed-by: Neil Roberts <neil@linux.intel.com>
    (cherry picked from commit 83e8bb5b1a50c0105b642d559999f07fa64a982f)
    Nominated-by: Matt Turner <mattst88@gmail.com>

diff --git a/src/mesa/drivers/dri/i915/intel_blit.c b/src/mesa/drivers/dri/i915/intel_blit.c
index d4e269d..9a68625 100644
--- a/src/mesa/drivers/dri/i915/intel_blit.c
+++ b/src/mesa/drivers/dri/i915/intel_blit.c
@@ -271,9 +271,10 @@ intelEmitCopyBlit(struct intel_context *intel,
        dst_buffer, dst_pitch, dst_offset, dst_x, dst_y, w, h);
 
    /* Blit pitch must be dword-aligned.  Otherwise, the hardware appears to drop
-    * the low bits.
+    * the low bits.  Offsets must be naturally aligned.
     */
-   if (src_pitch % 4 != 0 || dst_pitch % 4 != 0)
+   if (src_pitch % 4 != 0 || src_offset % cpp != 0 ||
+       dst_pitch % 4 != 0 || dst_offset % cpp != 0)
       return false;
 
    /* For big formats (such as floating point), do the copy using 16 or 32bpp
diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c
index 73ab488..25ca194 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.c
+++ b/src/mesa/drivers/dri/i965/intel_blit.c
@@ -342,9 +342,10 @@ intelEmitCopyBlit(struct brw_context *brw,
        dst_buffer, dst_pitch, dst_offset, dst_x, dst_y, w, h);
 
    /* Blit pitch must be dword-aligned.  Otherwise, the hardware appears to drop
-    * the low bits.
+    * the low bits.  Offsets must be naturally aligned.
     */
-   if (src_pitch % 4 != 0 || dst_pitch % 4 != 0)
+   if (src_pitch % 4 != 0 || src_offset % cpp != 0 ||
+       dst_pitch % 4 != 0 || dst_offset % cpp != 0)
       return false;
 
    /* For big formats (such as floating point), do the copy using 16 or 32bpp

commit 4f570f2fb3468277138ae5f9e31745cb76d677d5
Author: Ian Romanick <ian.d.romanick@intel.com>
Date:   Mon Dec 1 14:07:30 2014 -0800

    linker: Assign varying locations geometry shader inputs for SSO
    
    Previously only geometry shader outputs would be assigned locations if
    the geometry shader was the only stage in the linked program.
    
    Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
    Cc: pavol@klacansky.com
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82585
    Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
    (cherry picked from commit a909b995d95892798a189818454905fdefd4bc9b)
    Nominted-by: Ian Romanick <ian.d.romanick@intel.com>

diff --git a/src/glsl/linker.cpp b/src/glsl/linker.cpp
index 41d6a82..67d5ee6 100644
--- a/src/glsl/linker.cpp
+++ b/src/glsl/linker.cpp
@@ -2746,6 +2746,21 @@ link_shaders(struct gl_context *ctx, struct gl_shader_program *prog)
    if (last >= 0 && last < MESA_SHADER_FRAGMENT) {
       gl_shader *const sh = prog->_LinkedShaders[last];
 
+      if (first == MESA_SHADER_GEOMETRY) {
+         /* There was no vertex shader, but we still have to assign varying
+          * locations for use by geometry shader inputs in SSO.
+          *
+          * If the shader is not separable (i.e., prog->SeparateShader is
+          * false), linking will have already failed when first is
+          * MESA_SHADER_GEOMETRY.
+          */
+         if (!assign_varying_locations(ctx, mem_ctx, prog,
+                                       NULL, sh,
+                                       num_tfeedback_decls, tfeedback_decls,
+                                       prog->Geom.VerticesIn))
+            goto done;
+      }
+
       if (num_tfeedback_decls != 0 || prog->SeparateShader) {
          /* There was no fragment shader, but we still have to assign varying
           * locations for use by transform feedback.

commit a4c83485972a3dfae34830cd4babe1f32574a8a4
Author: Ian Romanick <ian.d.romanick@intel.com>
Date:   Mon Dec 1 14:16:24 2014 -0800

    linker: Wrap access of producer_var with a NULL check
    
    producer_var could be NULL if consumer_var is not NULL and
    consumer_is_fs is false.  This will occur when the producer is NULL and
    the consumer is the geometry shader for a program that contains only a
    geometry shader.  This will occur starting with the next patch.
    
    Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
    Cc: pavol@klacansky.com
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82585
    Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
    (cherry picked from commit 5eca78a00a5de442aaf541a1095d5cfa6b4f45de)
    Nominated-by: Ian Romanick <ian.d.romanick@intel.com>

diff --git a/src/glsl/link_varyings.cpp b/src/glsl/link_varyings.cpp
index 1866ab2..43da2c6 100644
--- a/src/glsl/link_varyings.cpp
+++ b/src/glsl/link_varyings.cpp
@@ -835,9 +835,11 @@ varying_matches::record(ir_variable *producer_var, ir_variable *consumer_var)
        * regardless of where they appear.  We can trivially satisfy that
        * requirement by changing the interpolation type to flat here.
        */
-      producer_var->data.centroid = false;
-      producer_var->data.sample = false;
-      producer_var->data.interpolation = INTERP_QUALIFIER_FLAT;
+      if (producer_var) {
+         producer_var->data.centroid = false;
+         producer_var->data.sample = false;
+         producer_var->data.interpolation = INTERP_QUALIFIER_FLAT;
+      }
 
       if (consumer_var) {
          consumer_var->data.centroid = false;

commit 893583776e78d8f311302ad1579378f8aadcdcef
Author: Maxence Le Doré <maxence.ledore@gmail.com>
Date:   Wed Dec 10 08:09:24 2014 +0100

    glsl: Add gl_MaxViewports to available builtin constants
    
    It seems to have been forgotten during viewports array implementation time.
    
    Cc: "10.4 10.3" <mesa-stable@lists.freedesktop.org>
    Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
    Reviewed-by: Matt Turner <mattst88@gmail.com>
    (cherry picked from commit 19e05d68986690cfcdd49de6cfb87d88ad54cd58)

diff --git a/src/glsl/builtin_variables.cpp b/src/glsl/builtin_variables.cpp
index c36d198..65e32ad 100644
--- a/src/glsl/builtin_variables.cpp
+++ b/src/glsl/builtin_variables.cpp
@@ -724,6 +724,10 @@ builtin_variable_generator::generate_constants()
       add_const("gl_MaxCombinedImageUniforms",
                 state->Const.MaxCombinedImageUniforms);
    }
+
+   if (state->is_version(410, 0) ||
+       state->ARB_viewport_array_enable)
+      add_const("gl_MaxViewports", state->Const.MaxViewports);
 }
 
 
diff --git a/src/glsl/glsl_parser_extras.cpp b/src/glsl/glsl_parser_extras.cpp
index 27e3301..2fc37da 100644
--- a/src/glsl/glsl_parser_extras.cpp
+++ b/src/glsl/glsl_parser_extras.cpp
@@ -134,6 +134,9 @@ _mesa_glsl_parse_state::_mesa_glsl_parse_state(struct gl_context *_ctx,
    this->Const.MaxFragmentImageUniforms = ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxImageUniforms;
    this->Const.MaxCombinedImageUniforms = ctx->Const.MaxCombinedImageUniforms;
 
+   /* ARB_viewport_array */
+   this->Const.MaxViewports = ctx->Const.MaxViewports;
+
    this->current_function = NULL;
    this->toplevel_ir = NULL;
    this->found_return = false;
diff --git a/src/glsl/glsl_parser_extras.h b/src/glsl/glsl_parser_extras.h
index c14d74c..c87c0e1 100644
--- a/src/glsl/glsl_parser_extras.h
+++ b/src/glsl/glsl_parser_extras.h
@@ -343,6 +343,9 @@ struct _mesa_glsl_parse_state {
       unsigned MaxGeometryImageUniforms;
       unsigned MaxFragmentImageUniforms;
       unsigned MaxCombinedImageUniforms;
+
+      /* ARB_viewport_array */
+      unsigned MaxViewports;
    } Const;
 
    /**

commit 2d669f6583bfa788f479d1607c6aa1e21c426ce2
Author: Andres Gomez <agomez@igalia.com>
Date:   Fri Dec 12 17:19:07 2014 +0100

    i965/brw_reg: struct constructor now needs explicit negate and abs values.
    
    We were assuming, when constructing a new brw_reg struct, that the
    negate and abs register modifiers would not be present by default in
    the new register.
    
    Now, we force explicitly setting these values when constructing a new
    register.
    
    This will avoid problems like forgetting to properly set them when we
    are using a previous register to generate this new register, as it was
    happening in the dFdx and dFdy generation functions.
    
    Fixes piglit test shaders/glsl-deriv-varyings
    
    Cc: "10.4 10.3" <mesa-stable@lists.freedesktop.org>
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82991
    Reviewed-by: Matt Turner <mattst88@gmail.com>
    (cherry picked from commit 8517e665bc4c378e8e7523827090fd1b06abaecd)

diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index 0622b07..d011e77 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -718,12 +718,14 @@ fs_generator::generate_ddx(fs_inst *inst, struct brw_reg dst, struct brw_reg src
    }
 
    struct brw_reg src0 = brw_reg(src.file, src.nr, 1,
+                                 src.negate, src.abs,
 				 BRW_REGISTER_TYPE_F,
 				 vstride,
 				 width,
 				 BRW_HORIZONTAL_STRIDE_0,
 				 BRW_SWIZZLE_XYZW, WRITEMASK_XYZW);
    struct brw_reg src1 = brw_reg(src.file, src.nr, 0,
+                                 src.negate, src.abs,
 				 BRW_REGISTER_TYPE_F,
 				 vstride,
 				 width,
@@ -776,12 +778,14 @@ fs_generator::generate_ddy(fs_inst *inst, struct brw_reg dst, struct brw_reg src
 
       /* produce accurate derivatives */
       struct brw_reg src0 = brw_reg(src.file, src.nr, 0,
+                                    src.negate, src.abs,
                                     BRW_REGISTER_TYPE_F,
                                     BRW_VERTICAL_STRIDE_4,
                                     BRW_WIDTH_4,
                                     BRW_HORIZONTAL_STRIDE_1,
                                     BRW_SWIZZLE_XYXY, WRITEMASK_XYZW);
       struct brw_reg src1 = brw_reg(src.file, src.nr, 0,
+                                    src.negate, src.abs,
                                     BRW_REGISTER_TYPE_F,
                                     BRW_VERTICAL_STRIDE_4,
                                     BRW_WIDTH_4,
@@ -810,12 +814,14 @@ fs_generator::generate_ddy(fs_inst *inst, struct brw_reg dst, struct brw_reg src
    } else {
       /* replicate the derivative at the top-left pixel to other pixels */
       struct brw_reg src0 = brw_reg(src.file, src.nr, 0,
+                                    src.negate, src.abs,
                                     BRW_REGISTER_TYPE_F,
                                     BRW_VERTICAL_STRIDE_4,
                                     BRW_WIDTH_4,
                                     BRW_HORIZONTAL_STRIDE_0,
                                     BRW_SWIZZLE_XYZW, WRITEMASK_XYZW);
       struct brw_reg src1 = brw_reg(src.file, src.nr, 2,
+                                    src.negate, src.abs,
                                     BRW_REGISTER_TYPE_F,
                                     BRW_VERTICAL_STRIDE_4,
                                     BRW_WIDTH_4,
diff --git a/src/mesa/drivers/dri/i965/brw_reg.h b/src/mesa/drivers/dri/i965/brw_reg.h
index 19af0ae..43efe04 100644
--- a/src/mesa/drivers/dri/i965/brw_reg.h
+++ b/src/mesa/drivers/dri/i965/brw_reg.h
@@ -218,6 +218,8 @@ type_is_signed(unsigned type)
  * \param file      one of the BRW_x_REGISTER_FILE values
  * \param nr        register number/index
  * \param subnr     register sub number
+ * \param negate    register negate modifier
+ * \param abs       register abs modifier
  * \param type      one of BRW_REGISTER_TYPE_x
  * \param vstride   one of BRW_VERTICAL_STRIDE_x
  * \param width     one of BRW_WIDTH_x
@@ -229,6 +231,8 @@ static inline struct brw_reg
 brw_reg(unsigned file,
         unsigned nr,
         unsigned subnr,
+        unsigned negate,
+        unsigned abs,
         enum brw_reg_type type,
         unsigned vstride,
         unsigned width,
@@ -248,8 +252,8 @@ brw_reg(unsigned file,
    reg.file = file;
    reg.nr = nr;
    reg.subnr = subnr * type_sz(type);
-   reg.negate = 0;
-   reg.abs = 0;
+   reg.negate = negate;
+   reg.abs = abs;
    reg.vstride = vstride;
    reg.width = width;
    reg.hstride = hstride;
@@ -276,6 +280,8 @@ brw_vec16_reg(unsigned file, unsigned nr, unsigned subnr)
    return brw_reg(file,
                   nr,
                   subnr,
+                  0,
+                  0,
                   BRW_REGISTER_TYPE_F,
                   BRW_VERTICAL_STRIDE_16,
                   BRW_WIDTH_16,
@@ -291,6 +297,8 @@ brw_vec8_reg(unsigned file, unsigned nr, unsigned subnr)
    return brw_reg(file,
                   nr,
                   subnr,
+                  0,
+                  0,
                   BRW_REGISTER_TYPE_F,
                   BRW_VERTICAL_STRIDE_8,
                   BRW_WIDTH_8,
@@ -306,6 +314,8 @@ brw_vec4_reg(unsigned file, unsigned nr, unsigned subnr)
    return brw_reg(file,
                   nr,
                   subnr,
+                  0,
+                  0,
                   BRW_REGISTER_TYPE_F,
                   BRW_VERTICAL_STRIDE_4,
                   BRW_WIDTH_4,
@@ -321,6 +331,8 @@ brw_vec2_reg(unsigned file, unsigned nr, unsigned subnr)
    return brw_reg(file,
                   nr,
                   subnr,
+                  0,
+                  0,
                   BRW_REGISTER_TYPE_F,
                   BRW_VERTICAL_STRIDE_2,
                   BRW_WIDTH_2,
@@ -336,6 +348,8 @@ brw_vec1_reg(unsigned file, unsigned nr, unsigned subnr)
    return brw_reg(file,
                   nr,
                   subnr,
+                  0,
+                  0,
                   BRW_REGISTER_TYPE_F,
                   BRW_VERTICAL_STRIDE_0,
                   BRW_WIDTH_1,
@@ -437,6 +451,8 @@ brw_imm_reg(enum brw_reg_type type)
    return brw_reg(BRW_IMMEDIATE_VALUE,
                   0,
                   0,
+                  0,
+                  0,
                   type,
                   BRW_VERTICAL_STRIDE_0,
                   BRW_WIDTH_1,
@@ -630,6 +646,8 @@ brw_ip_reg(void)
    return brw_reg(BRW_ARCHITECTURE_REGISTER_FILE,
                   BRW_ARF_IP,
                   0,
+                  0,
+                  0,
                   BRW_REGISTER_TYPE_UD,
                   BRW_VERTICAL_STRIDE_4, /* ? */
                   BRW_WIDTH_1,
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index df589b8..b56f213 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -1630,6 +1630,8 @@ vec4_visitor::get_timestamp()
    src_reg ts = src_reg(brw_reg(BRW_ARCHITECTURE_REGISTER_FILE,
                                 BRW_ARF_TIMESTAMP,
                                 0,
+                                0,
+                                0,
                                 BRW_REGISTER_TYPE_UD,
                                 BRW_VERTICAL_STRIDE_0,
                                 BRW_WIDTH_4,

commit bccfe7ae0f4e11a0219eb92f7070b1fc70bc6fd6
Author: Mario Kleiner <mario.kleiner.de@gmail.com>
Date:   Fri Dec 5 08:42:32 2014 +0100

    glx/dri3: Don't fail on glXSwapBuffersMscOML(dpy, window, 0, 0, 0) (v2)
    
    glXSwapBuffersMscOML() with target_msc=divisor=remainder=0 gets
    translated into target_msc=divisor=0 but remainder=1 by the mesa
    api. This is done for server DRI2 where there needs to be a way
    to tell the server-side DRI2ScheduleSwap implementation if a call
    to glXSwapBuffers() or glXSwapBuffersMscOML(dpy,window,0,0,0) was
    done. remainder = 1 was (ab)used as a flag to tell the server to
    select proper semantic. The DRI3/Present backend ignored this
    signalling, treated any target_msc=0 as glXSwapBuffers() request,
    and called xcb_present_pixmap with invalid divisor=0, remainder=1
    combo. The present extension responded kindly to this with a
    BadValue error and dropped the request, but mesa's DRI3/Present
    backend doesn't check for error codes. From there on stuff went
    downhill quickly for the calling OpenGL client...
    
    This patch fixes the problem.
    
    v2: Change comments to be more clear, with reference to
    relevant spec, as suggested by Eric Anholt.
    
    Cc: "10.3 10.4" <mesa-stable@lists.freedesktop.org>
    Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
    Reviewed-by: Axel Davy <axel.davy@ens.fr>
    Reviewed-by: Eric Anholt <eric@anholt.net>
    (cherry picked from commit 0d7f4c8658e00d30a1b0c3f2d803378eaa0717c7)

diff --git a/src/glx/dri3_glx.c b/src/glx/dri3_glx.c
index 3f5e64c..1ddc723 100644
--- a/src/glx/dri3_glx.c
+++ b/src/glx/dri3_glx.c
@@ -1560,11 +1560,24 @@ dri3_swap_buffers(__GLXDRIdrawable *pdraw, int64_t target_msc, int64_t divisor,
       dri3_fence_reset(c, back);
 
       /* Compute when we want the frame shown by taking the last known successful
-       * MSC and adding in a swap interval for each outstanding swap request
+       * MSC and adding in a swap interval for each outstanding swap request.
+       * target_msc=divisor=remainder=0 means "Use glXSwapBuffers() semantic"
        */
       ++priv->send_sbc;
-      if (target_msc == 0)
+      if (target_msc == 0 && divisor == 0 && remainder == 0)
          target_msc = priv->msc + priv->swap_interval * (priv->send_sbc - priv->recv_sbc);
+      else if (divisor == 0 && remainder > 0) {
+         /* From the GLX_OML_sync_control spec:
+          *
+          *     "If <divisor> = 0, the swap will occur when MSC becomes
+          *      greater than or equal to <target_msc>."
+          *
+          * Note that there's no mention of the remainder.  The Present extension
+          * throws BadValue for remainder != 0 with divisor == 0, so just drop
+          * the passed in value.
+          */
+         remainder = 0;
+      }
 
       /* From the GLX_EXT_swap_control spec:
        *

commit ee241a688904211663e9445ed90e6d51aca3204f
Author: Mario Kleiner <mario.kleiner.de@gmail.com>
Date:   Fri Dec 5 08:42:31 2014 +0100

    glx/dri3: Request non-vsynced Present for swapinterval zero. (v3)
    
    Restores proper immediate tearing swap behaviour for
    OpenGL bufferswap under DRI3/Present.
    
    Cc: "10.3 10.4" <mesa-stable@lists.freedesktop.org>
    
    v2: Add Frank Binns signed off by for his original earlier
    patch from April 2014, which is identical to this one, and
    Chris Wilsons reviewed tag from May 2014 for that patch, ergo
    also for this one.
    
    v3: Incorporate comment about triple buffering as suggested
    by Axel Davy, and reference to relevant spec provided by
    Eric Anholt.
    
    Signed-off-by: Frank Binns <frank.binns@imgtec.com>
    Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
    Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
    Reviewed-by: Axel Davy <axel.davy@ens.fr>
    Reviewed-by: Eric Anholt <eric@anholt.net>
    (cherry picked from commit 455d3036fab2c5da7e589644f12435fb104a69fc)

diff --git a/src/glx/dri3_glx.c b/src/glx/dri3_glx.c
index b89cb46..3f5e64c 100644
--- a/src/glx/dri3_glx.c
+++ b/src/glx/dri3_glx.c
@@ -1526,6 +1526,7 @@ dri3_swap_buffers(__GLXDRIdrawable *pdraw, int64_t target_msc, int64_t divisor,
    xcb_connection_t *c = XGetXCBConnection(dpy);
    struct dri3_buffer *back;
    int64_t ret = 0;
+   uint32_t options = XCB_PRESENT_OPTION_NONE;
 
    unsigned flags = __DRI2_FLUSH_DRAWABLE;
    if (flush)
@@ -1565,6 +1566,17 @@ dri3_swap_buffers(__GLXDRIdrawable *pdraw, int64_t target_msc, int64_t divisor,
       if (target_msc == 0)
          target_msc = priv->msc + priv->swap_interval * (priv->send_sbc - priv->recv_sbc);
 
+      /* From the GLX_EXT_swap_control spec:
+       *
+       *     "If <interval> is set to a value of 0, buffer swaps are not
+       *      synchronized to a video frame."
+       *
+       * Implementation note: It is possible to enable triple buffering behaviour
+       * by not using XCB_PRESENT_OPTION_ASYNC, but this should not be the default.
+       */
+      if (priv->swap_interval == 0)
+          options |= XCB_PRESENT_OPTION_ASYNC;
+
       back->busy = 1;
       back->last_swap = priv->send_sbc;
       xcb_present_pixmap(c,
@@ -1578,7 +1590,7 @@ dri3_swap_buffers(__GLXDRIdrawable *pdraw, int64_t target_msc, int64_t divisor,
                          None,                                 /* target_crtc */
                          None,
                          back->sync_fence,
-                         XCB_PRESENT_OPTION_NONE,
+                         options,
                          target_msc,
                          divisor,
                          remainder, 0, NULL);

commit 4b37a18da5f5a41b619fa3673660f822d573782d
Author: Mario Kleiner <mario.kleiner.de@gmail.com>
Date:   Fri Dec 5 08:42:30 2014 +0100

    glx/dri3: Track separate (ust, msc) for PresentPixmap vs. PresentNotifyMsc (v2)
    
    Prevent calls to glXGetSyncValuesOML() and glXWaitForMscOML()
    from overwriting the (ust,msc) values of the last successfull
    swapbuffers call (PresentPixmapCompleteNotify event), as
    glXWaitForSbcOML() relies on those values corresponding to
    the most recent completed swap, not to whatever was last
    returned from the server.
    
    Problematic call sequence without this patch would have been, e.g.,
    
    glXSwapBuffers()
    ... wait ...
    swap completes -> PresentPixmapComplete event -> (ust,msc)
    updated to reflect swap completion time and count.
    ... wait for at least 1 video refresh cycle/vblank increment.
    
    glXGetSyncValuesOML()
    -> PresentNotifyMsc event overwrites (ust,msc) of swap
    completion with (ust,msc) of most recent vblank
    
    glXWaitForSbcOML()
    -> Returns sbc of last completed swap but (ust,msc) of last
    completed vblank, not of last completed swap.
    -> Client is confused.
    
    Do this by tracking a separate set of (ust, msc) for the
    dri3_wait_for_msc() call than for the dri3_wait_for_sbc()
    call.
    
    This makes the glXWaitForSbcOML() call robust again and restores
    consistent behaviour with the DRI2 implementation.
    
    Fixes applications originally written and tested against
    DRI2 which also rely on this not regressing under DRI3/Present,
    e.g., Neuro-Science software like Psychtoolbox-3.
    
    This patch fixes the problem.
    
    v2: Rename vblank_msc/ust to notify_msc/ust as suggested by
    Axel Davy for better clarity.
    
    Cc: "10.3 10.4" <mesa-stable@lists.freedesktop.org>
    Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
    Reviewed-by: Axel Davy <axel.davy@ens.fr>
    (cherry picked from commit ad8b0e8bf68850a57daba0b47629ca14807ea3ad)

diff --git a/src/glx/dri3_glx.c b/src/glx/dri3_glx.c
index 15d874d..b89cb46 100644
--- a/src/glx/dri3_glx.c
+++ b/src/glx/dri3_glx.c
@@ -420,11 +420,14 @@ dri3_handle_present_event(struct dri3_drawable *priv, xcb_present_generic_event_
 
          if (psc->show_fps_interval)
             show_fps(priv, ce->ust);
+
+         priv->ust = ce->ust;
+         priv->msc = ce->msc;
       } else {
          priv->recv_msc_serial = ce->serial;
+         priv->notify_ust = ce->ust;
+         priv->notify_msc = ce->msc;
       }
-      priv->ust = ce->ust;
-      priv->msc = ce->msc;
       break;
    }
    case XCB_PRESENT_EVENT_IDLE_NOTIFY: {
@@ -498,8 +501,8 @@ dri3_wait_for_msc(__GLXDRIdrawable *pdraw, int64_t target_msc, int64_t divisor,
       }
    }
 
-   *ust = priv->ust;
-   *msc = priv->msc;
+   *ust = priv->notify_ust;
+   *msc = priv->notify_msc;
    *sbc = priv->recv_sbc;
 
    return 1;
diff --git a/src/glx/dri3_priv.h b/src/glx/dri3_priv.h
index 8e46640..1604449 100644
--- a/src/glx/dri3_priv.h
+++ b/src/glx/dri3_priv.h
@@ -182,9 +182,12 @@ struct dri3_drawable {
    uint64_t send_sbc;
    uint64_t recv_sbc;
 
-   /* Last received UST/MSC values */
+   /* Last received UST/MSC values for pixmap present complete */
    uint64_t ust, msc;
 
+   /* Last received UST/MSC values from present notify msc event */
+   uint64_t notify_ust, notify_msc;
+
    /* Serial numbers for tracking wait_for_msc events */
    uint32_t send_msc_serial;
    uint32_t recv_msc_serial;

commit 93f6f55983f9c36ac52d8c4e6f89a0576c0d688f
Author: Mario Kleiner <mario.kleiner.de@gmail.com>
Date:   Fri Dec 5 08:42:29 2014 +0100

    glx/dri3: Fix glXWaitForSbcOML() to handle targetSBC==0 correctly. (v2)
    
    targetSBC == 0 is a special case, which asks the function
    to block until all pending OpenGL bufferswap requests have
    completed.
    
    Currently the function just falls through for targetSBC == 0,
    returning bogus results.
    
    This breaks applications originally written and tested against
    DRI2 which also rely on this not regressing under DRI3/Present,
    e.g., Neuro-Science software like Psychtoolbox-3.
    
    This patch fixes the problem.
    
    v2: Simplify as suggested by Axel Davy. Add comments proposed
    by Eric Anholt.
    
    Cc: "10.3 10.4" <mesa-stable@lists.freedesktop.org>
    Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
    Reviewed-by: Axel Davy <axel.davy@ens.fr>
    Reviewed-by: Eric Anholt <eric@anholt.net>
    (cherry picked from commit 8cab54de16f4691672533967daa79c9cfa2e24cc)

diff --git a/src/glx/dri3_glx.c b/src/glx/dri3_glx.c
index a9ff73b..15d874d 100644
--- a/src/glx/dri3_glx.c
+++ b/src/glx/dri3_glx.c
@@ -529,6 +529,15 @@ dri3_wait_for_sbc(__GLXDRIdrawable *pdraw, int64_t target_sbc, int64_t *ust,
 {
    struct dri3_drawable *priv = (struct dri3_drawable *) pdraw;
 
+   /* From the GLX_OML_sync_control spec:
+    *
+    *     "If <target_sbc> = 0, the function will block until all previous
+    *      swaps requested with glXSwapBuffersMscOML for that window have
+    *      completed."
+    */
+   if (!target_sbc)
+      target_sbc = priv->send_sbc;
+
    while (priv->recv_sbc < target_sbc) {
       if (!dri3_wait_for_event(pdraw))
          return 0;

commit af0c82099b955f10471c15cb7a4dc8db29b84963
Author: Emil Velikov <emil.l.velikov@gmail.com>
Date:   Sun Dec 14 13:57:54 2014 +0000

    docs: Add 10.4 sha256 sums, news item and link release notes
    
    Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

diff --git a/docs/index.html b/docs/index.html
index 3cdf4f6..c0522b8 100644
--- a/docs/index.html
+++ b/docs/index.html
@@ -16,6 +16,13 @@
 
 <h1>News</h1>
 
+<h2>December 14, 2014</h2>
+<p>
+<a href="relnotes/10.4.html">Mesa 10.4</a> is released.  This is a new
+development release.  See the release notes for more information about
+the release.
+</p>
+
 <h2>November 8, 2014</h2>
 <p>
 <a href="relnotes/10.3.3.html">Mesa 10.3.3</a> is released.
diff --git a/docs/relnotes.html b/docs/relnotes.html
index ae6e328..a4cc9a8 100644
--- a/docs/relnotes.html
+++ b/docs/relnotes.html
@@ -21,6 +21,7 @@ The release notes summarize what's new or changed in each Mesa release.
 </p>
 
 <ul>
+<li><a href="relnotes/10.4.html">10.4 release notes</a>
 <li><a href="relnotes/10.3.3.html">10.3.3 release notes</a>
 <li><a href="relnotes/10.3.2.html">10.3.2 release notes</a>
 <li><a href="relnotes/10.3.1.html">10.3.1 release notes</a>
diff --git a/docs/relnotes/10.4.html b/docs/relnotes/10.4.html
index d816cdb..f46fd68 100644
--- a/docs/relnotes/10.4.html
+++ b/docs/relnotes/10.4.html
@@ -31,9 +31,11 @@ because compatibility contexts are not supported.
 </p>
 
 
-<h2>MD5 checksums</h2>
+<h2>SHA256 checksums</h2>
 <pre>
-TBD.
+abfbfd2d91ce81491c5bb6923ae649212ad5f82d0bee277de8704cc948dc221e  MesaLib-10.4.0.tar.gz
+98a7dff3a1a6708c79789de8b9a05d8042e867067f70e8f30387c15026233219  MesaLib-10.4.0.tar.bz2
+443a6d46d0691b5ac811d8d30091b1716c365689b16d49c57cf273c2b76086fe  MesaLib-10.4.0.zip
 </pre>
 
 

commit 5fe79b0b1272d530371a5d7248ed378cff4f6d21
Author: Emil Velikov <emil.l.velikov@gmail.com>
Date:   Sun Dec 14 13:45:54 2014 +0000

    docs: Update 10.4.0 release notes
    
    Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

diff --git a/docs/relnotes/10.4.html b/docs/relnotes/10.4.html
index 0f29478..d816cdb 100644
--- a/docs/relnotes/10.4.html
+++ b/docs/relnotes/10.4.html
@@ -14,7 +14,7 @@
 <iframe src="../contents.html"></iframe>
 <div class="content">
 
-<h1>Mesa 10.4 Release Notes / TBD</h1>
+<h1>Mesa 10.4 Release Notes / December 14, 2014</h1>
 
 <p>
 Mesa 10.4 is a new development release.
@@ -54,7 +54,197 @@ Note: some of the new features are only available with certain drivers.
 
 <h2>Bug fixes</h2>
 
-TBD.
+<p>This list is likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=79963";>Bug 79963</a> - [ILK Bisected]some piglit and ogles2conform cases fail </li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=29661";>Bug 29661</a> - MSVC built u_format_test fails on Windows</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=38873";>Bug 38873</a> - [855gm] gnome-shell misrendered</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=54372";>Bug 54372</a> - GLX_INTEL_swap_event crashes driver when swapping window buffers</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=60879";>Bug 60879</a> - [radeonsi] X11 can't start with acceleration enabled</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=61415";>Bug 61415</a> - Clover ignores --with-opencl-libdir path</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=64471";>Bug 64471</a> - Radeon HD6570 lockup in Brütal Legend with HyperZ</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=66184";>Bug 66184</a> - src/mesa/state_tracker/st_glsl_to_tgsi.cpp:3216:simplify_cmp: Assertion `inst-&gt;dst.index &lt; 4096' failed.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=67672";>Bug 67672</a> - [llvmpipe] lp_test_arit fails on old CPUs</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=69200";>Bug 69200</a> - [Bisected]Piglit glx/glx-multithread-shader-compile aborted</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=70410";>Bug 70410</a> - egl-static/Makefile: linking fails with llvm &gt;= 3.4</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=72685";>Bug 72685</a> - [radeonsi hyperz] Artifacts in Unigine Sanctuary</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=72819";>Bug 72819</a> - [855GM] Incorrect drop shadow color on windows and strange white rectangle when showing/hiding GLX-dock...</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=74563";>Bug 74563</a> - Surfaceless contexts are not properly released by DRI drivers</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=74863";>Bug 74863</a> - [r600g] HyperZ broken on RV770 and CYPRESS (Left 4 Dead 2 trees corruption) bisected!</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=75011";>Bug 75011</a> - [hyperz] Performance drop since git-01e6371 (disable hyperz by default) with radeonsi</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=75112";>Bug 75112</a> - Meta Bug for HyperZ issues on r600g and radeonsi</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=76252";>Bug 76252</a> - Dynamic loading/unloading of opengl32.dll results in a deadlock</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=76861";>Bug 76861</a> - mid3 generates slow code for constant arguments</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=77957";>Bug 77957</a> - Variably-indexed constant arrays result in terrible shader code</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=78468";>Bug 78468</a> - Compiling of shader gets stuck in infinite loop</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=78770";>Bug 78770</a> - [SNB bisected]Webglc conformance/textures/texture-size-limit.html fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=79155";>Bug 79155</a> - [Tesseract Game] Global Illumination: Medium Causes Color Distortion</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=79462";>Bug 79462</a> - [NVC0/Codegen] Shader compilation falis in spill logic</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=80011";>Bug 80011</a> - [softpipe] tgsi/tgsi_exec.c:2023:exec_txf: Assertion `0' failed.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=80012";>Bug 80012</a> - [softpipe] draw/draw_gs.c:113:tgsi_fetch_gs_outputs: Assertion `!util_is_inf_or_nan(output[slot][0])' failed.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=80050";>Bug 80050</a> - [855GM] Incorrect drop shadow color under windows in Cinnamon persists with MESA 10.1.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=80247";>Bug 80247</a> - Khronos conformance test  ES3-CTS.gtf.GL3Tests.transform_feedback.transform_feedback_vertex_id  fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=80561";>Bug 80561</a> - Incorrect implementation of some VDPAU APIs.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=80615";>Bug 80615</a> - Files in bellagio directory [omx tracker] don't respect installation folder</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=80848";>Bug 80848</a> - [dri3] Building mesa fails with dri3 enabled</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=81680";>Bug 81680</a> - [r600g] Firefox crashes with hardware acceleration turned on</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82255";>Bug 82255</a> - [VP2] Chroma planes are vertically stretched during VDPAU playback</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82472";>Bug 82472</a> - piglit 16385-consecutive-chars regression</li>


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