xserver-xorg-video-ati: Changes to 'upstream-unstable'
.dir-locals.el | 12
configure.ac | 9
man/radeon.man | 3
src/Makefile.am | 1
src/ati_pciids_gen.h | 7
src/cayman_accel.c | 1
src/drmmode_display.c | 17
src/evergreen_accel.c | 1
src/pcidb/ati_pciids.csv | 9
src/r6xx_accel.c | 1
src/radeon.h | 2
src/radeon_chipinfo_gen.h | 7
src/radeon_chipset_gen.h | 7
src/radeon_drm.h | 920 --------------------------------------
src/radeon_exa.c | 1
src/radeon_kms.c | 34 -
src/radeon_pci_chipset_gen.h | 7
src/radeon_pci_device_match_gen.h | 7
src/radeon_vbo.c | 1
src/radeon_video.c | 2
20 files changed, 91 insertions(+), 958 deletions(-)
New commits:
commit 068a59e010ce6bfcd54f5a18cc08c55c54b8618d
Author: Alex Deucher <alexander.deucher@amd.com>
Date: Wed Oct 1 23:38:52 2014 -0400
radeon: bump version for release
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
diff --git a/configure.ac b/configure.ac
index e4aaab2..d30efaf 100644
--- a/configure.ac
+++ b/configure.ac
@@ -23,7 +23,7 @@
# Initialize Autoconf
AC_PREREQ([2.60])
AC_INIT([xf86-video-ati],
- [7.4.99],
+ [7.5.0],
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg],
[xf86-video-ati])
commit 5fee565e420d3efbf72fdf4f63c3d5d93d8ceddb
Author: Alex Deucher <alexander.deucher@amd.com>
Date: Wed Oct 1 23:36:31 2014 -0400
radeon: require libdrm_radeon 2.4.58 for latest SI/CI pci ids
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
diff --git a/configure.ac b/configure.ac
index e74a0a2..e4aaab2 100644
--- a/configure.ac
+++ b/configure.ac
@@ -71,7 +71,7 @@ XORG_DRIVER_CHECK_EXT(XV, videoproto)
XORG_DRIVER_CHECK_EXT(DPMSExtension, xextproto)
# Checks for libraries.
-PKG_CHECK_MODULES(LIBDRM, [libdrm >= 2.4.54])
+PKG_CHECK_MODULES(LIBDRM, [libdrm >= 2.4.58])
PKG_CHECK_MODULES(LIBDRM_RADEON, [libdrm_radeon])
# Obtain compiler/linker options for the driver dependencies
commit 56c7fb8ada4cd9cf096c6b06a8d368d286d74e68
Author: Thomas DeRensis <tderensis@gmail.com>
Date: Wed Sep 10 21:20:32 2014 -0400
radeon: fix build warnings regarding const qualifier
Signed-off-by: Thomas DeRensis <tderensis@gmail.com>
diff --git a/src/radeon_kms.c b/src/radeon_kms.c
index 6f0f1a1..1703349 100644
--- a/src/radeon_kms.c
+++ b/src/radeon_kms.c
@@ -1209,7 +1209,7 @@ Bool RADEONScreenInit_KMS(SCREEN_INIT_ARGS_DECL)
ScrnInfoPtr pScrn = xf86ScreenToScrn(pScreen);
RADEONInfoPtr info = RADEONPTR(pScrn);
int subPixelOrder = SubPixelUnknown;
- char* s;
+ const char *s;
void *front_ptr;
pScrn->fbOffset = 0;
diff --git a/src/radeon_video.c b/src/radeon_video.c
index 5349d11..cbfd554 100644
--- a/src/radeon_video.c
+++ b/src/radeon_video.c
@@ -188,7 +188,7 @@ void RADEONInitVideo(ScreenPtr pScreen)
xf86XVScreenInit(pScreen, adaptors, num_adaptors);
if(texturedAdaptor) {
- XF86MCAdaptorPtr xvmcAdaptor = RADEONCreateAdaptorXvMC(pScreen, texturedAdaptor->name);
+ XF86MCAdaptorPtr xvmcAdaptor = RADEONCreateAdaptorXvMC(pScreen, (char *)texturedAdaptor->name);
if(xvmcAdaptor) {
if(!xf86XvMCScreenInit(pScreen, 1, &xvmcAdaptor))
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "[XvMC] Failed to initialize extension.\n");
commit b9a9b244336ed50d7df4f36135f875a3bb6ca948
Author: Thomas DeRensis <tderensis@gmail.com>
Date: Thu Sep 4 21:45:19 2014 -0400
radeon: fix a leak in radeon_vbo_get_bo()
The dma_bo struct was never freed in the error path. Reported by cppcheck.
Signed-off-by: Thomas DeRensis <tderensis@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
diff --git a/src/radeon_vbo.c b/src/radeon_vbo.c
index 1924772..6b0d278 100644
--- a/src/radeon_vbo.c
+++ b/src/radeon_vbo.c
@@ -185,6 +185,7 @@ again_alloc:
if (!dma_bo->bo) {
ErrorF("failure to allocate DMA BO\n");
+ free(dma_bo);
return NULL;
}
insert_at_head(&accel_state->bo_reserved, dma_bo);
commit ba5fcc4d6b6eae3f2c55c6229a53d24d160789c1
Author: Alex Deucher <alexander.deucher@amd.com>
Date: Thu Aug 21 11:32:45 2014 -0400
radeon/kms: fix mullins pci id
strange errant change from:
39fef269f521c92a2a31c80447e9401bacb3797a
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
diff --git a/src/ati_pciids_gen.h b/src/ati_pciids_gen.h
index e59cd59..d867fa7 100644
--- a/src/ati_pciids_gen.h
+++ b/src/ati_pciids_gen.h
@@ -733,7 +733,7 @@
#define PCI_CHIP_MULLINS_9852 0x9852
#define PCI_CHIP_MULLINS_9853 0x9853
#define PCI_CHIP_MULLINS_9854 0x9854
-#define PCI_CHIP_MULLINS_9855 0x9845
+#define PCI_CHIP_MULLINS_9855 0x9855
#define PCI_CHIP_MULLINS_9856 0x9856
#define PCI_CHIP_MULLINS_9857 0x9857
#define PCI_CHIP_MULLINS_9858 0x9858
diff --git a/src/pcidb/ati_pciids.csv b/src/pcidb/ati_pciids.csv
index a3168a3..1c92f5b 100644
--- a/src/pcidb/ati_pciids.csv
+++ b/src/pcidb/ati_pciids.csv
@@ -734,7 +734,7 @@
"0x9852","MULLINS_9852","MULLINS",1,1,,,1,"MULLINS"
"0x9853","MULLINS_9853","MULLINS",1,1,,,1,"MULLINS"
"0x9854","MULLINS_9854","MULLINS",1,1,,,1,"MULLINS"
-"0x9845","MULLINS_9855","MULLINS",1,1,,,1,"MULLINS"
+"0x9855","MULLINS_9855","MULLINS",1,1,,,1,"MULLINS"
"0x9856","MULLINS_9856","MULLINS",1,1,,,1,"MULLINS"
"0x9857","MULLINS_9857","MULLINS",1,1,,,1,"MULLINS"
"0x9858","MULLINS_9858","MULLINS",1,1,,,1,"MULLINS"
diff --git a/src/radeon_chipinfo_gen.h b/src/radeon_chipinfo_gen.h
index dc9866f..40577c9 100644
--- a/src/radeon_chipinfo_gen.h
+++ b/src/radeon_chipinfo_gen.h
@@ -653,7 +653,7 @@ static RADEONCardInfo RADEONCards[] = {
{ 0x9852, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 },
{ 0x9853, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 },
{ 0x9854, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 },
- { 0x9845, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 },
+ { 0x9855, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 },
{ 0x9856, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 },
{ 0x9857, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 },
{ 0x9858, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 },
commit efef34930650d6d80f7b527f4cee76d9e5954ace
Author: Alex Deucher <alexander.deucher@amd.com>
Date: Thu Aug 21 11:30:17 2014 -0400
radeon/kms: add new SI pci ids
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
diff --git a/src/ati_pciids_gen.h b/src/ati_pciids_gen.h
index c552678..e59cd59 100644
--- a/src/ati_pciids_gen.h
+++ b/src/ati_pciids_gen.h
@@ -668,6 +668,7 @@
#define PCI_CHIP_VERDE_6829 0x6829
#define PCI_CHIP_VERDE_682A 0x682A
#define PCI_CHIP_VERDE_682B 0x682B
+#define PCI_CHIP_VERDE_682C 0x682C
#define PCI_CHIP_VERDE_682D 0x682D
#define PCI_CHIP_VERDE_682F 0x682F
#define PCI_CHIP_VERDE_6830 0x6830
@@ -683,8 +684,11 @@
#define PCI_CHIP_OLAND_6601 0x6601
#define PCI_CHIP_OLAND_6602 0x6602
#define PCI_CHIP_OLAND_6603 0x6603
+#define PCI_CHIP_OLAND_6604 0x6604
+#define PCI_CHIP_OLAND_6605 0x6605
#define PCI_CHIP_OLAND_6606 0x6606
#define PCI_CHIP_OLAND_6607 0x6607
+#define PCI_CHIP_OLAND_6608 0x6608
#define PCI_CHIP_OLAND_6610 0x6610
#define PCI_CHIP_OLAND_6611 0x6611
#define PCI_CHIP_OLAND_6613 0x6613
diff --git a/src/pcidb/ati_pciids.csv b/src/pcidb/ati_pciids.csv
index e9db795..a3168a3 100644
--- a/src/pcidb/ati_pciids.csv
+++ b/src/pcidb/ati_pciids.csv
@@ -669,6 +669,7 @@
"0x6829","VERDE_6829","VERDE",,,,,,"VERDE"
"0x682A","VERDE_682A","VERDE",1,,,,,"VERDE"
"0x682B","VERDE_682B","VERDE",1,,,,,"VERDE"
+"0x682C","VERDE_682C","VERDE",,,,,,"VERDE"
"0x682D","VERDE_682D","VERDE",1,,,,,"VERDE"
"0x682F","VERDE_682F","VERDE",1,,,,,"VERDE"
"0x6830","VERDE_6830","VERDE",1,,,,,"VERDE"
@@ -684,8 +685,11 @@
"0x6601","OLAND_6601","OLAND",1,,,,,"OLAND"
"0x6602","OLAND_6602","OLAND",1,,,,,"OLAND"
"0x6603","OLAND_6603","OLAND",1,,,,,"OLAND"
+"0x6604","OLAND_6604","OLAND",1,,,,,"OLAND"
+"0x6605","OLAND_6605","OLAND",1,,,,,"OLAND"
"0x6606","OLAND_6606","OLAND",1,,,,,"OLAND"
"0x6607","OLAND_6607","OLAND",1,,,,,"OLAND"
+"0x6608","OLAND_6608","OLAND",,,,,,"OLAND"
"0x6610","OLAND_6610","OLAND",,,,,,"OLAND"
"0x6611","OLAND_6611","OLAND",,,,,,"OLAND"
"0x6613","OLAND_6613","OLAND",,,,,,"OLAND"
diff --git a/src/radeon_chipinfo_gen.h b/src/radeon_chipinfo_gen.h
index c853d41..dc9866f 100644
--- a/src/radeon_chipinfo_gen.h
+++ b/src/radeon_chipinfo_gen.h
@@ -588,6 +588,7 @@ static RADEONCardInfo RADEONCards[] = {
{ 0x6829, CHIP_FAMILY_VERDE, 0, 0, 0, 0, 0 },
{ 0x682A, CHIP_FAMILY_VERDE, 1, 0, 0, 0, 0 },
{ 0x682B, CHIP_FAMILY_VERDE, 1, 0, 0, 0, 0 },
+ { 0x682C, CHIP_FAMILY_VERDE, 0, 0, 0, 0, 0 },
{ 0x682D, CHIP_FAMILY_VERDE, 1, 0, 0, 0, 0 },
{ 0x682F, CHIP_FAMILY_VERDE, 1, 0, 0, 0, 0 },
{ 0x6830, CHIP_FAMILY_VERDE, 1, 0, 0, 0, 0 },
@@ -603,8 +604,11 @@ static RADEONCardInfo RADEONCards[] = {
{ 0x6601, CHIP_FAMILY_OLAND, 1, 0, 0, 0, 0 },
{ 0x6602, CHIP_FAMILY_OLAND, 1, 0, 0, 0, 0 },
{ 0x6603, CHIP_FAMILY_OLAND, 1, 0, 0, 0, 0 },
+ { 0x6604, CHIP_FAMILY_OLAND, 1, 0, 0, 0, 0 },
+ { 0x6605, CHIP_FAMILY_OLAND, 1, 0, 0, 0, 0 },
{ 0x6606, CHIP_FAMILY_OLAND, 1, 0, 0, 0, 0 },
{ 0x6607, CHIP_FAMILY_OLAND, 1, 0, 0, 0, 0 },
+ { 0x6608, CHIP_FAMILY_OLAND, 0, 0, 0, 0, 0 },
{ 0x6610, CHIP_FAMILY_OLAND, 0, 0, 0, 0, 0 },
{ 0x6611, CHIP_FAMILY_OLAND, 0, 0, 0, 0, 0 },
{ 0x6613, CHIP_FAMILY_OLAND, 0, 0, 0, 0, 0 },
diff --git a/src/radeon_chipset_gen.h b/src/radeon_chipset_gen.h
index 3b5edd4..e3f23b6 100644
--- a/src/radeon_chipset_gen.h
+++ b/src/radeon_chipset_gen.h
@@ -588,6 +588,7 @@ SymTabRec RADEONChipsets[] = {
{ PCI_CHIP_VERDE_6829, "VERDE" },
{ PCI_CHIP_VERDE_682A, "VERDE" },
{ PCI_CHIP_VERDE_682B, "VERDE" },
+ { PCI_CHIP_VERDE_682C, "VERDE" },
{ PCI_CHIP_VERDE_682D, "VERDE" },
{ PCI_CHIP_VERDE_682F, "VERDE" },
{ PCI_CHIP_VERDE_6830, "VERDE" },
@@ -603,8 +604,11 @@ SymTabRec RADEONChipsets[] = {
{ PCI_CHIP_OLAND_6601, "OLAND" },
{ PCI_CHIP_OLAND_6602, "OLAND" },
{ PCI_CHIP_OLAND_6603, "OLAND" },
+ { PCI_CHIP_OLAND_6604, "OLAND" },
+ { PCI_CHIP_OLAND_6605, "OLAND" },
{ PCI_CHIP_OLAND_6606, "OLAND" },
{ PCI_CHIP_OLAND_6607, "OLAND" },
+ { PCI_CHIP_OLAND_6608, "OLAND" },
{ PCI_CHIP_OLAND_6610, "OLAND" },
{ PCI_CHIP_OLAND_6611, "OLAND" },
{ PCI_CHIP_OLAND_6613, "OLAND" },
diff --git a/src/radeon_pci_chipset_gen.h b/src/radeon_pci_chipset_gen.h
index a7d8613..bd68920 100644
--- a/src/radeon_pci_chipset_gen.h
+++ b/src/radeon_pci_chipset_gen.h
@@ -588,6 +588,7 @@ static PciChipsets RADEONPciChipsets[] = {
{ PCI_CHIP_VERDE_6829, PCI_CHIP_VERDE_6829, RES_SHARED_VGA },
{ PCI_CHIP_VERDE_682A, PCI_CHIP_VERDE_682A, RES_SHARED_VGA },
{ PCI_CHIP_VERDE_682B, PCI_CHIP_VERDE_682B, RES_SHARED_VGA },
+ { PCI_CHIP_VERDE_682C, PCI_CHIP_VERDE_682C, RES_SHARED_VGA },
{ PCI_CHIP_VERDE_682D, PCI_CHIP_VERDE_682D, RES_SHARED_VGA },
{ PCI_CHIP_VERDE_682F, PCI_CHIP_VERDE_682F, RES_SHARED_VGA },
{ PCI_CHIP_VERDE_6830, PCI_CHIP_VERDE_6830, RES_SHARED_VGA },
@@ -603,8 +604,11 @@ static PciChipsets RADEONPciChipsets[] = {
{ PCI_CHIP_OLAND_6601, PCI_CHIP_OLAND_6601, RES_SHARED_VGA },
{ PCI_CHIP_OLAND_6602, PCI_CHIP_OLAND_6602, RES_SHARED_VGA },
{ PCI_CHIP_OLAND_6603, PCI_CHIP_OLAND_6603, RES_SHARED_VGA },
+ { PCI_CHIP_OLAND_6604, PCI_CHIP_OLAND_6604, RES_SHARED_VGA },
+ { PCI_CHIP_OLAND_6605, PCI_CHIP_OLAND_6605, RES_SHARED_VGA },
{ PCI_CHIP_OLAND_6606, PCI_CHIP_OLAND_6606, RES_SHARED_VGA },
{ PCI_CHIP_OLAND_6607, PCI_CHIP_OLAND_6607, RES_SHARED_VGA },
+ { PCI_CHIP_OLAND_6608, PCI_CHIP_OLAND_6608, RES_SHARED_VGA },
{ PCI_CHIP_OLAND_6610, PCI_CHIP_OLAND_6610, RES_SHARED_VGA },
{ PCI_CHIP_OLAND_6611, PCI_CHIP_OLAND_6611, RES_SHARED_VGA },
{ PCI_CHIP_OLAND_6613, PCI_CHIP_OLAND_6613, RES_SHARED_VGA },
diff --git a/src/radeon_pci_device_match_gen.h b/src/radeon_pci_device_match_gen.h
index a4ccb62..eaf280a 100644
--- a/src/radeon_pci_device_match_gen.h
+++ b/src/radeon_pci_device_match_gen.h
@@ -588,6 +588,7 @@ static const struct pci_id_match radeon_device_match[] = {
ATI_DEVICE_MATCH( PCI_CHIP_VERDE_6829, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_VERDE_682A, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_VERDE_682B, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_VERDE_682C, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_VERDE_682D, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_VERDE_682F, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_VERDE_6830, 0 ),
@@ -603,8 +604,11 @@ static const struct pci_id_match radeon_device_match[] = {
ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6601, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6602, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6603, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6604, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6605, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6606, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6607, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6608, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6610, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6611, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6613, 0 ),
commit 39fef269f521c92a2a31c80447e9401bacb3797a
Author: Alex Deucher <alexander.deucher@amd.com>
Date: Thu Aug 21 11:27:49 2014 -0400
radeon/kms: add new CIK pci ids
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
diff --git a/src/ati_pciids_gen.h b/src/ati_pciids_gen.h
index 94c8fc8..c552678 100644
--- a/src/ati_pciids_gen.h
+++ b/src/ati_pciids_gen.h
@@ -700,6 +700,8 @@
#define PCI_CHIP_HAINAN_666F 0x666F
#define PCI_CHIP_BONAIRE_6640 0x6640
#define PCI_CHIP_BONAIRE_6641 0x6641
+#define PCI_CHIP_BONAIRE_6646 0x6646
+#define PCI_CHIP_BONAIRE_6647 0x6647
#define PCI_CHIP_BONAIRE_6649 0x6649
#define PCI_CHIP_BONAIRE_6650 0x6650
#define PCI_CHIP_BONAIRE_6651 0x6651
@@ -727,7 +729,7 @@
#define PCI_CHIP_MULLINS_9852 0x9852
#define PCI_CHIP_MULLINS_9853 0x9853
#define PCI_CHIP_MULLINS_9854 0x9854
-#define PCI_CHIP_MULLINS_9855 0x9855
+#define PCI_CHIP_MULLINS_9855 0x9845
#define PCI_CHIP_MULLINS_9856 0x9856
#define PCI_CHIP_MULLINS_9857 0x9857
#define PCI_CHIP_MULLINS_9858 0x9858
@@ -756,6 +758,7 @@
#define PCI_CHIP_KAVERI_1315 0x1315
#define PCI_CHIP_KAVERI_1316 0x1316
#define PCI_CHIP_KAVERI_1317 0x1317
+#define PCI_CHIP_KAVERI_1318 0x1318
#define PCI_CHIP_KAVERI_131B 0x131B
#define PCI_CHIP_KAVERI_131C 0x131C
#define PCI_CHIP_KAVERI_131D 0x131D
diff --git a/src/pcidb/ati_pciids.csv b/src/pcidb/ati_pciids.csv
index e334230..e9db795 100644
--- a/src/pcidb/ati_pciids.csv
+++ b/src/pcidb/ati_pciids.csv
@@ -701,6 +701,8 @@
"0x666F","HAINAN_666F","HAINAN",1,,,,,"HAINAN"
"0x6640","BONAIRE_6640","BONAIRE",1,,,,,"BONAIRE"
"0x6641","BONAIRE_6641","BONAIRE",1,,,,,"BONAIRE"
+"0x6646","BONAIRE_6646","BONAIRE",1,,,,,"BONAIRE"
+"0x6647","BONAIRE_6647","BONAIRE",1,,,,,"BONAIRE"
"0x6649","BONAIRE_6649","BONAIRE",,,,,,"BONAIRE"
"0x6650","BONAIRE_6650","BONAIRE",,,,,,"BONAIRE"
"0x6651","BONAIRE_6651","BONAIRE",,,,,,"BONAIRE"
@@ -757,6 +759,7 @@
"0x1315","KAVERI_1315","KAVERI",,1,,,1,"KAVERI"
"0x1316","KAVERI_1316","KAVERI",,1,,,1,"KAVERI"
"0x1317","KAVERI_1317","KAVERI",1,1,,,1,"KAVERI"
+"0x1318","KAVERI_1318","KAVERI",1,1,,,1,"KAVERI"
"0x131B","KAVERI_131B","KAVERI",,1,,,1,"KAVERI"
"0x131C","KAVERI_131C","KAVERI",,1,,,1,"KAVERI"
"0x131D","KAVERI_131D","KAVERI",,1,,,1,"KAVERI"
diff --git a/src/radeon_chipinfo_gen.h b/src/radeon_chipinfo_gen.h
index 4f6e3bc..c853d41 100644
--- a/src/radeon_chipinfo_gen.h
+++ b/src/radeon_chipinfo_gen.h
@@ -620,6 +620,8 @@ static RADEONCardInfo RADEONCards[] = {
{ 0x666F, CHIP_FAMILY_HAINAN, 1, 0, 0, 0, 0 },
{ 0x6640, CHIP_FAMILY_BONAIRE, 1, 0, 0, 0, 0 },
{ 0x6641, CHIP_FAMILY_BONAIRE, 1, 0, 0, 0, 0 },
+ { 0x6646, CHIP_FAMILY_BONAIRE, 1, 0, 0, 0, 0 },
+ { 0x6647, CHIP_FAMILY_BONAIRE, 1, 0, 0, 0, 0 },
{ 0x6649, CHIP_FAMILY_BONAIRE, 0, 0, 0, 0, 0 },
{ 0x6650, CHIP_FAMILY_BONAIRE, 0, 0, 0, 0, 0 },
{ 0x6651, CHIP_FAMILY_BONAIRE, 0, 0, 0, 0, 0 },
@@ -647,7 +649,7 @@ static RADEONCardInfo RADEONCards[] = {
{ 0x9852, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 },
{ 0x9853, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 },
{ 0x9854, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 },
- { 0x9855, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 },
+ { 0x9845, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 },
{ 0x9856, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 },
{ 0x9857, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 },
{ 0x9858, CHIP_FAMILY_MULLINS, 1, 1, 0, 0, 1 },
@@ -676,6 +678,7 @@ static RADEONCardInfo RADEONCards[] = {
{ 0x1315, CHIP_FAMILY_KAVERI, 0, 1, 0, 0, 1 },
{ 0x1316, CHIP_FAMILY_KAVERI, 0, 1, 0, 0, 1 },
{ 0x1317, CHIP_FAMILY_KAVERI, 1, 1, 0, 0, 1 },
+ { 0x1318, CHIP_FAMILY_KAVERI, 1, 1, 0, 0, 1 },
{ 0x131B, CHIP_FAMILY_KAVERI, 0, 1, 0, 0, 1 },
{ 0x131C, CHIP_FAMILY_KAVERI, 0, 1, 0, 0, 1 },
{ 0x131D, CHIP_FAMILY_KAVERI, 0, 1, 0, 0, 1 },
diff --git a/src/radeon_chipset_gen.h b/src/radeon_chipset_gen.h
index 03a413e..3b5edd4 100644
--- a/src/radeon_chipset_gen.h
+++ b/src/radeon_chipset_gen.h
@@ -620,6 +620,8 @@ SymTabRec RADEONChipsets[] = {
{ PCI_CHIP_HAINAN_666F, "HAINAN" },
{ PCI_CHIP_BONAIRE_6640, "BONAIRE" },
{ PCI_CHIP_BONAIRE_6641, "BONAIRE" },
+ { PCI_CHIP_BONAIRE_6646, "BONAIRE" },
+ { PCI_CHIP_BONAIRE_6647, "BONAIRE" },
{ PCI_CHIP_BONAIRE_6649, "BONAIRE" },
{ PCI_CHIP_BONAIRE_6650, "BONAIRE" },
{ PCI_CHIP_BONAIRE_6651, "BONAIRE" },
@@ -676,6 +678,7 @@ SymTabRec RADEONChipsets[] = {
{ PCI_CHIP_KAVERI_1315, "KAVERI" },
{ PCI_CHIP_KAVERI_1316, "KAVERI" },
{ PCI_CHIP_KAVERI_1317, "KAVERI" },
+ { PCI_CHIP_KAVERI_1318, "KAVERI" },
{ PCI_CHIP_KAVERI_131B, "KAVERI" },
{ PCI_CHIP_KAVERI_131C, "KAVERI" },
{ PCI_CHIP_KAVERI_131D, "KAVERI" },
diff --git a/src/radeon_pci_chipset_gen.h b/src/radeon_pci_chipset_gen.h
index a9b186c..a7d8613 100644
--- a/src/radeon_pci_chipset_gen.h
+++ b/src/radeon_pci_chipset_gen.h
@@ -620,6 +620,8 @@ static PciChipsets RADEONPciChipsets[] = {
{ PCI_CHIP_HAINAN_666F, PCI_CHIP_HAINAN_666F, RES_SHARED_VGA },
{ PCI_CHIP_BONAIRE_6640, PCI_CHIP_BONAIRE_6640, RES_SHARED_VGA },
{ PCI_CHIP_BONAIRE_6641, PCI_CHIP_BONAIRE_6641, RES_SHARED_VGA },
+ { PCI_CHIP_BONAIRE_6646, PCI_CHIP_BONAIRE_6646, RES_SHARED_VGA },
+ { PCI_CHIP_BONAIRE_6647, PCI_CHIP_BONAIRE_6647, RES_SHARED_VGA },
{ PCI_CHIP_BONAIRE_6649, PCI_CHIP_BONAIRE_6649, RES_SHARED_VGA },
{ PCI_CHIP_BONAIRE_6650, PCI_CHIP_BONAIRE_6650, RES_SHARED_VGA },
{ PCI_CHIP_BONAIRE_6651, PCI_CHIP_BONAIRE_6651, RES_SHARED_VGA },
@@ -676,6 +678,7 @@ static PciChipsets RADEONPciChipsets[] = {
{ PCI_CHIP_KAVERI_1315, PCI_CHIP_KAVERI_1315, RES_SHARED_VGA },
{ PCI_CHIP_KAVERI_1316, PCI_CHIP_KAVERI_1316, RES_SHARED_VGA },
{ PCI_CHIP_KAVERI_1317, PCI_CHIP_KAVERI_1317, RES_SHARED_VGA },
+ { PCI_CHIP_KAVERI_1318, PCI_CHIP_KAVERI_1318, RES_SHARED_VGA },
{ PCI_CHIP_KAVERI_131B, PCI_CHIP_KAVERI_131B, RES_SHARED_VGA },
{ PCI_CHIP_KAVERI_131C, PCI_CHIP_KAVERI_131C, RES_SHARED_VGA },
{ PCI_CHIP_KAVERI_131D, PCI_CHIP_KAVERI_131D, RES_SHARED_VGA },
diff --git a/src/radeon_pci_device_match_gen.h b/src/radeon_pci_device_match_gen.h
index a73d9c1..a4ccb62 100644
--- a/src/radeon_pci_device_match_gen.h
+++ b/src/radeon_pci_device_match_gen.h
@@ -620,6 +620,8 @@ static const struct pci_id_match radeon_device_match[] = {
ATI_DEVICE_MATCH( PCI_CHIP_HAINAN_666F, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_BONAIRE_6640, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_BONAIRE_6641, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_BONAIRE_6646, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_BONAIRE_6647, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_BONAIRE_6649, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_BONAIRE_6650, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_BONAIRE_6651, 0 ),
@@ -676,6 +678,7 @@ static const struct pci_id_match radeon_device_match[] = {
ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_1315, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_1316, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_1317, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_1318, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_131B, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_131C, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_131D, 0 ),
commit 7dab6b2fe9cf690b0dae1c127d0374322bd8278e
Author: Michel Dänzer <michel.daenzer@amd.com>
Date: Wed Aug 20 17:51:35 2014 +0900
Revert "glamor: Set environment variable RADEON_THREAD=0"
This reverts commit 4b5060f357a3cb248c9359c92c1e9c42ef6434c8.
Further testing shows that disabling the thread is only a moderate win in
some cases, but a much bigger loss in some other cases.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
diff --git a/src/radeon_glamor.c b/src/radeon_glamor.c
index 02fa658..210ddcf 100644
--- a/src/radeon_glamor.c
+++ b/src/radeon_glamor.c
@@ -132,16 +132,6 @@ radeon_glamor_pre_init(ScrnInfoPtr scrn)
"Incompatible glamor version, required >= 0.3.0.\n");
return FALSE;
} else {
- /* This prevents the Gallium radeon winsys from spawning
- * a separate thread for submitting command streams to
- * the kernel. Improves scores of at least gtkperf and
- * x11perf -putimage/-shmput/-getimage/-shmget, probably
- * because glamor causes too many command stream flushes
- * / too much synchronization with pending command
- * streams for the separate thread to pay off.
- */
- setenv("RADEON_THREAD", "0", 0);
-
if (glamor_egl_init(scrn, info->dri2.drm_fd)) {
xf86DrvMsg(scrn->scrnIndex, X_INFO,
"glamor detected, initialising EGL layer.\n");
commit 1ff383360886c5cee1bb75abcc20675aca0336a6
Author: Alex Deucher <alexander.deucher@amd.com>
Date: Tue Aug 12 12:27:12 2014 -0400
radeon: fix warnings when building against older xservers
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
diff --git a/src/radeon_kms.c b/src/radeon_kms.c
index 171d919..6f0f1a1 100644
--- a/src/radeon_kms.c
+++ b/src/radeon_kms.c
@@ -584,7 +584,9 @@ static Bool RADEONPreInitChipType_KMS(ScrnInfoPtr pScrn)
static int radeon_get_drm_master_fd(ScrnInfoPtr pScrn)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
+#ifdef XF86_PDEV_SERVER_FD
RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
+#endif
struct pci_device *dev = info->PciInfo;
char *busid;
int fd;
@@ -1116,7 +1118,9 @@ static Bool RADEONSaveScreen_KMS(ScreenPtr pScreen, int mode)
static Bool radeon_set_drm_master(ScrnInfoPtr pScrn)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
+#ifdef XF86_PDEV_SERVER_FD
RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
+#endif
int err;
#ifdef XF86_PDEV_SERVER_FD
@@ -1135,9 +1139,9 @@ static Bool radeon_set_drm_master(ScrnInfoPtr pScrn)
static void radeon_drop_drm_master(ScrnInfoPtr pScrn)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
+#ifdef XF86_PDEV_SERVER_FD
RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
-#ifdef XF86_PDEV_SERVER_FD
if (pRADEONEnt->platform_dev &&
(pRADEONEnt->platform_dev->flags & XF86_PDEV_SERVER_FD))
return;
commit 94202cbfbca05a503acdc1cca2f8409d141173af
Author: Alex Deucher <alexdeucher@gmail.com>
Date: Fri Aug 1 21:55:40 2014 +0200
radeon: enable hawaii accel conditionally (v3)
Only if the kernel has the new CP firmware.
v2: check value of ACCEL_WORKING2
v3 (Andreas Boll):
- check for value 2 or 3 of ACCEL_WORKING2
- update man page
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> (v2)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
diff --git a/man/radeon.man b/man/radeon.man
index 802f6c2..7dde040 100644
--- a/man/radeon.man
+++ b/man/radeon.man
@@ -229,8 +229,7 @@ Selects software cursor. The default is
Enables or disables all hardware acceleration.
.br
The default is
-.B on
-except for HAWAII.
+.B on.
.TP
.BI "Option \*qZaphodHeads\*q \*q" string \*q
Specify the RandR output(s) to use with zaphod mode for a particular driver
diff --git a/src/radeon_kms.c b/src/radeon_kms.c
index a5e77ef..171d919 100644
--- a/src/radeon_kms.c
+++ b/src/radeon_kms.c
@@ -387,8 +387,12 @@ static Bool RADEONIsAccelWorking(ScrnInfoPtr pScrn)
}
return FALSE;
}
- if (tmp)
+ if (info->ChipFamily == CHIP_FAMILY_HAWAII) {
+ if (tmp == 2 || tmp == 3)
+ return TRUE;
+ } else if (tmp) {
return TRUE;
+ }
return FALSE;
}
@@ -486,8 +490,7 @@ static Bool RADEONPreInitAccel_KMS(ScrnInfoPtr pScrn)
info->is_fast_fb = TRUE;
}
- if (!xf86ReturnOptValBool(info->Options, OPTION_ACCEL,
- info->ChipFamily != CHIP_FAMILY_HAWAII) ||
+ if (!xf86ReturnOptValBool(info->Options, OPTION_ACCEL, TRUE) ||
(!RADEONIsAccelWorking(pScrn))) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"GPU accel disabled or not working, using shadowfb for KMS\n");
commit 03930edd49f6b8a8d79910c7be5408b47db9649b
Author: Andreas Boll <andreas.boll.dev@gmail.com>
Date: Mon Aug 4 16:23:13 2014 +0200
radeon: remove definitions already present in radeon_drm.h
Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
diff --git a/src/radeon_kms.c b/src/radeon_kms.c
index 707d0c7..a5e77ef 100644
--- a/src/radeon_kms.c
+++ b/src/radeon_kms.c
@@ -333,9 +333,6 @@ static Bool RADEONIsFastFBWorking(ScrnInfoPtr pScrn)
int r;
uint32_t tmp = 0;
-#ifndef RADEON_INFO_FASTFB_WORKING
-#define RADEON_INFO_FASTFB_WORKING 0x14
-#endif
memset(&ginfo, 0, sizeof(ginfo));
ginfo.request = RADEON_INFO_FASTFB_WORKING;
ginfo.value = (uintptr_t)&tmp;
@@ -355,9 +352,6 @@ static Bool RADEONIsFusionGARTWorking(ScrnInfoPtr pScrn)
int r;
uint32_t tmp;
-#ifndef RADEON_INFO_FUSION_GART_WORKING
-#define RADEON_INFO_FUSION_GART_WORKING 0x0c
-#endif
memset(&ginfo, 0, sizeof(ginfo));
ginfo.request = RADEON_INFO_FUSION_GART_WORKING;
ginfo.value = (uintptr_t)&tmp;
@@ -377,13 +371,6 @@ static Bool RADEONIsAccelWorking(ScrnInfoPtr pScrn)
int r;
uint32_t tmp;
-#ifndef RADEON_INFO_ACCEL_WORKING
-#define RADEON_INFO_ACCEL_WORKING 0x03
-#endif
-#ifndef RADEON_INFO_ACCEL_WORKING2
-#define RADEON_INFO_ACCEL_WORKING2 0x05
-#endif
-
memset(&ginfo, 0, sizeof(ginfo));
if (info->dri2.pKernelDRMVersion->version_minor >= 5)
ginfo.request = RADEON_INFO_ACCEL_WORKING2;
@@ -680,10 +667,6 @@ static Bool r600_get_tile_config(ScrnInfoPtr pScrn)
if (info->ChipFamily < CHIP_FAMILY_R600)
return FALSE;
-#ifndef RADEON_INFO_TILING_CONFIG
-#define RADEON_INFO_TILING_CONFIG 0x6
-#endif
-
memset(&ginfo, 0, sizeof(ginfo));
ginfo.request = RADEON_INFO_TILING_CONFIG;
ginfo.value = (uintptr_t)&tmp;
commit 91849fba0742ef61ba327e71fc3ce8f754af0a6f
Author: Andreas Boll <andreas.boll.dev@gmail.com>
Date: Mon Aug 4 16:23:12 2014 +0200
radeon: drop radeon_drm.h
Now we use libdrm's radeon_drm.h.
Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
diff --git a/src/Makefile.am b/src/Makefile.am
index e23dc1d..9ff1ffb 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -88,7 +88,6 @@ EXTRA_DIST = \
bicubic_table.h \
bicubic_table.py \
radeon_bo_helper.h \
- radeon_drm.h \
radeon_exa_render.c \
radeon_exa_funcs.c \
radeon_exa_shared.h \
diff --git a/src/radeon_drm.h b/src/radeon_drm.h
deleted file mode 100644
index 042e822..0000000
--- a/src/radeon_drm.h
+++ /dev/null
@@ -1,918 +0,0 @@
-/* radeon_drm.h -- Public header for the radeon driver -*- linux-c -*-
- *
- * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Fremont, California.
- * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- * Kevin E. Martin <martin@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- * Keith Whitwell <keith@tungstengraphics.com>
- */
-
-#ifndef __RADEON_DRM_H__
-#define __RADEON_DRM_H__
-
-/* WARNING: If you change any of these defines, make sure to change the
- * defines in the X server file (radeon_sarea.h)
- */
-#ifndef __RADEON_SAREA_DEFINES__
-#define __RADEON_SAREA_DEFINES__
-
-/* Old style state flags, required for sarea interface (1.1 and 1.2
- * clears) and 1.2 drm_vertex2 ioctl.
- */
-#define RADEON_UPLOAD_CONTEXT 0x00000001
-#define RADEON_UPLOAD_VERTFMT 0x00000002
-#define RADEON_UPLOAD_LINE 0x00000004
-#define RADEON_UPLOAD_BUMPMAP 0x00000008
-#define RADEON_UPLOAD_MASKS 0x00000010
-#define RADEON_UPLOAD_VIEWPORT 0x00000020
-#define RADEON_UPLOAD_SETUP 0x00000040
-#define RADEON_UPLOAD_TCL 0x00000080
-#define RADEON_UPLOAD_MISC 0x00000100
-#define RADEON_UPLOAD_TEX0 0x00000200
-#define RADEON_UPLOAD_TEX1 0x00000400
-#define RADEON_UPLOAD_TEX2 0x00000800
-#define RADEON_UPLOAD_TEX0IMAGES 0x00001000
-#define RADEON_UPLOAD_TEX1IMAGES 0x00002000
-#define RADEON_UPLOAD_TEX2IMAGES 0x00004000
-#define RADEON_UPLOAD_CLIPRECTS 0x00008000 /* handled client-side */
-#define RADEON_REQUIRE_QUIESCENCE 0x00010000
-#define RADEON_UPLOAD_ZBIAS 0x00020000 /* version 1.2 and newer */
-#define RADEON_UPLOAD_ALL 0x003effff
-#define RADEON_UPLOAD_CONTEXT_ALL 0x003e01ff
-
-/* New style per-packet identifiers for use in cmd_buffer ioctl with
- * the RADEON_EMIT_PACKET command. Comments relate new packets to old
- * state bits and the packet size:
- */
-#define RADEON_EMIT_PP_MISC 0 /* context/7 */
-#define RADEON_EMIT_PP_CNTL 1 /* context/3 */
-#define RADEON_EMIT_RB3D_COLORPITCH 2 /* context/1 */
-#define RADEON_EMIT_RE_LINE_PATTERN 3 /* line/2 */
-#define RADEON_EMIT_SE_LINE_WIDTH 4 /* line/1 */
-#define RADEON_EMIT_PP_LUM_MATRIX 5 /* bumpmap/1 */
-#define RADEON_EMIT_PP_ROT_MATRIX_0 6 /* bumpmap/2 */
-#define RADEON_EMIT_RB3D_STENCILREFMASK 7 /* masks/3 */
-#define RADEON_EMIT_SE_VPORT_XSCALE 8 /* viewport/6 */
-#define RADEON_EMIT_SE_CNTL 9 /* setup/2 */
-#define RADEON_EMIT_SE_CNTL_STATUS 10 /* setup/1 */
-#define RADEON_EMIT_RE_MISC 11 /* misc/1 */
-#define RADEON_EMIT_PP_TXFILTER_0 12 /* tex0/6 */
-#define RADEON_EMIT_PP_BORDER_COLOR_0 13 /* tex0/1 */
-#define RADEON_EMIT_PP_TXFILTER_1 14 /* tex1/6 */
-#define RADEON_EMIT_PP_BORDER_COLOR_1 15 /* tex1/1 */
-#define RADEON_EMIT_PP_TXFILTER_2 16 /* tex2/6 */
-#define RADEON_EMIT_PP_BORDER_COLOR_2 17 /* tex2/1 */
-#define RADEON_EMIT_SE_ZBIAS_FACTOR 18 /* zbias/2 */
-#define RADEON_EMIT_SE_TCL_OUTPUT_VTX_FMT 19 /* tcl/11 */
-#define RADEON_EMIT_SE_TCL_MATERIAL_EMMISSIVE_RED 20 /* material/17 */
-#define R200_EMIT_PP_TXCBLEND_0 21 /* tex0/4 */
-#define R200_EMIT_PP_TXCBLEND_1 22 /* tex1/4 */
-#define R200_EMIT_PP_TXCBLEND_2 23 /* tex2/4 */
-#define R200_EMIT_PP_TXCBLEND_3 24 /* tex3/4 */
-#define R200_EMIT_PP_TXCBLEND_4 25 /* tex4/4 */
-#define R200_EMIT_PP_TXCBLEND_5 26 /* tex5/4 */
-#define R200_EMIT_PP_TXCBLEND_6 27 /* /4 */
-#define R200_EMIT_PP_TXCBLEND_7 28 /* /4 */
-#define R200_EMIT_TCL_LIGHT_MODEL_CTL_0 29 /* tcl/7 */
-#define R200_EMIT_TFACTOR_0 30 /* tf/7 */
-#define R200_EMIT_VTX_FMT_0 31 /* vtx/5 */
-#define R200_EMIT_VAP_CTL 32 /* vap/1 */
-#define R200_EMIT_MATRIX_SELECT_0 33 /* msl/5 */
-#define R200_EMIT_TEX_PROC_CTL_2 34 /* tcg/5 */
-#define R200_EMIT_TCL_UCP_VERT_BLEND_CTL 35 /* tcl/1 */
-#define R200_EMIT_PP_TXFILTER_0 36 /* tex0/6 */
-#define R200_EMIT_PP_TXFILTER_1 37 /* tex1/6 */
-#define R200_EMIT_PP_TXFILTER_2 38 /* tex2/6 */
-#define R200_EMIT_PP_TXFILTER_3 39 /* tex3/6 */
-#define R200_EMIT_PP_TXFILTER_4 40 /* tex4/6 */
-#define R200_EMIT_PP_TXFILTER_5 41 /* tex5/6 */
-#define R200_EMIT_PP_TXOFFSET_0 42 /* tex0/1 */
-#define R200_EMIT_PP_TXOFFSET_1 43 /* tex1/1 */
-#define R200_EMIT_PP_TXOFFSET_2 44 /* tex2/1 */
-#define R200_EMIT_PP_TXOFFSET_3 45 /* tex3/1 */
-#define R200_EMIT_PP_TXOFFSET_4 46 /* tex4/1 */
-#define R200_EMIT_PP_TXOFFSET_5 47 /* tex5/1 */
-#define R200_EMIT_VTE_CNTL 48 /* vte/1 */
-#define R200_EMIT_OUTPUT_VTX_COMP_SEL 49 /* vtx/1 */
-#define R200_EMIT_PP_TAM_DEBUG3 50 /* tam/1 */
-#define R200_EMIT_PP_CNTL_X 51 /* cst/1 */
-#define R200_EMIT_RB3D_DEPTHXY_OFFSET 52 /* cst/1 */
-#define R200_EMIT_RE_AUX_SCISSOR_CNTL 53 /* cst/1 */
-#define R200_EMIT_RE_SCISSOR_TL_0 54 /* cst/2 */
-#define R200_EMIT_RE_SCISSOR_TL_1 55 /* cst/2 */
-#define R200_EMIT_RE_SCISSOR_TL_2 56 /* cst/2 */
-#define R200_EMIT_SE_VAP_CNTL_STATUS 57 /* cst/1 */
-#define R200_EMIT_SE_VTX_STATE_CNTL 58 /* cst/1 */
-#define R200_EMIT_RE_POINTSIZE 59 /* cst/1 */
-#define R200_EMIT_TCL_INPUT_VTX_VECTOR_ADDR_0 60 /* cst/4 */
-#define R200_EMIT_PP_CUBIC_FACES_0 61
-#define R200_EMIT_PP_CUBIC_OFFSETS_0 62
-#define R200_EMIT_PP_CUBIC_FACES_1 63
-#define R200_EMIT_PP_CUBIC_OFFSETS_1 64
-#define R200_EMIT_PP_CUBIC_FACES_2 65
-#define R200_EMIT_PP_CUBIC_OFFSETS_2 66
-#define R200_EMIT_PP_CUBIC_FACES_3 67
-#define R200_EMIT_PP_CUBIC_OFFSETS_3 68
-#define R200_EMIT_PP_CUBIC_FACES_4 69
-#define R200_EMIT_PP_CUBIC_OFFSETS_4 70
-#define R200_EMIT_PP_CUBIC_FACES_5 71
-#define R200_EMIT_PP_CUBIC_OFFSETS_5 72
-#define RADEON_EMIT_PP_TEX_SIZE_0 73
-#define RADEON_EMIT_PP_TEX_SIZE_1 74
-#define RADEON_EMIT_PP_TEX_SIZE_2 75
-#define R200_EMIT_RB3D_BLENDCOLOR 76
-#define R200_EMIT_TCL_POINT_SPRITE_CNTL 77
-#define RADEON_EMIT_PP_CUBIC_FACES_0 78
-#define RADEON_EMIT_PP_CUBIC_OFFSETS_T0 79
-#define RADEON_EMIT_PP_CUBIC_FACES_1 80
-#define RADEON_EMIT_PP_CUBIC_OFFSETS_T1 81
-#define RADEON_EMIT_PP_CUBIC_FACES_2 82
-#define RADEON_EMIT_PP_CUBIC_OFFSETS_T2 83
-#define R200_EMIT_PP_TRI_PERF_CNTL 84
-#define R200_EMIT_PP_AFS_0 85
-#define R200_EMIT_PP_AFS_1 86
-#define R200_EMIT_ATF_TFACTOR 87
-#define R200_EMIT_PP_TXCTLALL_0 88
-#define R200_EMIT_PP_TXCTLALL_1 89
-#define R200_EMIT_PP_TXCTLALL_2 90
-#define R200_EMIT_PP_TXCTLALL_3 91
-#define R200_EMIT_PP_TXCTLALL_4 92
-#define R200_EMIT_PP_TXCTLALL_5 93
-#define R200_EMIT_VAP_PVS_CNTL 94
-#define RADEON_MAX_STATE_PACKETS 95
-
-/* Commands understood by cmd_buffer ioctl. More can be added but
- * obviously these can't be removed or changed:
- */
-#define RADEON_CMD_PACKET 1 /* emit one of the register packets above */
-#define RADEON_CMD_SCALARS 2 /* emit scalar data */
-#define RADEON_CMD_VECTORS 3 /* emit vector data */
-#define RADEON_CMD_DMA_DISCARD 4 /* discard current dma buf */
-#define RADEON_CMD_PACKET3 5 /* emit hw packet */
-#define RADEON_CMD_PACKET3_CLIP 6 /* emit hw packet wrapped in cliprects */
-#define RADEON_CMD_SCALARS2 7 /* r200 stopgap */
-#define RADEON_CMD_WAIT 8 /* emit hw wait commands -- note:
- * doesn't make the cpu wait, just
- * the graphics hardware */
-#define RADEON_CMD_VECLINEAR 9 /* another r200 stopgap */
-
-typedef union {
- int i;
- struct {
- unsigned char cmd_type, pad0, pad1, pad2;
- } header;
- struct {
- unsigned char cmd_type, packet_id, pad0, pad1;
- } packet;
- struct {
- unsigned char cmd_type, offset, stride, count;
- } scalars;
- struct {
- unsigned char cmd_type, offset, stride, count;
- } vectors;
- struct {
- unsigned char cmd_type, addr_lo, addr_hi, count;
- } veclinear;
- struct {
- unsigned char cmd_type, buf_idx, pad0, pad1;
- } dma;
- struct {
- unsigned char cmd_type, flags, pad0, pad1;
- } wait;
-} drm_radeon_cmd_header_t;
-
-#define RADEON_WAIT_2D 0x1
-#define RADEON_WAIT_3D 0x2
-
-/* Allowed parameters for R300_CMD_PACKET3
- */
-#define R300_CMD_PACKET3_CLEAR 0
-#define R300_CMD_PACKET3_RAW 1
-
-/* Commands understood by cmd_buffer ioctl for R300.
- * The interface has not been stabilized, so some of these may be removed
- * and eventually reordered before stabilization.
- */
-#define R300_CMD_PACKET0 1
-#define R300_CMD_VPU 2 /* emit vertex program upload */
-#define R300_CMD_PACKET3 3 /* emit a packet3 */
-#define R300_CMD_END3D 4 /* emit sequence ending 3d rendering */
-#define R300_CMD_CP_DELAY 5
-#define R300_CMD_DMA_DISCARD 6
-#define R300_CMD_WAIT 7
-# define R300_WAIT_2D 0x1
-# define R300_WAIT_3D 0x2
-/* these two defines are DOING IT WRONG - however
- * we have userspace which relies on using these.
- * The wait interface is backwards compat new
- * code should use the NEW_WAIT defines below
- * THESE ARE NOT BIT FIELDS
- */
-# define R300_WAIT_2D_CLEAN 0x3
-# define R300_WAIT_3D_CLEAN 0x4
-
-# define R300_NEW_WAIT_2D_3D 0x3
-# define R300_NEW_WAIT_2D_2D_CLEAN 0x4
-# define R300_NEW_WAIT_3D_3D_CLEAN 0x6
-# define R300_NEW_WAIT_2D_2D_CLEAN_3D_3D_CLEAN 0x8
-
-#define R300_CMD_SCRATCH 8
-#define R300_CMD_R500FP 9
-
-typedef union {
- unsigned int u;
- struct {
- unsigned char cmd_type, pad0, pad1, pad2;
- } header;
- struct {
- unsigned char cmd_type, count, reglo, reghi;
- } packet0;
- struct {
- unsigned char cmd_type, count, adrlo, adrhi;
- } vpu;
- struct {
- unsigned char cmd_type, packet, pad0, pad1;
- } packet3;
- struct {
- unsigned char cmd_type, packet;
- unsigned short count; /* amount of packet2 to emit */
- } delay;
- struct {
- unsigned char cmd_type, buf_idx, pad0, pad1;
- } dma;
- struct {
- unsigned char cmd_type, flags, pad0, pad1;
- } wait;
- struct {
- unsigned char cmd_type, reg, n_bufs, flags;
- } scratch;
- struct {
- unsigned char cmd_type, count, adrlo, adrhi_flags;
- } r500fp;
-} drm_r300_cmd_header_t;
-
-#define RADEON_FRONT 0x1
-#define RADEON_BACK 0x2
-#define RADEON_DEPTH 0x4
-#define RADEON_STENCIL 0x8
-#define RADEON_CLEAR_FASTZ 0x80000000
-#define RADEON_USE_HIERZ 0x40000000
-#define RADEON_USE_COMP_ZBUF 0x20000000
-
-#define R500FP_CONSTANT_TYPE (1 << 1)
-#define R500FP_CONSTANT_CLAMP (1 << 2)
-
-/* Primitive types
- */
-#define RADEON_POINTS 0x1
-#define RADEON_LINES 0x2
-#define RADEON_LINE_STRIP 0x3
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