mesa: Changes to 'debian-unstable'
Android.mk | 4
Makefile.am | 11
VERSION | 2
bin/.cherry-ignore | 12
bin/get-pick-list.sh | 2
configure.ac | 4
debian/changelog | 6
docs/relnotes/10.2.6.html | 3
docs/relnotes/10.2.7.html | 208 ++++++++++
include/pci_ids/radeonsi_pci_ids.h | 7
src/egl/drivers/dri2/egl_dri2.c | 37 -
src/egl/drivers/dri2/platform_android.c | 4
src/egl/main/Android.mk | 27 -
src/gallium/Android.mk | 8
src/gallium/auxiliary/gallivm/lp_bld_debug.cpp | 8
src/gallium/auxiliary/gallivm/lp_bld_misc.cpp | 4
src/gallium/auxiliary/pipe-loader/pipe_loader.h | 2
src/gallium/auxiliary/pipe-loader/pipe_loader_drm.c | 1
src/gallium/auxiliary/util/u_math.h | 22 -
src/gallium/drivers/freedreno/Android.mk | 44 ++
src/gallium/drivers/freedreno/Makefile.am | 2
src/gallium/drivers/freedreno/freedreno_screen.c | 4
src/gallium/drivers/nouveau/Android.mk | 9
src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 36 +
src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 4
src/gallium/drivers/nouveau/nv50/nv50_state.c | 7
src/gallium/drivers/nouveau/nv50/nv50_state_validate.c | 8
src/gallium/drivers/nouveau/nv50/nv50_surface.c | 16
src/gallium/drivers/nouveau/nv50/nv50_transfer.c | 2
src/gallium/drivers/nouveau/nv50/nv84_video.c | 15
src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c | 1
src/gallium/drivers/r300/Android.mk | 3
src/gallium/drivers/r600/Android.mk | 2
src/gallium/drivers/r600/evergreen_compute.c | 3
src/gallium/drivers/r600/r600_shader.c | 1
src/gallium/drivers/radeon/Android.mk | 38 +
src/gallium/drivers/radeon/r600_pipe_common.c | 47 +-
src/gallium/drivers/radeonsi/Android.mk | 2
src/gallium/drivers/radeonsi/si_blit.c | 7
src/gallium/drivers/radeonsi/si_compute.c | 6
src/gallium/drivers/radeonsi/si_descriptors.c | 6
src/gallium/drivers/radeonsi/si_hw_context.c | 2
src/gallium/drivers/radeonsi/si_pipe.c | 6
src/gallium/drivers/radeonsi/si_pipe.h | 2
src/gallium/drivers/radeonsi/si_state.c | 18
src/gallium/drivers/radeonsi/si_state.h | 14
src/gallium/drivers/radeonsi/si_state_draw.c | 2
src/gallium/state_trackers/clover/api/queue.cpp | 6
src/gallium/state_trackers/egl/android/native_android.cpp | 4
src/gallium/targets/egl-static/Android.mk | 3
src/gallium/winsys/freedreno/drm/Android.mk | 37 +
src/gallium/winsys/nouveau/drm/Android.mk | 5
src/gallium/winsys/radeon/drm/Android.mk | 4
src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 62 +-
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 10
src/gallium/winsys/radeon/drm/radeon_drm_winsys.h | 1
src/glsl/Android.mk | 2
src/mesa/drivers/common/meta_blit.c | 4
src/mesa/drivers/common/meta_generate_mipmap.c | 12
src/mesa/drivers/dri/i915/Android.mk | 2
src/mesa/drivers/dri/i965/brw_clip_unfilled.c | 6
src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp | 4
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 3
src/mesa/drivers/dri/i965/gen8_vec4_generator.cpp | 5
src/mesa/drivers/dri/nouveau/nouveau_bufferobj.c | 1
src/mesa/drivers/dri/nouveau/nouveau_state.c | 1
src/mesa/main/buffers.c | 2
src/mesa/main/texparam.c | 11
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 54 +-
69 files changed, 684 insertions(+), 234 deletions(-)
New commits:
commit ebf6044389223e49d68057c2dd8fb80ffeefbce1
Author: Andreas Boll <andreas.boll.dev@gmail.com>
Date: Fri Sep 12 11:38:34 2014 +0200
New upstream release.
diff --git a/debian/changelog b/debian/changelog
index 4fedf95..42feb37 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,3 +1,9 @@
+mesa (10.2.7-1) UNRELEASED; urgency=medium
+
+ * New upstream release.
+
+ -- Andreas Boll <andreas.boll.dev@gmail.com> Fri, 12 Sep 2014 11:38:04 +0200
+
mesa (10.2.6-1) unstable; urgency=medium
* New upstream release.
commit 64d51e250788c8f9d1ad9c2b93cb7bb4a093fe6f
Author: Emil Velikov <emil.l.velikov@gmail.com>
Date: Sat Sep 6 00:47:24 2014 +0100
Add release notes for the 10.2.7 release
Listing bugs fixed and changes made.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
diff --git a/docs/relnotes/10.2.7.html b/docs/relnotes/10.2.7.html
new file mode 100644
index 0000000..a04e7d9
--- /dev/null
+++ b/docs/relnotes/10.2.7.html
@@ -0,0 +1,208 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd";>
+<html lang="en">
+<head>
+ <meta http-equiv="content-type" content="text/html; charset=utf-8">
+ <title>Mesa Release Notes</title>
+ <link rel="stylesheet" type="text/css" href="../mesa.css">
+</head>
+<body>
+
+<div class="header">
+ <h1>The Mesa 3D Graphics Library</h1>
+</div>
+
+<iframe src="../contents.html"></iframe>
+<div class="content">
+
+<h1>Mesa 10.2.7 Release Notes / September 06, 2014</h1>
+
+<p>
+Mesa 10.2.7 is a bug fix release which fixes bugs found since the 10.2.6 release.
+</p>
+<p>
+Mesa 10.2.7 implements the OpenGL 3.3 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 3.3. OpenGL
+3.3 is <strong>only</strong> available if requested at context creation
+because compatibility contexts are not supported.
+</p>
+
+<h2>SHA256 checksums</h2>
+<pre>
+</pre>
+
+<h2>New features</h2>
+<p>None</p>
+
+<h2>Bug fixes</h2>
+
+<p>This list is likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=36193";>Bug 36193</a> - [i965] brw_eu_emit.c:182: validate_reg: Assertion `execsize >= width' failed.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=66184";>Bug 66184</a> - src/mesa/state_tracker/st_glsl_to_tgsi.cpp:3216:simplify_cmp: Assertion `inst->dst.index < 4096' failed.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=70441";>Bug 70441</a> - [Gen4-5 clip] Piglit spec_OpenGL_1.1_polygon-offset hits (execsize >= width) assertion</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=76188";>Bug 76188</a> - EGL_EXT_image_dma_buf_import fd ownership is incorrect</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=76789";>Bug 76789</a> - [radeonsi] si_descriptors.c requires -std=gnu99 or -fms-extensions</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82139";>Bug 82139</a> - [r600g, bisected] multiple ubo piglit regressions</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82255";>Bug 82255</a> - [VP2] Chroma planes are vertically stretched during VDPAU playback</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82671";>Bug 82671</a> - [r600g-evergreen][compute]Empty kernel execution causes crash</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82709";>Bug 82709</a> - OpenCL not working on radeon hainan</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82814";>Bug 82814</a> - glDrawBuffers(0, NULL) segfaults in _mesa_drawbuffers</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83079";>Bug 83079</a> - [NVC0] Dota 2 (Linux native and Wine) crash with Nouveau Drivers</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83355";>Bug 83355</a> - FTBFS: src/mesa/program/program_lexer.l:122:64: error: unknown type name 'YYSTYPE'</li>
+
+</ul>
+
+
+<h2>Changes</h2>
+
+<p>Adam Jackson (1):</p>
+<ul>
+ <li>radeonsi: Don't use anonymous struct trick in atom tracking</li>
+</ul>
+
+<p>Alex Deucher (2):</p>
+<ul>
+ <li>radeonsi: add new CIK pci ids</li>
+ <li>radeonsi: add new SI pci ids</li>
+</ul>
+
+<p>Andreas Boll (1):</p>
+<ul>
+ <li>winsys/radeon: fix nop packet padding for hawaii</li>
+</ul>
+
+<p>Anuj Phogat (1):</p>
+<ul>
+ <li>i965: Bail on vec4 copy propagation for scratch writes with source modifiers</li>
+</ul>
+
+<p>Brian Paul (1):</p>
+<ul>
+ <li>mesa: fix NULL pointer deref bug in _mesa_drawbuffers()</li>
+</ul>
+
+<p>Carl Worth (2):</p>
+<ul>
+ <li>docs: Add sha256 sums for the 10.2.6 release</li>
+ <li>Makefile: Switch from md5sums to sha256sums</li>
+</ul>
+
+<p>Dave Airlie (1):</p>
+<ul>
+ <li>i965: add missing parens in vec4 visitor</li>
+</ul>
+
+<p>Emil Velikov (17):</p>
+<ul>
+ <li>configure.ac: bail out if building gallium_gbm without gallium_egl</li>
+ <li>android: gallium/nouveau: fix include folders, link against libstlport</li>
+ <li>android: egl/main: fixup the nouveau build</li>
+ <li>automake: gallium/freedreno: drop spurious include dirs</li>
+ <li>android: gallium/freedreno: add preliminary build</li>
+ <li>android: egl/main: add/enable freedreno</li>
+ <li>android: gallium/auxiliary: drop log2/log2f redefitions</li>
+ <li>android: drop HAL_PIXEL_FORMAT_RGBA_{5551,4444}</li>
+ <li>android: glsl: the stlport over the limited Android STL</li>
+ <li>android: dri/i915: do not build an 'empty' driver</li>
+ <li>cherry-ignore: remove patch that lacking previous dependencies</li>
+ <li>cherry-ignore: PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE is not it 10.2</li>
+ <li>cherry-ignore: drop whitespace fix</li>
+ <li>cherry-ignore: reject a15088338eb</li>
+ <li>get-pick-list.sh: Require explicit "10.2" for nominating stable patches</li>
+ <li>mesa: fix make tarballs</li>
+ <li>Update VERSION to 10.2.7</li>
+</ul>
+
+<p>Ian Romanick (1):</p>
+<ul>
+ <li>mesa: Handle uninitialized textures like other textures in get_tex_level_parameter_image</li>
+</ul>
+
+<p>Ilia Mirkin (9):</p>
+<ul>
+ <li>nouveau: make sure to invalidate any vbo state as well</li>
+ <li>nouveau: don't keep stale pointer to free'd data</li>
+ <li>nvc0/ir: avoid infinite recursion when finding first uses of tex</li>
+ <li>nv50: zero out unbound samplers</li>
+ <li>nvc0: don't make 1d staging textures linear</li>
+ <li>nv50/ir: avoid creating instructions that can't be emitted</li>
+ <li>nv50: set the miptree address when clearing bo's in vp2 init</li>
+ <li>nv50: mt address may not be the underlying bo's start address</li>
+ <li>nv50: attach the buffer bo to the miptree structures</li>
+</ul>
+
+<p>Jan Vesely (1):</p>
+<ul>
+ <li>gallivm: Fix build with latest LLVM</li>
+</ul>
+
+<p>José Fonseca (1):</p>
+<ul>
+ <li>mesa: Move declaration to top of block.</li>
+</ul>
+
+<p>Kenneth Graunke (3):</p>
+<ul>
+ <li>i965/vec4: Set NoMask for GS_OPCODE_SET_VERTEX_COUNT on Gen8+.</li>
+ <li>i965/vec4: Respect ir->force_writemask_all in Gen8 code generation.</li>
+ <li>i965/clip: Fix brw_clip_unfilled.c/compute_offset's assembly.</li>
+</ul>
+
+<p>Marek Olšák (3):</p>
+<ul>
+ <li>r600g: fix constant buffer fetches</li>
+ <li>radeonsi: save scissor state and sample mask for u_blitter</li>
+ <li>glsl_to_tgsi: allocate and enlarge arrays for temporaries on demand</li>
+</ul>
+
+<p>Paulo Sergio Travaglia (2):</p>
+<ul>
+ <li>android: gallium/radeon: attempt to fix the android build</li>
+ <li>android: egl/main: resolve radeon linking issues</li>
+</ul>
+
+<p>Pekka Paalanen (1):</p>
+<ul>
+ <li>egl_dri2: fix EXT_image_dma_buf_import fds</li>
+</ul>
+
+<p>Robert Bragg (1):</p>
+<ul>
+ <li>meta: save and restore swizzle for _GenerateMipmap</li>
+</ul>
+
+<p>Tom Stellard (7):</p>
+<ul>
+ <li>radeon/compute: Fix reported values for MAX_GLOBAL_SIZE and MAX_MEM_ALLOC_SIZE</li>
+ <li>radeonsi/compute: Update reference counts for buffers in si_set_global_binding()</li>
+ <li>radeonsi/compute: Call si_pm4_free_state() after emitting compute state</li>
+ <li>clover: Flush the command queue in clReleaseCommandQueue()</li>
+ <li>radeon: Add work-around for missing Hainan support in clang < 3.6 v2</li>
+ <li>pipe-loader: Fix memory leak v2</li>
+ <li>r600g/compute: Don't initialize vertex_buffer_state masks to 0x2</li>
+</ul>
+
+<p>Vinson Lee (1):</p>
+<ul>
+ <li>gallivm: Fix build with LLVM >= 3.6 r215967.</li>
+</ul>
+
+
+</div>
+</body>
+</html>
commit 25f5457e842564789d441e000fafec1343483b14
Author: Emil Velikov <emil.l.velikov@gmail.com>
Date: Sat Sep 6 00:36:45 2014 +0100
Update VERSION to 10.2.7
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
diff --git a/VERSION b/VERSION
index 9a6a89b..db28e98 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-10.2.6
+10.2.7
commit 7ffc8556ca81976fe4f92cda5253b1685149748a
Author: José Fonseca <jfonseca@vmware.com>
Date: Fri May 23 11:23:52 2014 +0100
mesa: Move declaration to top of block.
To fix MSVC build. Trivial.
(cherry picked from commit c98b704128ed450b46c61e139d9f17c652a74c09)
diff --git a/src/mesa/drivers/common/meta_blit.c b/src/mesa/drivers/common/meta_blit.c
index 58492e0..0de830c 100644
--- a/src/mesa/drivers/common/meta_blit.c
+++ b/src/mesa/drivers/common/meta_blit.c
@@ -325,10 +325,12 @@ setup_glsl_blit_framebuffer(struct gl_context *ctx,
struct gl_renderbuffer *src_rb,
GLenum target)
{
+ unsigned texcoord_size;
+
/* target = GL_TEXTURE_RECTANGLE is not supported in GLES 3.0 */
assert(_mesa_is_desktop_gl(ctx) || target == GL_TEXTURE_2D);
- unsigned texcoord_size = 2 + (src_rb->Depth > 1 ? 1 : 0);
+ texcoord_size = 2 + (src_rb->Depth > 1 ? 1 : 0);
_mesa_meta_setup_vertex_objects(&blit->VAO, &blit->VBO, true,
2, texcoord_size, 0);
commit 65324b89b89d3102c5a66c9ca7a3ff5f954cef19
Author: Kenneth Graunke <kenneth@whitecape.org>
Date: Tue Aug 5 23:57:17 2014 -0700
i965/clip: Fix brw_clip_unfilled.c/compute_offset's assembly.
Due to the destination register width of 1 or 2, these instructions get
ExecSize 1 or 2. But dir and offset (used as src0) are both registers
of width 4, violating the execsize >= width assertion.
I honestly don't think this could have ever worked.
Fixes Piglit's polygon-offset and polygon-mode-offset tests on Gen4-5.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70441
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
(cherry picked from commit b7679639bcc8ac72cb08c48f9cda8eecd6a9c1e5)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=36193
diff --git a/src/mesa/drivers/dri/i965/brw_clip_unfilled.c b/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
index 6dc52db..bf33ec6 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
@@ -197,7 +197,7 @@ static void compute_offset( struct brw_clip_compile *c )
struct brw_reg dir = c->reg.dir;
brw_math_invert(p, get_element(off, 2), get_element(dir, 2));
- brw_MUL(p, vec2(off), dir, get_element(off, 2));
+ brw_MUL(p, vec2(off), vec2(dir), get_element(off, 2));
brw_CMP(p,
vec1(brw_null_reg()),
@@ -208,8 +208,8 @@ static void compute_offset( struct brw_clip_compile *c )
brw_SEL(p, vec1(off), brw_abs(get_element(off, 0)), brw_abs(get_element(off, 1)));
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
- brw_MUL(p, vec1(off), off, brw_imm_f(c->key.offset_factor));
- brw_ADD(p, vec1(off), off, brw_imm_f(c->key.offset_units));
+ brw_MUL(p, vec1(off), vec1(off), brw_imm_f(c->key.offset_factor));
+ brw_ADD(p, vec1(off), vec1(off), brw_imm_f(c->key.offset_units));
}
commit 0c739aa1d213ecd50d378f71c662cec3d2f841d6
Author: Adam Jackson <ajax@redhat.com>
Date: Tue Apr 22 12:46:08 2014 -0400
radeonsi: Don't use anonymous struct trick in atom tracking
I'm somewhat impressed that current gccs will let you do this, but
sufficiently old ones (including 4.4.7 in RHEL6) won't.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
(cherry picked from commit 74388dd24bc7fdb9e62ec18096163f5426e03fbf)
Nominated-by: Jonathan Gray <jsg@jsg.id.au>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76789
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index 77bc034..38ad077 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -987,9 +987,9 @@ void si_init_all_descriptors(struct si_context *sctx)
si_init_sampler_views(sctx, &sctx->samplers[i].views, i);
- sctx->atoms.const_buffers[i] = &sctx->const_buffers[i].desc.atom;
- sctx->atoms.rw_buffers[i] = &sctx->rw_buffers[i].desc.atom;
- sctx->atoms.sampler_views[i] = &sctx->samplers[i].views.desc.atom;
+ sctx->atoms.s.const_buffers[i] = &sctx->const_buffers[i].desc.atom;
+ sctx->atoms.s.rw_buffers[i] = &sctx->rw_buffers[i].desc.atom;
+ sctx->atoms.s.sampler_views[i] = &sctx->samplers[i].views.desc.atom;
}
diff --git a/src/gallium/drivers/radeonsi/si_hw_context.c b/src/gallium/drivers/radeonsi/si_hw_context.c
index 383157b..d2a1dbe 100644
--- a/src/gallium/drivers/radeonsi/si_hw_context.c
+++ b/src/gallium/drivers/radeonsi/si_hw_context.c
@@ -63,7 +63,7 @@ void si_need_cs_space(struct si_context *ctx, unsigned num_dw,
}
/* Count in framebuffer cache flushes at the end of CS. */
- num_dw += ctx->atoms.cache_flush->num_dw;
+ num_dw += ctx->atoms.s.cache_flush->num_dw;
#if SI_TRACE_CS
if (ctx->screen->b.trace_bo) {
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index ca8cea3..7b905d6 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -106,10 +106,10 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, void *
/* Initialize cache_flush. */
sctx->cache_flush = si_atom_cache_flush;
- sctx->atoms.cache_flush = &sctx->cache_flush;
+ sctx->atoms.s.cache_flush = &sctx->cache_flush;
- sctx->atoms.streamout_begin = &sctx->b.streamout.begin_atom;
- sctx->atoms.streamout_enable = &sctx->b.streamout.enable_atom;
+ sctx->atoms.s.streamout_begin = &sctx->b.streamout.begin_atom;
+ sctx->atoms.s.streamout_enable = &sctx->b.streamout.enable_atom;
switch (sctx->b.chip_class) {
case SI:
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index 4a5f291..de42477 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -114,7 +114,7 @@ struct si_context {
struct r600_atom *streamout_begin;
struct r600_atom *streamout_enable; /* must be after streamout_begin */
struct r600_atom *framebuffer;
- };
+ } s;
struct r600_atom *array[0];
} atoms;
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 9bfa095..7f65c47 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -2963,7 +2963,7 @@ void si_init_state_functions(struct si_context *sctx)
{
int i;
- si_init_atom(&sctx->framebuffer.atom, &sctx->atoms.framebuffer, si_emit_framebuffer_state, 0);
+ si_init_atom(&sctx->framebuffer.atom, &sctx->atoms.s.framebuffer, si_emit_framebuffer_state, 0);
sctx->b.b.create_blend_state = si_create_blend_state;
sctx->b.b.bind_blend_state = si_bind_blend_state;
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index e2d3f99..5e42356 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -981,7 +981,7 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
/* Check flush flags. */
if (sctx->b.flags)
- sctx->atoms.cache_flush->dirty = true;
+ sctx->atoms.s.cache_flush->dirty = true;
si_need_cs_space(sctx, 0, TRUE);
commit 55d28925e6109a4afd61f109e845a8a51bd17652
Author: Pekka Paalanen <pekka.paalanen@collabora.co.uk>
Date: Fri Aug 8 16:26:28 2014 +0300
egl_dri2: fix EXT_image_dma_buf_import fds
The EGL_EXT_image_dma_buf_import specification was revised (according to
its revision history) on Dec 5th, 2013, for EGL to not take ownership of
the file descriptors.
Do not close the file descriptors passed in to eglCreateImageKHR with
EGL_LINUX_DMA_BUF_EXT target.
It is assumed, that the drivers, which ultimately process the file
descriptors, do not close or modify them in any way either. This avoids
the need to dup(), as it seems we would only need to just close the
dup'd file descriptors right after.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76188
Signed-off-by: Pekka Paalanen <pekka.paalanen@collabora.co.uk>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
(cherry picked from commit 08264e5dad4df448e7718e782ad9077902089a07)
diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index 380bd7b..a9e2ce4 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -1663,36 +1663,13 @@ dri2_check_dma_buf_format(const _EGLImageAttribs *attrs)
/**
* The spec says:
*
- * "If eglCreateImageKHR is successful for a EGL_LINUX_DMA_BUF_EXT target,
- * the EGL takes ownership of the file descriptor and is responsible for
- * closing it, which it may do at any time while the EGLDisplay is
- * initialized."
+ * "If eglCreateImageKHR is successful for a EGL_LINUX_DMA_BUF_EXT target, the
+ * EGL will take a reference to the dma_buf(s) which it will release at any
+ * time while the EGLDisplay is initialized. It is the responsibility of the
+ * application to close the dma_buf file descriptors."
+ *
+ * Therefore we must never close or otherwise modify the file descriptors.
*/
-static void
-dri2_take_dma_buf_ownership(const int *fds, unsigned num_fds)
-{
- int already_closed[num_fds];
- unsigned num_closed = 0;
- unsigned i, j;
-
- for (i = 0; i < num_fds; ++i) {
- /**
- * The same file descriptor can be referenced multiple times in case more
- * than one plane is found in the same buffer, just with a different
- * offset.
- */
- for (j = 0; j < num_closed; ++j) {
- if (already_closed[j] == fds[i])
- break;
- }
-
- if (j == num_closed) {
- close(fds[i]);
- already_closed[num_closed++] = fds[i];
- }
- }
-}
-
static _EGLImage *
dri2_create_image_dma_buf(_EGLDisplay *disp, _EGLContext *ctx,
EGLClientBuffer buffer, const EGLint *attr_list)
@@ -1755,8 +1732,6 @@ dri2_create_image_dma_buf(_EGLDisplay *disp, _EGLContext *ctx,
return EGL_NO_IMAGE_KHR;
res = dri2_create_image_from_dri(disp, dri_image);
- if (res)
- dri2_take_dma_buf_ownership(fds, num_fds);
return res;
}
commit ec7d081e130f16ea9b2ad4296723e85a95636fbe
Author: Emil Velikov <emil.l.velikov@gmail.com>
Date: Sun Aug 31 23:16:15 2014 +0100
mesa: fix make tarballs
Current method of generating distribution tar-balls involves manually
invoking make + target name in the appropriate places. This temporary
solution is used until we get 'make dist' working.
Currently it does not work, as in order to have the target (which is
also a filename) available in the final Makefile we need to add a PHONY
target + use the correct target name.
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 88cbe3908f0ea08228a5ffb1808f98b6906c4416)
Also squashed together with:
Revert "mesa: fix make tarballs"
This reverts commit 0fbb9a599df898d4e1166d6d6f00cb34a0524bea.
Rather than adding hacks around the issue drop the sources from the
final tarball, and re-add them back with 'make dist'. This fixes a
problem when running parallel 'make install' fails as it recreates
sources and triggers partial recompilation.
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83355
Reported-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Tested-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Tested-by: Kai Wasserbäch <kai@dev.carbon-project.org>
(cherry picked from commit 5a4e0f3873657d874eb5ff52819f42ea38d54b91)
diff --git a/Makefile.am b/Makefile.am
index d2916da..c9aadc8 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -64,7 +64,6 @@ IGNORE_FILES = \
parsers: configure
$(MAKE) -C src/glsl glsl_parser.cpp glsl_parser.h glsl_lexer.cpp glcpp/glcpp-lex.c glcpp/glcpp-parse.c glcpp/glcpp-parse.h
- $(MAKE) -C src/mesa program/lex.yy.c program/program_parse.tab.c program/program_parse.tab.h
# Everything for new a Mesa release:
ARCHIVES = $(PACKAGE_NAME).tar.gz \
commit c4fa2bc7967861e8f830f40fb0bcef6d4dd12448
Author: Dave Airlie <airlied@redhat.com>
Date: Tue Sep 2 10:13:02 2014 +1000
i965: add missing parens in vec4 visitor
coverity reported this, Matt said it look like missing parens,
not bad identing, so lets try that.
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 94a909ec2df779bfdac6f42a25077b427b3873ea)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index 88ab512..9aec80f 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -2478,7 +2478,7 @@ vec4_visitor::visit(ir_texture *ir)
} else if (ir->op == ir_txf_ms) {
emit(MOV(dst_reg(MRF, param_base + 1, sample_index_type, WRITEMASK_X),
sample_index));
- if (brw->gen >= 7)
+ if (brw->gen >= 7) {
/* MCS data is in the first channel of `mcs`, but we need to get it into
* the .y channel of the second vec4 of params, so replicate .x across
* the whole vec4 and then mask off everything except .y
@@ -2486,6 +2486,7 @@ vec4_visitor::visit(ir_texture *ir)
mcs.swizzle = BRW_SWIZZLE_XXXX;
emit(MOV(dst_reg(MRF, param_base + 1, glsl_type::uint_type, WRITEMASK_Y),
mcs));
+ }
inst->mlen++;
} else if (ir->op == ir_txd) {
const glsl_type *type = lod_type;
commit 0dad6d0ab01fef84af1fcd6d97ade27d6cce1b35
Author: Ilia Mirkin <imirkin@alum.mit.edu>
Date: Mon Sep 1 10:51:08 2014 -0400
nv50: attach the buffer bo to the miptree structures
The current code... makes no sense. Use nouveau_bo_ref to attach the bo
to the exposed resource so as to have the proper lifetime guarantees.
Tested-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 2c440433130d3c64635684355a3667d145a188e3)
diff --git a/src/gallium/drivers/nouveau/nv50/nv84_video.c b/src/gallium/drivers/nouveau/nv50/nv84_video.c
index b26e1ee..b42de20 100644
--- a/src/gallium/drivers/nouveau/nv50/nv84_video.c
+++ b/src/gallium/drivers/nouveau/nv50/nv84_video.c
@@ -685,17 +685,14 @@ nv84_video_buffer_create(struct pipe_context *pipe,
bo_size, &cfg, &buffer->full))
goto error;
- mt0->base.bo = buffer->interlaced;
+ nouveau_bo_ref(buffer->interlaced, &mt0->base.bo);
mt0->base.domain = NOUVEAU_BO_VRAM;
- mt0->base.offset = 0;
- mt0->base.address = buffer->interlaced->offset + mt0->base.offset;
- nouveau_bo_ref(buffer->interlaced, &empty);
+ mt0->base.address = buffer->interlaced->offset;
- mt1->base.bo = buffer->interlaced;
+ nouveau_bo_ref(buffer->interlaced, &mt1->base.bo);
mt1->base.domain = NOUVEAU_BO_VRAM;
- mt1->base.offset = mt0->layer_stride * 2;
- mt1->base.address = buffer->interlaced->offset + mt1->base.offset;
- nouveau_bo_ref(buffer->interlaced, &empty);
+ mt1->base.offset = mt0->total_size;
+ mt1->base.address = buffer->interlaced->offset + mt0->total_size;
memset(&sv_templ, 0, sizeof(sv_templ));
for (component = 0, i = 0; i < 2; ++i ) {
commit 00ef4b0ab181d032ac2332bc2696f47978c75569
Author: Ilia Mirkin <imirkin@alum.mit.edu>
Date: Mon Sep 1 10:48:09 2014 -0400
nv50: mt address may not be the underlying bo's start address
With VP2, nv50_miptree is faked because the underlying bo's have to be
laid out in a certain way. This is done by adjusting the address. Make
sure that blits (and everything else for consistency) use the mt address
rather than the bo address as a base.
This fixes retrieving chroma plane with VDPAU.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82255
Tested-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 9d52e551a5874e54bc80f306bf3cacbad2441315)
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c b/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c
index 1dcb961..4f2758a 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c
@@ -54,8 +54,8 @@ nv50_validate_fb(struct nv50_context *nv50)
assert(mt->layout_3d || !array_mode || array_size == 1);
BEGIN_NV04(push, NV50_3D(RT_ADDRESS_HIGH(i)), 5);
- PUSH_DATAh(push, bo->offset + sf->offset);
- PUSH_DATA (push, bo->offset + sf->offset);
+ PUSH_DATAh(push, mt->base.address + sf->offset);
+ PUSH_DATA (push, mt->base.address + sf->offset);
PUSH_DATA (push, nv50_format_table[sf->base.format].rt);
if (likely(nouveau_bo_memtype(bo))) {
PUSH_DATA (push, mt->level[sf->base.u.tex.level].tile_mode);
@@ -97,8 +97,8 @@ nv50_validate_fb(struct nv50_context *nv50)
int unk = mt->base.base.target == PIPE_TEXTURE_3D || sf->depth == 1;
BEGIN_NV04(push, NV50_3D(ZETA_ADDRESS_HIGH), 5);
- PUSH_DATAh(push, bo->offset + sf->offset);
- PUSH_DATA (push, bo->offset + sf->offset);
+ PUSH_DATAh(push, mt->base.address + sf->offset);
+ PUSH_DATA (push, mt->base.address + sf->offset);
PUSH_DATA (push, nv50_format_table[fb->zsbuf->format].rt);
PUSH_DATA (push, mt->level[sf->base.u.tex.level].tile_mode);
PUSH_DATA (push, mt->layer_stride >> 2);
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_surface.c b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
index 600f4f9..8ec4a5f 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_surface.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
@@ -114,8 +114,8 @@ nv50_2d_texture_set(struct nouveau_pushbuf *push, int dst,
PUSH_DATA (push, mt->level[level].pitch);
PUSH_DATA (push, width);
PUSH_DATA (push, height);
- PUSH_DATAh(push, bo->offset + offset);
- PUSH_DATA (push, bo->offset + offset);
+ PUSH_DATAh(push, mt->base.address + offset);
+ PUSH_DATA (push, mt->base.address + offset);
} else {
BEGIN_NV04(push, SUBC_2D(mthd), 5);
PUSH_DATA (push, format);
@@ -126,8 +126,8 @@ nv50_2d_texture_set(struct nouveau_pushbuf *push, int dst,
BEGIN_NV04(push, SUBC_2D(mthd + 0x18), 4);
PUSH_DATA (push, width);
PUSH_DATA (push, height);
- PUSH_DATAh(push, bo->offset + offset);
- PUSH_DATA (push, bo->offset + offset);
+ PUSH_DATAh(push, mt->base.address + offset);
+ PUSH_DATA (push, mt->base.address + offset);
}
#if 0
@@ -299,8 +299,8 @@ nv50_clear_render_target(struct pipe_context *pipe,
BEGIN_NV04(push, NV50_3D(RT_CONTROL), 1);
PUSH_DATA (push, 1);
BEGIN_NV04(push, NV50_3D(RT_ADDRESS_HIGH(0)), 5);
- PUSH_DATAh(push, bo->offset + sf->offset);
- PUSH_DATA (push, bo->offset + sf->offset);
+ PUSH_DATAh(push, mt->base.address + sf->offset);
+ PUSH_DATA (push, mt->base.address + sf->offset);
PUSH_DATA (push, nv50_format_table[dst->format].rt);
PUSH_DATA (push, mt->level[sf->base.u.tex.level].tile_mode);
PUSH_DATA (push, mt->layer_stride >> 2);
@@ -381,8 +381,8 @@ nv50_clear_depth_stencil(struct pipe_context *pipe,
nv50->scissors_dirty |= 1;
BEGIN_NV04(push, NV50_3D(ZETA_ADDRESS_HIGH), 5);
- PUSH_DATAh(push, bo->offset + sf->offset);
- PUSH_DATA (push, bo->offset + sf->offset);
+ PUSH_DATAh(push, mt->base.address + sf->offset);
+ PUSH_DATA (push, mt->base.address + sf->offset);
PUSH_DATA (push, nv50_format_table[dst->format].rt);
PUSH_DATA (push, mt->level[sf->base.u.tex.level].tile_mode);
PUSH_DATA (push, mt->layer_stride >> 2);
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_transfer.c b/src/gallium/drivers/nouveau/nv50/nv50_transfer.c
index f716052..fc6b24a 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_transfer.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_transfer.c
@@ -24,6 +24,8 @@ nv50_m2mf_rect_setup(struct nv50_m2mf_rect *rect,
rect->bo = mt->base.bo;
rect->domain = mt->base.domain;
rect->base = mt->level[l].offset;
+ if (mt->base.bo->offset != mt->base.address)
+ rect->base += mt->base.address - mt->base.bo->offset;
rect->pitch = mt->level[l].pitch;
if (util_format_is_plain(res->format)) {
rect->width = w << mt->ms_x;
commit eb7c7032c38166a87878c4d31d6685f30c918854
Author: Ilia Mirkin <imirkin@alum.mit.edu>
Date: Mon Sep 1 12:48:12 2014 -0400
nv50: set the miptree address when clearing bo's in vp2 init
The mt address is about to be used more, make sure it's set
appropriately.
Reported-by: Emil Velikov <emil.l.velikov@gmail.com>
Tested-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 2528d402b9e35601d4631cd80a301bacd87dfc95)
diff --git a/src/gallium/drivers/nouveau/nv50/nv84_video.c b/src/gallium/drivers/nouveau/nv50/nv84_video.c
index a39f572..b26e1ee 100644
--- a/src/gallium/drivers/nouveau/nv50/nv84_video.c
+++ b/src/gallium/drivers/nouveau/nv50/nv84_video.c
@@ -482,12 +482,14 @@ nv84_create_decoder(struct pipe_context *context,
mip.level[0].pitch = surf.width * 4;
mip.base.domain = NOUVEAU_BO_VRAM;
mip.base.bo = dec->mbring;
+ mip.base.address = dec->mbring->offset;
context->clear_render_target(context, &surf.base, &color, 0, 0, 64, 4760);
surf.offset = dec->vpring->size / 2 - 0x1000;
surf.width = 1024;
surf.height = 1;
mip.level[0].pitch = surf.width * 4;
mip.base.bo = dec->vpring;
+ mip.base.address = dec->vpring->offset;
context->clear_render_target(context, &surf.base, &color, 0, 0, 1024, 1);
surf.offset = dec->vpring->size - 0x1000;
context->clear_render_target(context, &surf.base, &color, 0, 0, 1024, 1);
commit a70892679293b3056475beaee4681294966d1698
Author: Ilia Mirkin <imirkin@alum.mit.edu>
Date: Mon Sep 1 10:55:27 2014 -0400
nv50/ir: avoid creating instructions that can't be emitted
When constant folding a MAD operation, we first fold the multiply and
generate an ADD. However we do so without making sure that the immediate
can be handled in the saturate case. If it can't, load the immediate in
a separate instruction.
Reported-by: Tiziano Bacocco <tizbac2@gmail.com>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 6c2b079231f84b09b3f35183930afe522baee168)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index 6e5b66c..d51306e 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -560,6 +560,10 @@ ConstantFolding::expr(Instruction *i,
ImmediateValue src0;
if (i->src(0).getImmediate(src0))
expr(i, src0, *i->getSrc(1)->asImm());
+ if (i->saturate && !prog->getTarget()->isSatSupported(i)) {
+ bld.setPosition(i, false);
+ i->setSrc(1, bld.loadImm(NULL, res.data.u32));
+ }
} else {
i->op = i->saturate ? OP_SAT : OP_MOV; /* SAT handled by unary() */
}
commit 2a967f712897d6dcd33e9d37e6c7a399580a2d8c
Author: Ilia Mirkin <imirkin@alum.mit.edu>
Date: Mon Sep 1 00:43:06 2014 -0400
nvc0: don't make 1d staging textures linear
Experimentally, the sampler doesn't appear to like these, neither as
buffer nor as rect textures. So remove 1D from the list of texture types
to make linear when used for staging.
This fixes the OSD in mplayer for VDPAU.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 115d9a5525e74573ced9209063a1d4a551e6eaa4)
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c b/src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c
index 79c9390..d602aed 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c
@@ -261,7 +261,6 @@ nvc0_miptree_create(struct pipe_screen *pscreen,
if (pt->usage == PIPE_USAGE_STAGING) {
switch (pt->target) {
- case PIPE_TEXTURE_1D:
case PIPE_TEXTURE_2D:
case PIPE_TEXTURE_RECT:
if (pt->last_level == 0 &&
commit eb38556137a92e6a4985e1d350fc5f4ecc4c81e4
Author: Ilia Mirkin <imirkin@alum.mit.edu>
Date: Sat Aug 30 13:35:47 2014 -0400
nv50: zero out unbound samplers
Samplers are only defined up to num_samplers, so set all samplers above
nr to NULL so that we don't try to read them again later.
Tested-by: Christian Ruppert <idl0r@qasl.de>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 362cd26960aff2e997584064443dcc0418516ae6)
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_state.c b/src/gallium/drivers/nouveau/nv50/nv50_state.c
index d0bc7ff..c140d6e 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_state.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_state.c
@@ -585,9 +585,12 @@ nv50_stage_sampler_states_bind(struct nv50_context *nv50, int s,
nv50_screen_tsc_unlock(nv50->screen, old);
}
assert(nv50->num_samplers[s] <= PIPE_MAX_SAMPLERS);
- for (; i < nv50->num_samplers[s]; ++i)
- if (nv50->samplers[s][i])
+ for (; i < nv50->num_samplers[s]; ++i) {
+ if (nv50->samplers[s][i]) {
nv50_screen_tsc_unlock(nv50->screen, nv50->samplers[s][i]);
+ nv50->samplers[s][i] = NULL;
+ }
+ }
nv50->num_samplers[s] = nr;
commit 836b0ae8b618e857a0f12ed725a091cf81da3000
Author: Ilia Mirkin <imirkin@alum.mit.edu>
Date: Thu Aug 28 23:05:49 2014 -0400
nvc0/ir: avoid infinite recursion when finding first uses of tex
In certain circumstances, findFirstUses could end up doubling back on
instructions it had already processed, resulting in an infinite
recursion. Avoid this by keeping track of already-visited instructions.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83079
Tested-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit c4bb436f7660c951cd27e52660cf825da68793e5)
Conflicts:
src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index 767cc02..ea1a17a 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -26,6 +26,7 @@
#include "codegen/nv50_ir_target_nvc0.h"
#include <limits>
+#include <tr1/unordered_set>
namespace nv50_ir {
@@ -148,7 +149,8 @@ private:
bool insertTextureBarriers(Function *);
inline bool insnDominatedBy(const Instruction *, const Instruction *) const;
void findFirstUses(const Instruction *tex, const Instruction *def,
- std::list<TexUse>&);
+ std::list<TexUse>&,
+ std::tr1::unordered_set<const Instruction *>&);
void findOverwritingDefs(const Instruction *tex, Instruction *insn,
const BasicBlock *term,
std::list<TexUse>&);
@@ -230,15 +232,31 @@ NVC0LegalizePostRA::findOverwritingDefs(const Instruction *texi,
}
void
Reply to: