xserver-xorg-video-intel: Changes to 'debian-experimental'
ChangeLog | 386 +++++++++++++++++++++++++++++++++++++++++++
NEWS | 30 +++
configure.ac | 22 ++
debian/changelog | 2
src/intel_display.c | 77 +++++++-
src/intel_dri.c | 14 +
src/sna/blt.c | 4
src/sna/compiler.h | 6
src/sna/gen4_render.c | 70 ++++---
src/sna/gen4_vertex.c | 354 ++++++++++++++++++++++++++++++++++++++-
src/sna/gen5_render.c | 9 -
src/sna/gen6_render.c | 9 -
src/sna/gen7_render.c | 25 +-
src/sna/gen7_render.h | 2
src/sna/kgem.c | 47 +++--
src/sna/kgem.h | 2
src/sna/sna_accel.c | 54 ++++--
src/sna/sna_cpu.c | 24 ++
src/sna/sna_display.c | 78 ++++++++
src/sna/sna_dri.c | 45 +++--
src/sna/sna_io.c | 25 --
src/sna/sna_render.c | 2
src/sna/sna_video_textured.c | 5
23 files changed, 1154 insertions(+), 138 deletions(-)
New commits:
commit 107503b8d1fa8c9feff3992d59ae976005dd8759
Author: Timo Aaltonen <tjaalton@ubuntu.com>
Date: Mon Apr 8 14:03:16 2013 +0300
update the changelogs
diff --git a/ChangeLog b/ChangeLog
index b6dbf4b..38312d2 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,389 @@
+commit 678279eb373310f1a71a3d74e5a500b343e98830
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Sat Apr 6 15:58:50 2013 +0100
+
+ 2.21.6 release
+
+commit 5332d5a7e055042233e279385bfe1388adfe15fa
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Sat Apr 6 15:42:23 2013 +0100
+
+ configure: Allow valgrind support to be manually enabled
+
+ Irrespective of the DDX debug settings, some people wish to run Xorg
+ under valgrind and so prefer to have the cleaner output by making the
+ DDX valgrind aware.
+
+ (Actually Maarten wants valgrind support enabled by default...)
+
+ Suggested-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 091cf6f0477824c5826547c02394752b6dc944ce
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Sat Apr 6 09:30:57 2013 +0100
+
+ sna: Improve assertions to detect rogue priv->cpu status
+
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 4a43aa81e27e8a651fde8a4761fd14bd8824d90c
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Thu Apr 4 10:53:55 2013 +0100
+
+ sna: Restore bo->flush status for large bo
+
+ Since we started discarding the flush flags on cached bo (in order to
+ prevent DRI flush states leaking), we failed to preserve the flush flag
+ for large bo (which uses it to keep batches trim and other hints).
+
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit ed3dab44a717a1a88470228b5e33f20de1e4ad0d
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Tue Apr 2 15:20:52 2013 +0100
+
+ sna: Adjust userptr structure for implicit padding
+
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 4e2fc5aee035c3059ca33dbcafc71dc5988d6b09
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Tue Apr 2 14:29:29 2013 +0100
+
+ sna: Relax scanline waits on HSW to be emittable from either ring
+
+ My overzealous reading of the bspec lead me to the conclusion that the
+ MI_LOAD_SCANLINES command was only available on the blitter ring. This
+ is false, thankfully, and allows us to do vsync'ed Xv.
+
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 5a36fdcee769195d5c6e642e84a8976114e7c6de
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Tue Apr 2 11:01:53 2013 +0100
+
+ sna/gen4: Kill stray debugging ErrorF from previous commit
+
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 3d7e16addb2fb5f35936aafe8e16685a91d30f59
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Tue Apr 2 10:58:52 2013 +0100
+
+ sna/gen4: Break the Video rendering loop into 16 rectangle chunks
+
+ If we feed more than 16 rectangles into the video rendering pipeline,
+ the GPU goes crazy and starts emitting corruption. Lalalala.
+
+ Bugzilla: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1162046
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit f09aa788d79d36688bcfdd3b49b92367590c5f16
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Tue Apr 2 10:01:21 2013 +0100
+
+ DRI2GetMSC: Do not send a bogus ust for when the drawable is not displayed
+
+ According to the opengl glx_sync_control spec, the Unadjusted System Time
+ (or UST) is a 64-bit monotonically increasing counter that is available
+ throughout the system:
+ http://www.opengl.org/registry/specs/OML/glx_sync_control.txt
+
+ Therefore, sending 0, even in this corner case, is out of spec. However,
+ we cannot just return FALSE here as that triggers a BadDrawable error to
+ be sent, and as is often the case mishandled, to the client. This results
+ in a certain compositor terminating, for example.
+
+ As an alternative we can use the monotonic system timestamp which in
+ theory should also be monotonic with the previous and subsequent vblank
+ times.
+
+ Based on a patch by Daniel Kurtz.
+
+ Reported-by: Daniel Kurtz <djkurtz@chromium.org>
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 4af622edfc18af523e1fa9063379f68374e19b04
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Mon Apr 1 22:44:13 2013 +0100
+
+ sna: Try to eliminate pending operations to the bo being replaced
+
+ When we are replacing a bo with fresh data, we can drop pending
+ operations to it and thereby reduce the complexity of the replacement.
+
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit ef0038d358e613381e03c077e06a87fc49108d87
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Mon Apr 1 22:43:48 2013 +0100
+
+ sna: Allow the compiler to inline memcpy for the bitblt routines
+
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 43181692f752f0a552d2e2c76d8379fe16e521cf
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Thu Mar 28 15:41:38 2013 +0000
+
+ sna/gen7: Refine is_gt2() for Haswell versus Ivybridge
+
+ The two similar chipsets do not use the same PCI-ID encoding schema.
+
+ Fixes regression from
+ commit 235a3981ea9759317b392302a2b2b8f4fafab410
+ Author: Chris Wilson <chris@chris-wilson.co.uk>
+ Date: Tue Mar 26 20:37:14 2013 +0000
+
+ sna/gen7: Use GT2 values for GT2 variants
+
+ Reported-by: zaverel@free.fr
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 96c10bdff95a3f8a68c6623446655c4c3dbf738a
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Wed Mar 27 22:10:37 2013 +0000
+
+ sna/gen7: Resist the temptation to overprogram the number of PS threads for HSW
+
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 19dfa72c28c6dc677dbfec3a538d4481985195e5
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Wed Mar 27 16:56:10 2013 +0000
+
+ sna/gen4+: Set read-write allocation mode for the target render cache
+
+ As we often first clear the destination before performing a blend, we
+ get a performance boost if that first write populates the render cache.
+
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit d9b8c2039d1be17af8c56364341fc3e10795f200
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Wed Mar 27 14:49:15 2013 +0000
+
+ sna/gen7: Fix MOCS for Haswell
+
+ The memory attributes changed slightly, and in particular there is now
+ an explicit uncached setting - which of course happened to be the value
+ currently selected.
+
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 04b28021409bc179f6705802f3ccacb1e3c48cc5
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Tue Mar 26 21:53:04 2013 +0000
+
+ sna/gen7: Restore render acceleration for VLV power-on board
+
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 2054f43e4332e9d0ed61a0d643a1390dffff8d96
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Tue Mar 26 20:38:52 2013 +0000
+
+ sna/gen7: Prefer spans for GT2 desktop variants
+
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 235a3981ea9759317b392302a2b2b8f4fafab410
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Tue Mar 26 20:37:14 2013 +0000
+
+ sna/gen7: Use GT2 values for GT2 variants
+
+ The check was only testing for GT2+ and excluding the normal GT2
+ devices. See also
+
+ commit ce9f0448367ea6a90490a28150bfdc0a76500129
+ Author: Chris Wilson <chris@chris-wilson.co.uk>
+ Date: Fri Feb 8 16:01:54 2013 +0000
+
+ sna/gen6: Use GT2 settings for both GT2 and GT2+
+
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 3dddb01005274376c8cdc5eecad36d4e0723004a
+Author: Mark Kettenis <kettenis@openbsd.org>
+Date: Tue Mar 26 20:50:53 2013 +0100
+
+ sna: Use a more portable way to determine total RAM size
+
+ The sysinfo function is Linux-specific. sysconf(_SC_PHYS_PAGES), while
+ not truly portable, is available on many more systems, including Linux,
+ Solaris, NetBSD, FreeBSD and OpenBSD. So use that instead. Verified
+ that this results in the same value as the sysinfo call on a handful of
+ Linux systems.
+
+ Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
+
+commit e63390df52117e1d3ca9d23a736e9995bc734765
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Tue Mar 26 16:32:13 2013 +0000
+
+ sna: Add extra '()' around bitwise &/&& for CPU feature detection
+
+ By popular demand.
+
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 1d6f4078c1e405749ff688058ef76c287ab36201
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Tue Mar 26 16:28:26 2013 +0000
+
+ sna/gen4+: Reorder code to compile on squeeze
+
+ Remember to only use sse4_2, avx2 in their restricted sections that
+ check for compiler support.
+
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 0b479504c82bd81c0b93de0e6529eae928eea3bf
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Tue Mar 26 16:12:30 2013 +0000
+
+ sna: Check for OS support of AVX/AVX2 before use
+
+ If the OS has not initialised support for the extended instructions,
+ then their use may result in general protection faults.
+
+ Based on code by Thiago Macieira.
+
+ Reported-by: Arjan van de Ven <arjan@linux.intel.com>
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 9620f419076202ebc89b4c7f1c06374fb2554f28
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Tue Mar 26 15:44:42 2013 +0000
+
+ sna: Fix AVX2 detection
+
+ It requires use of the cpuid feature eax=7:ecx=0, so it requires the
+ extended version of __cpuid to pass in the subfeature.
+
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit da2bd82b0e10f8a263f7ab4fb49b440349d97ace
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Tue Mar 26 15:13:32 2013 +0000
+
+ sna/gen4+: Add a couple more advanced SSE variants for composite vertices
+
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 86bcf4a9f5dff98eab076df5872c3c412c0c13af
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Tue Mar 26 15:13:08 2013 +0000
+
+ sna: AVX2 is in the ebx result of cpuid
+
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit a5be4210b7e8b4a895a70ba617fda45d2e0188f0
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Tue Mar 26 09:05:48 2013 +0000
+
+ sna: Trim removed fields from execbuffer2 for OpenBSD support
+
+ Reported-by: Mark Kettenis <kettenis@openbsd.org>
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 761ab4124e00b3dbab15abe69a9b29d9c3d0da0d
+Author: Mark Kettenis <kettenis@openbsd.org>
+Date: Mon Mar 25 22:40:35 2013 +0100
+
+ sna: Fix OpenBSD backlight control implementation
+
+ Fix cut'n'paste error such that this actually compiles.
+
+ Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
+
+commit 0a9b136ec43c860e6e6e651efea0330ac36a4ea5
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Mon Mar 25 15:34:41 2013 +0000
+
+ Remove the GeneralSocket upon CloseScreen
+
+ Be neat and tidy in case we are shutdown but the server is not
+ regenerated (e.g. a hot-unplug).
+
+ Reported-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 6b20924f22a14f69651dcf471c48f8a44d8ad42f
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Sat Mar 23 23:08:02 2013 +0000
+
+ sna: Convert out-of-bounds sample to CLEAR
+
+ If asked to perform pixelformat conversion of a sample that resides
+ outside the valid area, we can simply substitute CLEAR.
+
+ Bugzila: http://bugs.freedesktop.org/show_bug.cgi?id=62681
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit f6582387e7d601272a92c3aaeb656de5ce1ffe75
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Sat Mar 23 10:22:41 2013 +0000
+
+ sna: Fix an assertion to check the correct bo
+
+ After syncing the GPU bo for use, that's what we should test as well.
+
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 88b6b80c2a5191717f0baeb22cdb70ee8c993e09
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Fri Mar 22 13:36:16 2013 +0000
+
+ sna: Fix assertions that the pixmap points into the CPU bo for fallbacks
+
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit ccd6b7e402e731c73163b132a80ae29ae2911613
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Fri Mar 22 11:28:01 2013 +0000
+
+ sna: Add backlight control implementation
+
+ Based on the previous patch by Mark Kettenis <kettenis@openbsd.org>
+
+commit 364e02c7998813643bc81f25ba077a764872d49e
+Author: Mark Kettenis <kettenis@openbsd.org>
+Date: Fri Mar 22 11:23:11 2013 +0100
+
+ uxa: Add OpenBSD backlight control implementation
+
+ Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
+
+commit 8d75b2ece1de1c95047c5dc5a569348abd0e6325
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Fri Mar 22 09:51:46 2013 +0000
+
+ sna: Fix computation of clip extents for stippling
+
+ The clip extents for the stippled BLT missed applying the drawable
+ offset to the lower-right corner, so inevitably every operation ended up
+ being clipped.
+
+ Reported-by: Clemens Eisserer <linuxhippy@gmail.com>
+ Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=62618
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 9f8e86800345d19785eae2dd2099dd7d61a7a3b3
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Thu Mar 21 22:48:06 2013 +0000
+
+ sna/dri: Disable assertion and associated bookkeeping
+
+ Due to long standing ignored bugs in DRI2, we have to accept breakage
+ in the driver.
+
+ Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=62614
+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
commit 4adebfed415cf58599b22e873f32e7ce2eaa6542
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date: Thu Mar 21 08:53:12 2013 +0000
diff --git a/debian/changelog b/debian/changelog
index 708320c..b2a751d 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,4 +1,4 @@
-xserver-xorg-video-intel (2:2.21.5-1) UNRELEASED; urgency=low
+xserver-xorg-video-intel (2:2.21.6-1) UNRELEASED; urgency=low
[ Timo Aaltonen ]
* New upstream release.
commit 678279eb373310f1a71a3d74e5a500b343e98830
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date: Sat Apr 6 15:58:50 2013 +0100
2.21.6 release
diff --git a/NEWS b/NEWS
index 05a20fa..4fc9a6b 100644
--- a/NEWS
+++ b/NEWS
@@ -1,3 +1,33 @@
+Release 2.21.6 (2013-04-06)
+===========================
+A surprising highlight of this release is a little refresh to the KMS
+support for OpenBSD. OpenBSD now has its own KMS implementation which is
+mostly compatible with the interface in Linux, with one or two tweaks
+supplied by Mark Kettenis. This release continues to cleanup behaviour
+for Haswell.
+
+ * Workaround a failure by the xserver to invalidate DRI buffers
+ following a pixmap change for XComposite redirection.
+ https://bugs.freedesktop.org/show_bug.cgi?id=62614
+
+ * Fix computation of clip extents for stippling
+ https://bugs.freedesktop.org/show_bug.cgi?id=62618
+
+ * Support KMS on OpenBSD, by Mark Kettenis
+
+ * Clean up sockets upon CloseScreen (making ourselves better behaved
+ for muxed setups).
+
+ * Fix the tests for AVX/AVX2 support in CPUID and remember to check for
+ OS support as well.
+
+ * Report a monotonic UST value for undisplayed drawables rather than 0
+ by Daniel Kurtz
+
+ * Fix video playback on gen4 through a complex clip (more gen4 GPU woes)
+ https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1162046
+
+
Release 2.21.5 (2013-03-21)
===========================
Haswell reintroduces a command to load the scanline window from the
diff --git a/configure.ac b/configure.ac
index 794b383..fa82507 100644
--- a/configure.ac
+++ b/configure.ac
@@ -23,7 +23,7 @@
# Initialize Autoconf
AC_PREREQ([2.60])
AC_INIT([xf86-video-intel],
- [2.21.5],
+ [2.21.6],
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg],
[xf86-video-intel])
AC_CONFIG_SRCDIR([Makefile.am])
commit 5332d5a7e055042233e279385bfe1388adfe15fa
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date: Sat Apr 6 15:42:23 2013 +0100
configure: Allow valgrind support to be manually enabled
Irrespective of the DDX debug settings, some people wish to run Xorg
under valgrind and so prefer to have the cleaner output by making the
DDX valgrind aware.
(Actually Maarten wants valgrind support enabled by default...)
Suggested-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
diff --git a/configure.ac b/configure.ac
index 8b12d01..794b383 100644
--- a/configure.ac
+++ b/configure.ac
@@ -353,6 +353,12 @@ AC_ARG_ENABLE(debug,
[Enables internal debugging [default=no]]),
[DEBUG="$enableval"],
[DEBUG=no])
+AC_ARG_ENABLE(valgrind,
+ AS_HELP_STRING([--enable-valgrind],
+ [Enables valgrindified ioctls for debugging [default=no]]),
+ [VG="$enableval"],
+ [VG=no])
+
# Store the list of server defined optional extensions in REQUIRED_MODULES
XORG_DRIVER_CHECK_EXT(RANDR, randrproto)
XORG_DRIVER_CHECK_EXT(RENDER, renderproto)
@@ -439,12 +445,22 @@ AM_CONDITIONAL(DEBUG, test x$DEBUG != xno)
AM_CONDITIONAL(FULL_DEBUG, test x$DEBUG = xfull)
if test "x$DEBUG" = xno; then
AC_DEFINE(NDEBUG,1,[Disable internal debugging])
+else
+ if test "x$VG" != xyes; then
+ VG=auto
+ fi
fi
-if test "x$DEBUG" != xno; then
+if test "x$VG" != xno; then
PKG_CHECK_MODULES(VALGRIND, [valgrind], have_valgrind=yes, have_valgrind=no)
+ AC_MSG_CHECKING([whether to include valgrind support])
if test x$have_valgrind = xyes; then
AC_DEFINE([HAVE_VALGRIND], 1, [Use valgrind intrinsics to suppress false warnings])
+ else
+ if test "x$VG" = xyes; then
+ AC_MSG_ERROR([valgrind support requested, but valgrind-dev headers not found])
+ fi
fi
+ AC_MSG_RESULT([$have_valgrind ($VG)])
fi
if test "x$DEBUG" = xsync; then
AC_DEFINE(DEBUG_SYNC,1,[Enable synchronous rendering for debugging])
commit 091cf6f0477824c5826547c02394752b6dc944ce
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date: Sat Apr 6 09:30:57 2013 +0100
sna: Improve assertions to detect rogue priv->cpu status
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
diff --git a/src/sna/sna_accel.c b/src/sna/sna_accel.c
index 9bc6fe3..217a4a2 100644
--- a/src/sna/sna_accel.c
+++ b/src/sna/sna_accel.c
@@ -340,6 +340,10 @@ static void assert_pixmap_damage(PixmapPtr p)
return;
}
+ if (DAMAGE_IS_ALL(priv->gpu_damage)) {
+ assert(priv->cpu == false || (priv->mapped && IS_CPU_MAP(priv->gpu_bo->map)));
+ }
+
assert(!DAMAGE_IS_ALL(priv->gpu_damage) || priv->cpu_damage == NULL);
assert(!DAMAGE_IS_ALL(priv->cpu_damage) || priv->gpu_damage == NULL);
@@ -1788,6 +1792,7 @@ mark_damage:
}
done:
+ assert(priv->gpu_damage == NULL);
if (flags & MOVE_WRITE) {
assert(DAMAGE_IS_ALL(priv->cpu_damage));
priv->source_count = SOURCE_BIAS;
@@ -1898,6 +1903,7 @@ static inline bool region_inplace(struct sna *sna,
if (DAMAGE_IS_ALL(priv->gpu_damage)) {
DBG(("%s: yes, already wholly damaged on the GPU\n", __FUNCTION__));
assert(priv->gpu_bo);
+ assert(priv->cpu == false || (priv->mapped && IS_CPU_MAP(priv->gpu_bo->map)));
return true;
}
@@ -1915,6 +1921,11 @@ static inline bool region_inplace(struct sna *sna,
>= sna->kgem.half_cpu_cache_pages;
}
+static inline bool box_empty(const BoxRec *box)
+{
+ return box->x2 <= box->x1 || box->y2 <= box->y1;
+}
+
bool
sna_drawable_move_region_to_cpu(DrawablePtr drawable,
RegionPtr region,
@@ -1937,6 +1948,9 @@ sna_drawable_move_region_to_cpu(DrawablePtr drawable,
assert_drawable_contains_box(drawable, ®ion->extents);
}
+ if (box_empty(®ion->extents))
+ return true;
+
priv = sna_pixmap(pixmap);
if (priv == NULL) {
DBG(("%s: not attached to %p\n", __FUNCTION__, pixmap));
@@ -2012,6 +2026,7 @@ sna_drawable_move_region_to_cpu(DrawablePtr drawable,
pixmap->drawable.height)) {
DBG(("%s: replaced entire pixmap, destroying CPU shadow\n",
__FUNCTION__));
+ assert(priv->cpu == false || (priv->mapped && IS_CPU_MAP(priv->gpu_bo->map)));
sna_damage_destroy(&priv->cpu_damage);
list_del(&priv->list);
} else
@@ -2348,11 +2363,6 @@ out:
return true;
}
-static inline bool box_empty(const BoxRec *box)
-{
- return box->x2 <= box->x1 || box->y2 <= box->y1;
-}
-
bool
sna_drawable_move_to_cpu(DrawablePtr drawable, unsigned flags)
{
@@ -2474,6 +2484,8 @@ sna_pixmap_move_area_to_gpu(PixmapPtr pixmap, const BoxRec *box, unsigned int fl
pixmap->drawable.width,
pixmap->drawable.height)) {
assert(priv->gpu_bo);
+ assert(priv->gpu_bo->proxy == NULL);
+ assert(priv->cpu == false || (priv->mapped && IS_CPU_MAP(priv->gpu_bo->map)));
sna_damage_destroy(&priv->cpu_damage);
list_del(&priv->list);
goto done;
@@ -2715,6 +2727,8 @@ sna_drawable_use_bo(DrawablePtr drawable, unsigned flags, const BoxRec *box,
DBG(("%s: use GPU fast path (all-damaged)\n", __FUNCTION__));
assert(priv->cpu_damage == NULL);
assert(priv->gpu_bo);
+ assert(priv->gpu_bo->proxy == NULL);
+ assert(priv->cpu == false || (priv->mapped && IS_CPU_MAP(priv->gpu_bo->map)));
goto use_gpu_bo;
}
@@ -2879,6 +2893,7 @@ done:
if (sna_damage_is_all(&priv->gpu_damage,
pixmap->drawable.width,
pixmap->drawable.height)) {
+ assert(priv->cpu == false || (priv->mapped && IS_CPU_MAP(priv->gpu_bo->map)));
sna_damage_destroy(&priv->cpu_damage);
list_del(&priv->list);
*damage = NULL;
@@ -3121,9 +3136,10 @@ sna_pixmap_move_to_gpu(PixmapPtr pixmap, unsigned flags)
pixmap->drawable.height)) {
DBG(("%s: already all-damaged\n", __FUNCTION__));
assert(priv->gpu_bo);
+ assert(priv->gpu_bo->proxy == NULL);
+ assert(priv->cpu == false || (priv->mapped && IS_CPU_MAP(priv->gpu_bo->map)));
sna_damage_destroy(&priv->cpu_damage);
list_del(&priv->list);
- assert(priv->cpu == false || IS_CPU_MAP(priv->gpu_bo->map));
goto active;
}
@@ -3279,8 +3295,10 @@ done:
sna_damage_reduce_all(&priv->gpu_damage,
pixmap->drawable.width,
pixmap->drawable.height);
- if (DAMAGE_IS_ALL(priv->gpu_damage))
+ if (DAMAGE_IS_ALL(priv->gpu_damage)) {
+ assert(priv->cpu == false || (priv->mapped && IS_CPU_MAP(priv->gpu_bo->map)));
sna_pixmap_free_cpu(sna, priv);
+ }
active:
if (flags & MOVE_WRITE)
@@ -3945,6 +3963,7 @@ move_to_gpu(PixmapPtr pixmap, struct sna_pixmap *priv,
if (DAMAGE_IS_ALL(priv->gpu_damage)) {
assert(priv->gpu_bo);
+ assert(priv->cpu == false || (priv->mapped && IS_CPU_MAP(priv->gpu_bo->map)));
return true;
}
commit 4a43aa81e27e8a651fde8a4761fd14bd8824d90c
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date: Thu Apr 4 10:53:55 2013 +0100
sna: Restore bo->flush status for large bo
Since we started discarding the flush flags on cached bo (in order to
prevent DRI flush states leaking), we failed to preserve the flush flag
for large bo (which uses it to keep batches trim and other hints).
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
diff --git a/src/sna/kgem.c b/src/sna/kgem.c
index c670dbb..4136ce9 100644
--- a/src/sna/kgem.c
+++ b/src/sna/kgem.c
@@ -3606,7 +3606,6 @@ struct kgem_bo *kgem_create_2d(struct kgem *kgem,
assert(!bo->scanout);
assert(bo->refcnt == 0);
assert(bo->reusable);
- assert(bo->flush == true);
if (kgem->gen < 040) {
if (bo->pitch < pitch) {
@@ -3640,6 +3639,7 @@ struct kgem_bo *kgem_create_2d(struct kgem *kgem,
bo->pitch, bo->tiling, bo->handle, bo->unique_id));
assert(bo->pitch*kgem_aligned_height(kgem, height, bo->tiling) <= kgem_bo_size(bo));
bo->refcnt = 1;
+ bo->flush = true;
return bo;
}
commit ed3dab44a717a1a88470228b5e33f20de1e4ad0d
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date: Tue Apr 2 15:20:52 2013 +0100
sna: Adjust userptr structure for implicit padding
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
diff --git a/src/sna/kgem.c b/src/sna/kgem.c
index 9013e68..c670dbb 100644
--- a/src/sna/kgem.c
+++ b/src/sna/kgem.c
@@ -128,7 +128,7 @@ search_snoop_cache(struct kgem *kgem, unsigned int num_pages, unsigned flags);
#define LOCAL_IOCTL_I915_GEM_USERPTR DRM_IOWR (DRM_COMMAND_BASE + LOCAL_I915_GEM_USERPTR, struct local_i915_gem_userptr)
struct local_i915_gem_userptr {
uint64_t user_ptr;
- uint32_t user_size;
+ uint64_t user_size;
uint32_t flags;
#define I915_USERPTR_READ_ONLY (1<<0)
#define I915_USERPTR_UNSYNCHRONIZED (1<<31)
@@ -1482,6 +1482,7 @@ static void kgem_bo_free(struct kgem *kgem, struct kgem_bo *bo)
if (IS_USER_MAP(bo->map)) {
assert(bo->rq == NULL);
+ assert(!__kgem_busy(kgem, bo->handle));
assert(MAP(bo->map) != bo || bo->io || bo->flush);
if (!(bo->io || bo->flush)) {
DBG(("%s: freeing snooped base\n", __FUNCTION__));
commit 4e2fc5aee035c3059ca33dbcafc71dc5988d6b09
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date: Tue Apr 2 14:29:29 2013 +0100
sna: Relax scanline waits on HSW to be emittable from either ring
My overzealous reading of the bspec lead me to the conclusion that the
MI_LOAD_SCANLINES command was only available on the blitter ring. This
is false, thankfully, and allows us to do vsync'ed Xv.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
diff --git a/src/sna/sna_display.c b/src/sna/sna_display.c
index 6d61650..0d32086 100644
--- a/src/sna/sna_display.c
+++ b/src/sna/sna_display.c
@@ -2887,15 +2887,13 @@ static bool sna_emit_wait_for_scanline_hsw(struct sna *sna,
uint32_t event;
uint32_t *b;
- if (sna->kgem.mode != KGEM_BLT)
- return false;
-
b = kgem_get_batch(&sna->kgem);
sna->kgem.nbatch += 5;
/* The documentation says that the LOAD_SCAN_LINES command
* always comes in pairs. Don't ask me why. */
switch (pipe) {
+ default: assert(0);
case 0: event = 0; break;
case 1: event = 1 << 19; break;
case 2: event = 4 << 19; break;
@@ -2904,6 +2902,7 @@ static bool sna_emit_wait_for_scanline_hsw(struct sna *sna,
b[3] = b[1] = (y1 << 16) | (y2-1);
switch (pipe) {
+ default: assert(0);
case 0: event = 0; break;
case 1: event = 1 << 8; break;
case 2: event = 1 << 14; break;
commit 5a36fdcee769195d5c6e642e84a8976114e7c6de
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date: Tue Apr 2 11:01:53 2013 +0100
sna/gen4: Kill stray debugging ErrorF from previous commit
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
diff --git a/src/sna/gen4_render.c b/src/sna/gen4_render.c
index c05b37b..69a5c77 100644
--- a/src/sna/gen4_render.c
+++ b/src/sna/gen4_render.c
@@ -1392,7 +1392,6 @@ gen4_render_video(struct sna *sna,
n = gen4_get_rectangles(sna, &tmp, min(nbox, 16),
gen4_video_bind_surfaces);
- ErrorF("n=%d/%d\n", n, nbox);
assert(n);
nbox -= n;
commit 3d7e16addb2fb5f35936aafe8e16685a91d30f59
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date: Tue Apr 2 10:58:52 2013 +0100
sna/gen4: Break the Video rendering loop into 16 rectangle chunks
If we feed more than 16 rectangles into the video rendering pipeline,
the GPU goes crazy and starts emitting corruption. Lalalala.
Bugzilla: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1162046
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
diff --git a/src/sna/gen4_render.c b/src/sna/gen4_render.c
index 1bf5ad2..c05b37b 100644
--- a/src/sna/gen4_render.c
+++ b/src/sna/gen4_render.c
@@ -1387,37 +1387,51 @@ gen4_render_video(struct sna *sna,
box = REGION_RECTS(dstRegion);
nbox = REGION_NUM_RECTS(dstRegion);
- while (nbox--) {
- BoxRec r;
+ do {
+ int n;
- r.x1 = box->x1 + pix_xoff;
- r.x2 = box->x2 + pix_xoff;
- r.y1 = box->y1 + pix_yoff;
- r.y2 = box->y2 + pix_yoff;
+ n = gen4_get_rectangles(sna, &tmp, min(nbox, 16),
+ gen4_video_bind_surfaces);
+ ErrorF("n=%d/%d\n", n, nbox);
+ assert(n);
+ nbox -= n;
- gen4_get_rectangles(sna, &tmp, 1, gen4_video_bind_surfaces);
+ do {
+ BoxRec r;
- OUT_VERTEX(r.x2, r.y2);
- OUT_VERTEX_F(box->x2 * src_scale_x + src_offset_x);
- OUT_VERTEX_F(box->y2 * src_scale_y + src_offset_y);
+ r.x1 = box->x1 + pix_xoff;
+ r.x2 = box->x2 + pix_xoff;
+ r.y1 = box->y1 + pix_yoff;
+ r.y2 = box->y2 + pix_yoff;
- OUT_VERTEX(r.x1, r.y2);
- OUT_VERTEX_F(box->x1 * src_scale_x + src_offset_x);
- OUT_VERTEX_F(box->y2 * src_scale_y + src_offset_y);
+ OUT_VERTEX(r.x2, r.y2);
+ OUT_VERTEX_F(box->x2 * src_scale_x + src_offset_x);
+ OUT_VERTEX_F(box->y2 * src_scale_y + src_offset_y);
- OUT_VERTEX(r.x1, r.y1);
- OUT_VERTEX_F(box->x1 * src_scale_x + src_offset_x);
- OUT_VERTEX_F(box->y1 * src_scale_y + src_offset_y);
+ OUT_VERTEX(r.x1, r.y2);
+ OUT_VERTEX_F(box->x1 * src_scale_x + src_offset_x);
+ OUT_VERTEX_F(box->y2 * src_scale_y + src_offset_y);
- if (!DAMAGE_IS_ALL(priv->gpu_damage)) {
- sna_damage_add_box(&priv->gpu_damage, &r);
- sna_damage_subtract_box(&priv->cpu_damage, &r);
- }
- box++;
- }
- priv->clear = false;
+ OUT_VERTEX(r.x1, r.y1);
+ OUT_VERTEX_F(box->x1 * src_scale_x + src_offset_x);
+ OUT_VERTEX_F(box->y1 * src_scale_y + src_offset_y);
- gen4_vertex_flush(sna);
+ if (!DAMAGE_IS_ALL(priv->gpu_damage)) {
+ sna_damage_add_box(&priv->gpu_damage, &r);
+ sna_damage_subtract_box(&priv->cpu_damage, &r);
+ }
+ box++;
+ } while (--n);
+
+ gen4_vertex_flush(sna);
+ if (!nbox)
+ break;
+
+ /* VUE corruption strikes again */
+ OUT_BATCH(MI_FLUSH | MI_INHIBIT_RENDER_CACHE_FLUSH);
+ } while (1);
+
+ priv->clear = false;
return true;
}
diff --git a/src/sna/sna_video_textured.c b/src/sna/sna_video_textured.c
index bd20325..d94dbd8 100644
--- a/src/sna/sna_video_textured.c
+++ b/src/sna/sna_video_textured.c
@@ -230,6 +230,11 @@ sna_video_textured_put_image(ScrnInfoPtr scrn,
drw_x, drw_y, drw_w, drw_h,
id, width, height, sync));
+ DBG(("%s: region %d:(%d, %d), (%d, %d)\n", __FUNCTION__,
+ RegionNumRects(clip),
+ clip->extents.x1, clip->extents.y1,
+ clip->extents.x2, clip->extents.y2));
+
if (buf == 0) {
DBG(("%s: garbage video buffer\n", __FUNCTION__));
return BadAlloc;
commit f09aa788d79d36688bcfdd3b49b92367590c5f16
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date: Tue Apr 2 10:01:21 2013 +0100
DRI2GetMSC: Do not send a bogus ust for when the drawable is not displayed
According to the opengl glx_sync_control spec, the Unadjusted System Time
(or UST) is a 64-bit monotonically increasing counter that is available
throughout the system:
http://www.opengl.org/registry/specs/OML/glx_sync_control.txt
Therefore, sending 0, even in this corner case, is out of spec. However,
we cannot just return FALSE here as that triggers a BadDrawable error to
be sent, and as is often the case mishandled, to the client. This results
in a certain compositor terminating, for example.
As an alternative we can use the monotonic system timestamp which in
theory should also be monotonic with the previous and subsequent vblank
times.
Based on a patch by Daniel Kurtz.
Reported-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
diff --git a/src/intel_dri.c b/src/intel_dri.c
index f351203..8f27921 100644
--- a/src/intel_dri.c
+++ b/src/intel_dri.c
@@ -1326,6 +1326,16 @@ blit_fallback:
return TRUE;
}
+static uint64_t gettime_us(void)
+{
+ struct timespec tv;
+
+ if (clock_gettime(CLOCK_MONOTONIC, &tv))
+ return 0;
+
+ return (uint64_t)tv.tv_sec * 1000000 + tv.tv_nsec / 1000;
+}
+
/*
* Get current frame count and frame count timestamp, based on drawable's
* crtc.
@@ -1339,9 +1349,9 @@ I830DRI2GetMSC(DrawablePtr draw, CARD64 *ust, CARD64 *msc)
drmVBlank vbl;
int ret, pipe = I830DRI2DrawablePipe(draw);
- /* Drawable not displayed, make up a value */
+ /* Drawable not displayed, make up a *monotonic* value */
if (pipe == -1) {
- *ust = 0;
+ *ust = gettime_us();
*msc = 0;
return TRUE;
}
diff --git a/src/sna/sna_dri.c b/src/sna/sna_dri.c
index 0962e25..5fb1662 100644
--- a/src/sna/sna_dri.c
+++ b/src/sna/sna_dri.c
@@ -37,6 +37,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
#endif
#include <errno.h>
+#include <time.h>
#include <string.h>
#include "sna.h"
@@ -2216,6 +2217,16 @@ sna_dri_async_swap(ClientPtr client, DrawablePtr draw,
}
#endif
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