xserver-xorg-video-ati: Changes to 'ubuntu'
ChangeLog | 1760 ++++
configure.ac | 2
debian/README.source | 24
debian/changelog | 79
debian/compat | 2
debian/control | 22
debian/patches/101_fix_build_aginst_1.10rc3.diff | 32
debian/patches/102_disable_pageflipping_for_transformed_displays.patch | 64
debian/patches/series | 3
debian/rules | 132
debian/watch | 1
debian/xserver-xorg-video-ati.install | 1
debian/xserver-xorg-video-ati.manpages | 1
debian/xserver-xorg-video-radeon.install | 1
debian/xserver-xorg-video-radeon.manpages | 1
debian/xserver-xorg-video-radeon.postinst.in | 25
debian/xserver-xorg-video-radeon.postrm.in | 21
debian/xserver-xorg-video-radeon.preinst.in | 17
debian/xserver-xorg-video-radeon.prerm.in | 21
debian/xsfbs/repack.sh | 32
debian/xsfbs/xsfbs.mk | 285
debian/xsfbs/xsfbs.sh | 622 -
man/radeon.man | 18
src/Makefile.am | 5
src/ati_pciids_gen.h | 21
src/atombios_output.c | 5
src/cayman_accel.c | 307
src/cayman_reg.h | 236
src/cayman_reg_auto.h | 4351 ++++++++++
src/cayman_shader.c | 3165 +++++++
src/cayman_shader.h | 279
src/drmmode_display.c | 50
src/evergreen_accel.c | 124
src/evergreen_exa.c | 502 -
src/evergreen_reg.h | 3
src/evergreen_shader.c | 60
src/evergreen_shader.h | 66
src/evergreen_state.h | 24
src/evergreen_textured_videofuncs.c | 79
src/pcidb/ati_pciids.csv | 21
src/r600_exa.c | 342
src/r600_reg.h | 21
src/r600_shader.c | 60
src/r600_shader.h | 80
src/r600_state.h | 7
src/r600_textured_videofuncs.c | 49
src/r6xx_accel.c | 77
src/radeon.h | 10
src/radeon_atombios.c | 28
src/radeon_chipinfo_gen.h | 21
src/radeon_chipset_gen.h | 21
src/radeon_crtc.c | 2
src/radeon_dri2.c | 121
src/radeon_driver.c | 5
src/radeon_exa.c | 34
src/radeon_exa_funcs.c | 14
src/radeon_exa_render.c | 36
src/radeon_kms.c | 118
src/radeon_legacy_memory.c | 2
src/radeon_output.c | 8
src/radeon_pci_chipset_gen.h | 21
src/radeon_pci_device_match_gen.h | 21
src/radeon_reg.h | 1
src/radeon_textured_video.c | 52
src/radeon_textured_videofuncs.c | 27
src/radeon_video.h | 1
66 files changed, 11583 insertions(+), 2060 deletions(-)
New commits:
commit d1886e2e978d2b877168dd941709a11802d4c5d3
Author: Timo Aaltonen <tjaalton@ubuntu.com>
Date: Thu Jun 30 18:25:32 2011 +0300
Update the changelog and purge obsolete stuff
diff --git a/debian/changelog b/debian/changelog
index 38f2383..c78eb1f 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,3 +1,20 @@
+xserver-xorg-video-ati (1:6.14.2-1ubuntu1) UNRELEASED; urgency=low
+
+ * Merged with Debian unstable, remaining changes:
+ + debian/patches/100_radeon-6.9.0-bgnr-enable.patch:
+ - Smooth plymouth transition enablement patch
+ + debian/rules:
+ - Drop /etc/modprobe.d/radeon-kms.conf install.
+ + Add debian/gbp.conf pointing to Ubuntu branch to make
+ git-buildpackage less narky.
+ * Dropped patches
+ 101_fix_build_aginst_1.10rc3.diff
+ 102_disable_pageflipping_for_transformed_displays.patch
+ - included upstream
+ * Drop the change removing radeon-kms.conf, obsolete since 10.04 final.
+
+ -- Timo Aaltonen <tjaalton@ubuntu.com> Thu, 30 Jun 2011 18:00:40 +0300
+
xserver-xorg-video-ati (1:6.14.2-1) unstable; urgency=low
* New upstream release.
@@ -68,11 +85,11 @@ xserver-xorg-video-ati (1:6.14.0-0ubuntu3) natty; urgency=low
-- Christopher James Halse Rogers <raof@ubuntu.com> Wed, 09 Mar 2011 18:45:43 +1100
xserver-xorg-video-ati (1:6.14.0-0ubuntu2) natty; urgency=low
-
+
* Rebuild to pick up new Xserver dependencies
-
+
-- Christopher James Halse Rogers <raof@ubuntu.com> Wed, 23 Feb 2011 17:52:57 +1100
-
+
xserver-xorg-video-ati (1:6.14.0-0ubuntu1) natty; urgency=low
* New upstream release
diff --git a/debian/patches/101_fix_build_aginst_1.10rc3.diff b/debian/patches/101_fix_build_aginst_1.10rc3.diff
deleted file mode 100644
index 9852fbd..0000000
--- a/debian/patches/101_fix_build_aginst_1.10rc3.diff
+++ /dev/null
@@ -1,32 +0,0 @@
-commit ecfdb209afe2aafc378baab8c511f5df7b000270
-Author: Sedat Dilek <sedat.dilek@googlemail.com>
-Date: Fri Feb 25 21:48:14 2011 +0100
-
- UMS: Fix build against xserver 1.10-rc3
-
- This issue was introduced due to last minute backout of RandR-1.4
- in xserver 1.10-rc3.
-
- Switch to "#ifdef RANDR_14_INTERFACE" as suggested by Keith Packard.
- See also <http://lists.x.org/archives/xorg-devel/2011-February/019643.html>.
-
- Note:
- The ddx needs a rebuild as the X video driver ABI changed to version 10.0.
-
- Reported-by: Alex Deucher <alexdeucher@gmail.com>
- CC: Keith Packard <keithp@keithp.com>
- Signed-off-by: Sedat Dilek <sedat.dilek@gmail.com>
-
-diff --git a/src/radeon_output.c b/src/radeon_output.c
-index 15cef06..ccde346 100644
---- a/src/radeon_output.c
-+++ b/src/radeon_output.c
-@@ -1622,7 +1622,7 @@ radeon_set_mode_for_property(xf86OutputPtr output)
- xf86CrtcPtr crtc = output->crtc;
-
- if (crtc->enabled) {
--#if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,9,99,901,0)
-+#ifdef RANDR_14_INTERFACE
- xf86CrtcSetRec crtc_set_rec;
-
- crtc_set_rec.flags = (XF86CrtcSetMode |
diff --git a/debian/patches/102_disable_pageflipping_for_transformed_displays.patch b/debian/patches/102_disable_pageflipping_for_transformed_displays.patch
deleted file mode 100644
index 6a2cf0b..0000000
--- a/debian/patches/102_disable_pageflipping_for_transformed_displays.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-commit 04293a3a84acd96ccdf8e5e865cf973325ca43a1
-Author: Alex Deucher <alexdeucher@gmail.com>
-Date: Thu Feb 24 02:33:41 2011 -0500
-
- dri2: disable pageflipping for transformed displays
-
- Based on Ben's nouveau patch.
-
- Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
-
-diff --git a/src/radeon_dri2.c b/src/radeon_dri2.c
-index e8e16ff..66df03c 100644
---- a/src/radeon_dri2.c
-+++ b/src/radeon_dri2.c
-@@ -626,12 +626,21 @@ radeon_dri2_schedule_flip(ScrnInfoPtr scrn, ClientPtr client,
- }
-
- static Bool
--can_exchange(DRI2BufferPtr front, DRI2BufferPtr back)
-+can_exchange(ScrnInfoPtr pScrn,
-+ DRI2BufferPtr front, DRI2BufferPtr back)
- {
- struct dri2_buffer_priv *front_priv = front->driverPrivate;
- struct dri2_buffer_priv *back_priv = back->driverPrivate;
- PixmapPtr front_pixmap = front_priv->pixmap;
- PixmapPtr back_pixmap = back_priv->pixmap;
-+ xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
-+ int i;
-+
-+ for (i = 0; i < xf86_config->num_crtc; i++) {
-+ xf86CrtcPtr crtc = xf86_config->crtc[i];
-+ if (crtc->enabled && crtc->rotatedData)
-+ return FALSE;
-+ }
-
- if (front_pixmap->drawable.width != back_pixmap->drawable.width)
- return FALSE;
-@@ -712,7 +721,7 @@ void radeon_dri2_frame_event_handler(unsigned int frame, unsigned int tv_sec,
- case DRI2_FLIP:
- if (info->allowPageFlip &&
- DRI2CanFlip(drawable) &&
-- can_exchange(event->front, event->back) &&
-+ can_exchange(scrn, event->front, event->back) &&
- radeon_dri2_schedule_flip(scrn,
- event->client,
- drawable,
-@@ -727,7 +736,7 @@ void radeon_dri2_frame_event_handler(unsigned int frame, unsigned int tv_sec,
- /* else fall through to exchange/blit */
- case DRI2_SWAP:
- if (DRI2CanExchange(drawable) &&
-- can_exchange(event->front, event->back)) {
-+ can_exchange(scrn, event->front, event->back)) {
- radeon_dri2_exchange_buffers(drawable, event->front, event->back);
- swap_type = DRI2_EXCHANGE_COMPLETE;
- } else {
-@@ -1075,7 +1084,7 @@ static int radeon_dri2_schedule_swap(ClientPtr client, DrawablePtr draw,
- /* Flips need to be submitted one frame before */
- if (info->allowPageFlip &&
- DRI2CanFlip(draw) &&
-- can_exchange(front, back)) {
-+ can_exchange(scrn, front, back)) {
- swap_type = DRI2_FLIP;
- flip = 1;
- }
diff --git a/debian/patches/series b/debian/patches/series
index 24b0a1a..90d1d12 100644
--- a/debian/patches/series
+++ b/debian/patches/series
@@ -1,4 +1,2 @@
# placeholder
100_radeon-6.9.0-bgnr-enable.patch
-101_fix_build_aginst_1.10rc3.diff
-102_disable_pageflipping_for_transformed_displays.patch
diff --git a/debian/rules b/debian/rules
index 4ee42ee..7869be1 100755
--- a/debian/rules
+++ b/debian/rules
@@ -11,12 +11,12 @@ override_dh_install:
find debian/tmp -name '*.la' -delete
dh_install --fail-missing
# Only enable KMS on some Linux architectures:
-ifeq ($(DEB_HOST_ARCH_OS), linux)
-ifneq (, $(filter $(DEB_HOST_ARCH), i386 amd64))
- dh_install -p$(XXV)-radeon debian/radeon-kms.conf \
- etc/modprobe.d
-endif
-endif
+#ifeq ($(DEB_HOST_ARCH_OS), linux)
+#ifneq (, $(filter $(DEB_HOST_ARCH), i386 amd64))
+# dh_install -p$(XXV)-radeon debian/radeon-kms.conf \
+# etc/modprobe.d
+#endif
+#endif
# Debug packages:
override_dh_strip:
diff --git a/debian/xserver-xorg-video-radeon.preinst.in b/debian/xserver-xorg-video-radeon.preinst.in
deleted file mode 100644
index 93bf3cc..0000000
--- a/debian/xserver-xorg-video-radeon.preinst.in
+++ /dev/null
@@ -1,17 +0,0 @@
-#!/bin/sh
-
-set -e
-
-THIS_SCRIPT=preinst
-THIS_PACKAGE=xserver-xorg-video-radeon
-
-#INCLUDE_SHELL_LIB#
-
-# We don't want this config file in Ubuntu
-if dpkg --compare-versions "$2" lt-nl 1:6.13.0-1ubuntu3; then
- remove_conffile_lookup $THIS_PACKAGE /etc/modprobe.d/radeon-kms.conf
-fi
-
-#DEBHELPER#
-
-# vim:set ai et sw=2 ts=2 tw=80:
commit e909120b2b297690321a9afea2448d81164bd16e
Author: Cyril Brulebois <kibi@debian.org>
Date: Thu May 26 11:53:07 2011 +0200
Upload to unstable.
diff --git a/debian/changelog b/debian/changelog
index 3ea5378..6600a16 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,4 +1,4 @@
-xserver-xorg-video-ati (1:6.14.2-1) UNRELEASED; urgency=low
+xserver-xorg-video-ati (1:6.14.2-1) unstable; urgency=low
* New upstream release.
* Mention the need for an explicit configuration if r128, mach64, or
@@ -6,7 +6,7 @@ xserver-xorg-video-ati (1:6.14.2-1) UNRELEASED; urgency=low
meta package, but also a wrapper (Closes: #626500). Thanks, Jonathan
Nieder!
- -- Cyril Brulebois <kibi@debian.org> Thu, 26 May 2011 11:40:34 +0200
+ -- Cyril Brulebois <kibi@debian.org> Thu, 26 May 2011 11:52:58 +0200
xserver-xorg-video-ati (1:6.14.1-1) unstable; urgency=low
commit 70cbde15e2cd2394f5c142e821db8138cd75d44e
Author: Cyril Brulebois <kibi@debian.org>
Date: Thu May 26 11:52:53 2011 +0200
Mention the need for an explicit configuration if wrapper's missing (Closes: #626500).
diff --git a/debian/changelog b/debian/changelog
index 790b36b..3ea5378 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,6 +1,10 @@
xserver-xorg-video-ati (1:6.14.2-1) UNRELEASED; urgency=low
* New upstream release.
+ * Mention the need for an explicit configuration if r128, mach64, or
+ radeon is to be used without the ati package installed, since it's a
+ meta package, but also a wrapper (Closes: #626500). Thanks, Jonathan
+ Nieder!
-- Cyril Brulebois <kibi@debian.org> Thu, 26 May 2011 11:40:34 +0200
diff --git a/debian/control b/debian/control
index ee34eca..957f36f 100644
--- a/debian/control
+++ b/debian/control
@@ -43,6 +43,10 @@ Description: X.Org X server -- AMD/ATI display driver wrapper
sub-drivers depending on the hardware.
These sub-drivers are brought through package dependencies.
.
+ Users of Rage, Mach, or Radeon boards may remove this package only if
+ they use Driver "r128", "mach64", or "radeon" in /etc/X11/xorg.conf
+ instead of relying on autodetection.
+ .
More information about X.Org can be found at:
<URL:http://www.X.org>
.
commit 2fdca146c301884a33eca4d24a0518b52077a2d8
Author: Cyril Brulebois <kibi@debian.org>
Date: Thu May 26 11:41:37 2011 +0200
Bump changelogs.
diff --git a/ChangeLog b/ChangeLog
index cba0e56..a09e872 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,311 @@
+commit 2fca40ea65d9f2a6f8451c324bb4b82786f34f76
+Author: Dave Airlie <airlied@redhat.com>
+Date: Thu May 26 12:52:21 2011 +1000
+
+ radeon: bump version for release of 6.14.2
+
+commit fab868c5f7d8cafdb0176d2751f216819a5ba66a
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Wed May 25 01:09:12 2011 -0400
+
+ EXA: make evergreen_fix_scissor_coordinates static
+
+ Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
+
+commit fe5c42f5155361006b687da824181418f688809f
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Tue May 24 22:32:01 2011 -0400
+
+ cayman: endian fixes for shaders
+
+ Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
+
+commit 470ecd02347c32e79316046d01a7d5dad0e2fe99
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Tue May 24 18:31:47 2011 -0400
+
+ EXA/Xv: add workarounds for eg/cayman scissors bugs
+
+ Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
+
+commit b913e7ba2b60d47a6660699210cc3cf6f5dc52c2
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Tue May 24 18:02:52 2011 -0400
+
+ Revert "cayman: add scissors workaround."
+
+ Needs a proper workaround for a hw bug.
+
+ This reverts commit b77d374b0d11f48c33cfffdb4157c4ec4b05ea15.
+
+commit 82cb33c3f0e1ba802d7a94f3159b3c5c86cd4043
+Author: Dave Airlie <airlied@redhat.com>
+Date: Wed May 18 14:49:17 2011 +1000
+
+ cayman: enable all accel
+
+commit b77d374b0d11f48c33cfffdb4157c4ec4b05ea15
+Author: Dave Airlie <airlied@redhat.com>
+Date: Tue May 24 15:53:58 2011 +1000
+
+ cayman: add scissors workaround.
+
+ wasted a lot of time getting to this.
+
+commit ffeab7a7058298e15294a3b2c740c731e36dda1d
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Mon Apr 18 18:16:51 2011 -0400
+
+ cayman: fix dword counts default state
+
+ Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
+
+commit 3cbfae361bf5e779d3364f0f31cfd25bd0f59e65
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Wed Mar 2 20:48:19 2011 -0500
+
+ cayman: add spi state to default state
+
+ changed in e3145801b80fd4be4cf770128876e86e89bda66f
+
+ Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
+
+commit b8ade97c9d0fa5aacb0e3166868bb72e9bc679a6
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Wed Mar 2 20:44:19 2011 -0500
+
+ cayman: first pass at exa/Xv shaders
+
+ Main differences with evergreen:
+ - 4-way rather than 5-way
+ - END_OF_PROGRAM bit removed from CF istructions, use
+ CF_INST_END instead.
+ - MEGA_FETCH* fields removed from VTX commands
+ - no more VC, all fetches go through the TC
+
+ Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
+
+commit 01b646ed800732985c1638b147716641a99082f9
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Wed Mar 2 20:39:38 2011 -0500
+
+ cayman: add a default state function
+
+ The rest of the state functions can be shared
+ with evergreen. I've noted where there are
+ differences.
+
+ Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
+
+commit 42eecc6f4fb1570769490bdaeac06817c6c36a7e
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Wed Mar 2 20:20:56 2011 -0500
+
+ cayman: add 3D register headers
+
+ Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
+
+commit e1d28e011f4a5139cbc778973c63158ed2746716
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Wed Mar 2 20:13:50 2011 -0500
+
+ kms/cayman: stub out exa support
+
+ Just fallbacks for now.
+
+ Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
+
+commit 21e44a20b8b1b64079ee77f45aaa5010206ed7b6
+Author: Michel Dänzer <daenzer@vmware.com>
+Date: Thu May 12 09:23:38 2011 +0200
+
+ UMS: Fix comparison of unsigned variable against < 0.
+
+ Pointed out by clang:
+
+ ../../src/radeon_crtc.c:242:18: error: comparison of unsigned expression < 0 is always false [-Werror,-Wtautological-compare]
+ error = error < 0 ? 0xffffffff : error;
+ ~~~~~ ^ ~
+
+ If a UMS regression is bisected to this commit, the assignment should probably
+ just be removed, as it's a no-op in the current form.
+
+commit 3b893d81982c9381393c92625e308541e0071b05
+Author: Michel Dänzer <daenzer@vmware.com>
+Date: Fri May 13 09:10:02 2011 +0200
+
+ KMS: Fix output properties logic error.
+
+ Pointed out by clang:
+
+ ../../src/drmmode_display.c:1023:30: error: use of logical && with constant operand; switch to bitwise & or remove constant [-Werror,-Wconstant-logical-operand]
+ if (props && (props->flags && DRM_MODE_PROP_ENUM)) {
+ ^ ~~~~~~~~~~~~~~~~~~
+
+ Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
+
+commit f83d58cf5b33686139067f8f898b8e566ba5c253
+Author: Nicolas Kaiser <nikai@nikai.net>
+Date: Fri May 13 00:56:31 2011 +0200
+
+ man: fix typos
+
+ Signed-off-by: Nicolas Kaiser <nikai@nikai.net>
+
+commit 90abffbd30f44b9cf76a6e28103ddcb5419b4522
+Author: Ilija Hadzic <ihadzic@research.bell-labs.com>
+Date: Fri May 6 09:45:23 2011 -0400
+
+ DRI2: fix high-crtc/vblank oversight/bug
+
+ improvements to high-crtc handling done in
+ f0b7d7b449cc77bb2b281d81108507f8bc2e6018 introduced a bug that caused
+ the populate_vbl_request_type to never use the high-crtc field even
+ when it should. The reason is that the offending patch put the code
+ under #ifdef DRM_VBLANK_HIGH_CRTC_MASK which is not visible outside the
+ enum type, so #else was always taken in compilation type. This patch
+ fixes it by basing #ifdef on (pre-processor visible)
+ DRM_VBLANK_HIGH_CRTC_SHIFT constant
+
+ Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
+
+commit 62a4cd180fe884dca24586d453395472516e6496
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Wed May 4 01:13:55 2011 -0400
+
+ fusion: fix tiling enable logic
+
+ Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
+
+commit 76638ca687b02d3b1494b9868f817fd4fd892c64
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Wed May 4 01:06:22 2011 -0400
+
+ fusion: enable tiling if DFS works
+
+ Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
+
+commit a6d2dba6573a3512d550d7e442bf42ea03012bbc
+Author: Dave Airlie <airlied@redhat.com>
+Date: Wed May 4 10:44:43 2011 +1000
+
+ radeon: add add hw DFS support for fusion
+
+ Fusion had a bug setting up the VM on earlier kernels so we need to work
+ around that and only enable accel on a new enough kernel.
+
+ Signed-off-by: Dave Airlie <airlied@redhat.com>
+
+commit 859e052af49e68a826b77a9135c7f067dc331a06
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Tue May 3 15:15:04 2011 -0400
+
+ radeon: add some new pci ids
+
+ Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
+
+commit 8f8bbf628c6eed037f57bc8c155f0ecdacbebad1
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Sun May 1 13:19:15 2011 -0400
+
+ man: add cayman to man page
+
+ Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
+
+commit 903e90c31cf0319be9297529aa7b8daa1756cf63
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Wed Apr 20 03:10:08 2011 -0400
+
+ EXA/Xv: used cached bo tiling flags for accel setup on 6xx+
+
+ This avoids calling into the kernel for each bo in the accel
+ code. This is a follow on to:
+ cc7d1fa39da40a532fcdbe6c7924ca47a879e66a
+
+ Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
+
+commit 982c22f16c8eeee9be81779fbfe17d8d3f9b6897
+Author: Adam Jackson <ajax@redhat.com>
+Date: Thu Apr 14 16:04:50 2011 -0400
+
+ R520: Fix textures larger than 2k
+
+ Ported from the equivalent fix in Mesa.
+
+commit cc7d1fa39da40a532fcdbe6c7924ca47a879e66a
+Author: Michel Dänzer <daenzer@vmware.com>
+Date: Mon Apr 4 17:37:12 2011 +0200
+
+ EXA: Cache BO tiling flags.
+
+ Calling into the kernel every time is quite expensive, and nobody else should
+ ever change the tiling flags.
+
+ There's still more to do along the same lines for >= R6xx.
+
+commit f0b7d7b449cc77bb2b281d81108507f8bc2e6018
+Author: Michel Dänzer <daenzer@vmware.com>
+Date: Tue Apr 5 13:36:01 2011 +0200
+
+ DRI2: Some cleanups for the scheduling mess.
+
+ * Fix build against libdrm that doesn't define *_VBLANK_HIGH_CRTC*.
+ * If we have more than two CRTCs but can't use DRM_VBLANK_HIGH_CRTC_MASK, don't
+ enable scheduling in the first place rather than relying on
+ DRM_VBLANK_SECONDARY magically doing something sensible for higher CRTCs.
+ * Only set up client state tracking when scheduling is enabled.
+ * Only declare pRADEONEnt when it's needed, and break long lines.
+
+commit 7acf9bc833de539fa2259a051c66a99445a54bc4
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Mon Apr 4 11:08:37 2011 -0400
+
+ radeon: add some additional ontario pci ids
+
+ Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
+
+commit 0af6386f85a0f1ba14864a3334164733a10a6cb8
+Author: Ilija Hadzic <ihadzic@research.bell-labs.com>
+Date: Thu Mar 24 13:33:27 2011 -0400
+
+ xf86-video-ati: (revised #2) add support for vblank on crtc > 1
+
+ Hi Alex,
+
+ Enclosed is a revised version of two patches sent on Mar 18 and Mar 22,
+ respectively. Details summarized in these two threads:
+ http://lists.freedesktop.org/archives/dri-devel/2011-March/009463.html
+ http://lists.freedesktop.org/archives/dri-devel/2011-March/009582.html
+
+ This patch reconciles the DDX with the change in libdrm sent to this list
+ earlier today. Specifically, it refers to a symbol that has been renamed
+ from DRM_CAP_HIGH_CRTC to DRM_CAP_VBLANK_HIGH_CRTC. It *supersedes* the
+ previous patch (i.e. apply it to the master branch as it exists at the
+ time of this writing, not as an incremental patch to the one sent previously).
+
+ Regards,
+
+ Ilija
+
+ Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
+ Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
+
+commit fe2e0ad3ffa58f40311319c950b842e2928a5740
+Author: matthew green <mrg@eterna.com.au>
+Date: Mon Mar 21 12:17:58 2011 -0400
+
+ bug fix for r6xx/r7xx UMS
+
+ Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
+
+commit 83978ad5fe37581e2b2f3fbd9c073d91b2ae1d50
+Author: Alex Deucher <alexdeucher@gmail.com>
+Date: Thu Mar 17 19:07:43 2011 -0400
+
+ bump version post release
+
+ Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
+
commit 38d9368e59b2990bf32a028ece2132451b402350
Author: Alex Deucher <alexdeucher@gmail.com>
Date: Thu Mar 17 18:59:55 2011 -0400
diff --git a/debian/changelog b/debian/changelog
index 166655c..790b36b 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,3 +1,9 @@
+xserver-xorg-video-ati (1:6.14.2-1) UNRELEASED; urgency=low
+
+ * New upstream release.
+
+ -- Cyril Brulebois <kibi@debian.org> Thu, 26 May 2011 11:40:34 +0200
+
xserver-xorg-video-ati (1:6.14.1-1) unstable; urgency=low
* New upstream release.
commit 2fca40ea65d9f2a6f8451c324bb4b82786f34f76
Author: Dave Airlie <airlied@redhat.com>
Date: Thu May 26 12:52:21 2011 +1000
radeon: bump version for release of 6.14.2
diff --git a/configure.ac b/configure.ac
index ec54478..c7f463c 100644
--- a/configure.ac
+++ b/configure.ac
@@ -23,7 +23,7 @@
# Initialize Autoconf
AC_PREREQ([2.60])
AC_INIT([xf86-video-ati],
- [6.14.99],
+ [6.14.2],
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg],
[xf86-video-ati])
commit fab868c5f7d8cafdb0176d2751f216819a5ba66a
Author: Alex Deucher <alexdeucher@gmail.com>
Date: Wed May 25 01:09:12 2011 -0400
EXA: make evergreen_fix_scissor_coordinates static
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
diff --git a/src/evergreen_accel.c b/src/evergreen_accel.c
index 5a0e357..70f3c1f 100644
--- a/src/evergreen_accel.c
+++ b/src/evergreen_accel.c
@@ -706,7 +706,8 @@ evergreen_set_tex_sampler (ScrnInfoPtr pScrn, tex_sampler_t *s)
/* workarounds for hw bugs in eg+ */
/* only affects screen/window/generic/vport. cliprects are not affected */
-void evergreen_fix_scissor_coordinates(ScrnInfoPtr pScrn, int *x1, int *y1, int *x2, int *y2)
+static void
+evergreen_fix_scissor_coordinates(ScrnInfoPtr pScrn, int *x1, int *y1, int *x2, int *y2)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
commit fe5c42f5155361006b687da824181418f688809f
Author: Alex Deucher <alexdeucher@gmail.com>
Date: Tue May 24 22:32:01 2011 -0400
cayman: endian fixes for shaders
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
diff --git a/src/cayman_shader.c b/src/cayman_shader.c
index 2cdcc68..01b612a 100644
--- a/src/cayman_shader.c
+++ b/src/cayman_shader.c
@@ -116,7 +116,11 @@ int cayman_solid_vs(RADEONChipFamily ChipSet, uint32_t* shader)
FORMAT_COMP_ALL(SQ_FORMAT_COMP_SIGNED),
SRF_MODE_ALL(SRF_MODE_ZERO_CLAMP_MINUS_ONE));
shader[i++] = VTX_DWORD2(OFFSET(0),
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+ ENDIAN_SWAP(SQ_ENDIAN_8IN32),
+#else
ENDIAN_SWAP(ENDIAN_NONE),
+#endif
CONST_BUF_NO_STRIDE(0),
ALT_CONST(0),
BUFFER_INDEX_MODE(SQ_CF_INDEX_NONE));
@@ -351,7 +355,11 @@ int cayman_copy_vs(RADEONChipFamily ChipSet, uint32_t* shader)
FORMAT_COMP_ALL(SQ_FORMAT_COMP_SIGNED),
SRF_MODE_ALL(SRF_MODE_ZERO_CLAMP_MINUS_ONE));
shader[i++] = VTX_DWORD2(OFFSET(0),
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+ ENDIAN_SWAP(SQ_ENDIAN_8IN32),
+#else
ENDIAN_SWAP(ENDIAN_NONE),
+#endif
CONST_BUF_NO_STRIDE(0),
ALT_CONST(0),
BUFFER_INDEX_MODE(SQ_CF_INDEX_NONE));
@@ -380,7 +388,11 @@ int cayman_copy_vs(RADEONChipFamily ChipSet, uint32_t* shader)
FORMAT_COMP_ALL(SQ_FORMAT_COMP_SIGNED),
SRF_MODE_ALL(SRF_MODE_ZERO_CLAMP_MINUS_ONE));
shader[i++] = VTX_DWORD2(OFFSET(8),
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+ ENDIAN_SWAP(SQ_ENDIAN_8IN32),
+#else
ENDIAN_SWAP(ENDIAN_NONE),
+#endif
CONST_BUF_NO_STRIDE(0),
ALT_CONST(0),
BUFFER_INDEX_MODE(SQ_CF_INDEX_NONE));
@@ -722,7 +734,11 @@ int cayman_xv_vs(RADEONChipFamily ChipSet, uint32_t* shader)
FORMAT_COMP_ALL(SQ_FORMAT_COMP_SIGNED),
SRF_MODE_ALL(SRF_MODE_ZERO_CLAMP_MINUS_ONE));
shader[i++] = VTX_DWORD2(OFFSET(0),
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+ ENDIAN_SWAP(SQ_ENDIAN_8IN32),
+#else
ENDIAN_SWAP(ENDIAN_NONE),
+#endif
CONST_BUF_NO_STRIDE(0),
ALT_CONST(0),
BUFFER_INDEX_MODE(SQ_CF_INDEX_NONE));
@@ -751,7 +767,11 @@ int cayman_xv_vs(RADEONChipFamily ChipSet, uint32_t* shader)
FORMAT_COMP_ALL(SQ_FORMAT_COMP_SIGNED),
SRF_MODE_ALL(SRF_MODE_ZERO_CLAMP_MINUS_ONE));
shader[i++] = VTX_DWORD2(OFFSET(8),
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+ ENDIAN_SWAP(SQ_ENDIAN_8IN32),
+#else
ENDIAN_SWAP(ENDIAN_NONE),
+#endif
CONST_BUF_NO_STRIDE(0),
ALT_CONST(0),
BUFFER_INDEX_MODE(SQ_CF_INDEX_NONE));
@@ -2355,7 +2375,11 @@ int cayman_comp_vs(RADEONChipFamily ChipSet, uint32_t* shader)
FORMAT_COMP_ALL(SQ_FORMAT_COMP_SIGNED),
SRF_MODE_ALL(SRF_MODE_ZERO_CLAMP_MINUS_ONE));
shader[i++] = VTX_DWORD2(OFFSET(0),
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+ ENDIAN_SWAP(SQ_ENDIAN_8IN32),
+#else
ENDIAN_SWAP(ENDIAN_NONE),
+#endif
CONST_BUF_NO_STRIDE(0),
ALT_CONST(0),
BUFFER_INDEX_MODE(SQ_CF_INDEX_NONE));
@@ -2384,7 +2408,11 @@ int cayman_comp_vs(RADEONChipFamily ChipSet, uint32_t* shader)
FORMAT_COMP_ALL(SQ_FORMAT_COMP_SIGNED),
SRF_MODE_ALL(SRF_MODE_ZERO_CLAMP_MINUS_ONE));
shader[i++] = VTX_DWORD2(OFFSET(8),
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+ ENDIAN_SWAP(SQ_ENDIAN_8IN32),
+#else
ENDIAN_SWAP(ENDIAN_NONE),
+#endif
CONST_BUF_NO_STRIDE(0),
ALT_CONST(0),
BUFFER_INDEX_MODE(SQ_CF_INDEX_NONE));
@@ -2413,7 +2441,11 @@ int cayman_comp_vs(RADEONChipFamily ChipSet, uint32_t* shader)
FORMAT_COMP_ALL(SQ_FORMAT_COMP_SIGNED),
SRF_MODE_ALL(SRF_MODE_ZERO_CLAMP_MINUS_ONE));
shader[i++] = VTX_DWORD2(OFFSET(16),
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+ ENDIAN_SWAP(SQ_ENDIAN_8IN32),
+#else
ENDIAN_SWAP(ENDIAN_NONE),
+#endif
CONST_BUF_NO_STRIDE(0),
ALT_CONST(0),
BUFFER_INDEX_MODE(SQ_CF_INDEX_NONE));
@@ -2443,7 +2475,11 @@ int cayman_comp_vs(RADEONChipFamily ChipSet, uint32_t* shader)
FORMAT_COMP_ALL(SQ_FORMAT_COMP_SIGNED),
SRF_MODE_ALL(SRF_MODE_ZERO_CLAMP_MINUS_ONE));
shader[i++] = VTX_DWORD2(OFFSET(0),
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+ ENDIAN_SWAP(SQ_ENDIAN_8IN32),
+#else
ENDIAN_SWAP(ENDIAN_NONE),
+#endif
CONST_BUF_NO_STRIDE(0),
ALT_CONST(0),
BUFFER_INDEX_MODE(SQ_CF_INDEX_NONE));
@@ -2472,7 +2508,11 @@ int cayman_comp_vs(RADEONChipFamily ChipSet, uint32_t* shader)
FORMAT_COMP_ALL(SQ_FORMAT_COMP_SIGNED),
SRF_MODE_ALL(SRF_MODE_ZERO_CLAMP_MINUS_ONE));
shader[i++] = VTX_DWORD2(OFFSET(8),
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+ ENDIAN_SWAP(SQ_ENDIAN_8IN32),
+#else
ENDIAN_SWAP(ENDIAN_NONE),
+#endif
CONST_BUF_NO_STRIDE(0),
ALT_CONST(0),
BUFFER_INDEX_MODE(SQ_CF_INDEX_NONE));
diff --git a/src/cayman_shader.h b/src/cayman_shader.h
index 76a74d8..c4cdc68 100644
--- a/src/cayman_shader.h
+++ b/src/cayman_shader.h
@@ -102,22 +102,22 @@
#define SRC_SEL_Z(x) (x)
#define SRC_SEL_W(x) (x)
-#define CF_DWORD0(addr, jmptbl) ((addr) | ((jmptbl) << 24))
+#define CF_DWORD0(addr, jmptbl) cpu_to_le32(((addr) | ((jmptbl) << 24)))
#define CF_DWORD1(pc, cf_const, cond, count, vpm, cf_inst, b) \
- (((pc) << 0) | ((cf_const) << 3) | ((cond) << 8) | ((count) << 10) | \
- ((vpm) << 20) | ((cf_inst) << 22) | ((b) << 31))
+ cpu_to_le32((((pc) << 0) | ((cf_const) << 3) | ((cond) << 8) | ((count) << 10) | \
+ ((vpm) << 20) | ((cf_inst) << 22) | ((b) << 31)))
-#define CF_ALU_DWORD0(addr, kb0, kb1, km0) (((addr) << 0) | ((kb0) << 22) | ((kb1) << 26) | ((km0) << 30))
+#define CF_ALU_DWORD0(addr, kb0, kb1, km0) cpu_to_le32((((addr) << 0) | ((kb0) << 22) | ((kb1) << 26) | ((km0) << 30)))
#define CF_ALU_DWORD1(km1, kcache_addr0, kcache_addr1, count, alt_const, cf_inst, wqm, b) \
- (((km1) << 0) | ((kcache_addr0) << 2) | ((kcache_addr1) << 10) | \
- ((count) << 18) | ((alt_const) << 25) | ((cf_inst) << 26) | ((wqm) << 30) | ((b) << 31))
+ cpu_to_le32((((km1) << 0) | ((kcache_addr0) << 2) | ((kcache_addr1) << 10) | \
+ ((count) << 18) | ((alt_const) << 25) | ((cf_inst) << 26) | ((wqm) << 30) | ((b) << 31)))
#define CF_ALLOC_IMP_EXP_DWORD0(array_base, type, rw_gpr, rr, index_gpr, es) \
- (((array_base) << 0) | ((type) << 13) | ((rw_gpr) << 15) | ((rr) << 22) | \
- ((index_gpr) << 23) | ((es) << 30))
+ cpu_to_le32((((array_base) << 0) | ((type) << 13) | ((rw_gpr) << 15) | ((rr) << 22) | \
+ ((index_gpr) << 23) | ((es) << 30)))
#define CF_ALLOC_IMP_EXP_DWORD1_SWIZ(sel_x, sel_y, sel_z, sel_w, bc, vpm, cf_inst, m, b) \
- (((sel_x) << 0) | ((sel_y) << 3) | ((sel_z) << 6) | ((sel_w) << 9) | \
- ((bc) << 16) | ((vpm) << 20) | ((cf_inst) << 22) | ((m) << 30) | ((b) << 31))
+ cpu_to_le32((((sel_x) << 0) | ((sel_y) << 3) | ((sel_z) << 6) | ((sel_w) << 9) | \
+ ((bc) << 16) | ((vpm) << 20) | ((cf_inst) << 22) | ((m) << 30) | ((b) << 31)))
// ALU clause insts
#define SRC0_SEL(x) (x)
@@ -182,19 +182,19 @@
#define CLAMP(x) (x)
#define ALU_DWORD0(src0_sel, s0r, s0e, s0n, src1_sel, s1r, s1e, s1n, im, ps, last) \
- (((src0_sel) << 0) | ((s0r) << 9) | ((s0e) << 10) | ((s0n) << 12) | \
- ((src1_sel) << 13) | ((s1r) << 22) | ((s1e) << 23) | ((s1n) << 25) | \
- ((im) << 26) | ((ps) << 29) | ((last) << 31))
+ cpu_to_le32((((src0_sel) << 0) | ((s0r) << 9) | ((s0e) << 10) | ((s0n) << 12) | \
+ ((src1_sel) << 13) | ((s1r) << 22) | ((s1e) << 23) | ((s1n) << 25) | \
+ ((im) << 26) | ((ps) << 29) | ((last) << 31)))
#define ALU_DWORD1_OP2(s0a, s1a, uem, up, wm, omod, alu_inst, bs, dst_gpr, dr, de, clamp) \
- (((s0a) << 0) | ((s1a) << 1) | ((uem) << 2) | ((up) << 3) | ((wm) << 4) | \
- ((omod) << 5) | ((alu_inst) << 7) | ((bs) << 18) | ((dst_gpr) << 21) | \
- ((dr) << 28) | ((de) << 29) | ((clamp) << 31))
+ cpu_to_le32((((s0a) << 0) | ((s1a) << 1) | ((uem) << 2) | ((up) << 3) | ((wm) << 4) | \
+ ((omod) << 5) | ((alu_inst) << 7) | ((bs) << 18) | ((dst_gpr) << 21) | \
+ ((dr) << 28) | ((de) << 29) | ((clamp) << 31)))
#define ALU_DWORD1_OP3(src2_sel, s2r, s2e, s2n, alu_inst, bs, dst_gpr, dr, de, clamp) \
- (((src2_sel) << 0) | ((s2r) << 9) | ((s2e) << 10) | ((s2n) << 12) | \
- ((alu_inst) << 13) | ((bs) << 18) | ((dst_gpr) << 21) | ((dr) << 28) | \
- ((de) << 29) | ((clamp) << 31))
+ cpu_to_le32((((src2_sel) << 0) | ((s2r) << 9) | ((s2e) << 10) | ((s2n) << 12) | \
+ ((alu_inst) << 13) | ((bs) << 18) | ((dst_gpr) << 21) | ((dr) << 28) | \
+ ((de) << 29) | ((clamp) << 31)))
// VTX clause insts
// vxt insts
@@ -233,15 +233,15 @@
#define BUFFER_INDEX_MODE(x) (x)
#define VTX_DWORD0(vtx_inst, ft, fwq, buffer_id, src_gpr, sr, ssx, ssy, str, ldsr, cr) \
- (((vtx_inst) << 0) | ((ft) << 5) | ((fwq) << 7) | ((buffer_id) << 8) | \
- ((src_gpr) << 16) | ((sr) << 23) | ((ssx) << 24) | ((ssy) << 26) | \
- ((str) << 28) | ((ldsr) << 30) | ((cr) << 31))
+ cpu_to_le32((((vtx_inst) << 0) | ((ft) << 5) | ((fwq) << 7) | ((buffer_id) << 8) | \
+ ((src_gpr) << 16) | ((sr) << 23) | ((ssx) << 24) | ((ssy) << 26) | \
+ ((str) << 28) | ((ldsr) << 30) | ((cr) << 31)))
#define VTX_DWORD1_GPR(dst_gpr, dr, dsx, dsy, dsz, dsw, ucf, data_format, nfa, fca, sma) \
- (((dst_gpr) << 0) | ((dr) << 7) | ((dsx) << 9) | ((dsy) << 12) | ((dsz) << 15) | ((dsw) << 18) | \
- ((ucf) << 21) | ((data_format) << 22) | ((nfa) << 28) | ((fca) << 30) | ((sma) << 31))
+ cpu_to_le32((((dst_gpr) << 0) | ((dr) << 7) | ((dsx) << 9) | ((dsy) << 12) | ((dsz) << 15) | ((dsw) << 18) | \
+ ((ucf) << 21) | ((data_format) << 22) | ((nfa) << 28) | ((fca) << 30) | ((sma) << 31)))
#define VTX_DWORD2(offset, es, cbns, alt_const, bim) \
- (((offset) << 0) | ((es) << 16) | ((cbns) << 18) | ((alt_const) << 20) | ((bim) << 21))
-#define VTX_DWORD_PAD 0x00000000
+ cpu_to_le32((((offset) << 0) | ((es) << 16) | ((cbns) << 18) | ((alt_const) << 20) | ((bim) << 21)))
+#define VTX_DWORD_PAD cpu_to_le32(0x00000000)
// TEX clause insts
// tex insts
@@ -266,14 +266,14 @@
#define SAMPLER_ID(x) (x)
#define TEX_DWORD0(tex_inst, im, fwq, resource_id, src_gpr, sr, ac, rim, sim) \
- (((tex_inst) << 0) | ((im) << 5) | ((fwq) << 7) | ((resource_id) << 8) | \
- ((src_gpr) << 16) | ((sr) << 23) | ((ac) << 24) | ((rim) << 25) | ((sim) << 27))
+ cpu_to_le32((((tex_inst) << 0) | ((im) << 5) | ((fwq) << 7) | ((resource_id) << 8) | \
+ ((src_gpr) << 16) | ((sr) << 23) | ((ac) << 24) | ((rim) << 25) | ((sim) << 27)))
#define TEX_DWORD1(dst_gpr, dr, dsx, dsy, dsz, dsw, lod_bias, ctx, cty, ctz, ctw) \
- (((dst_gpr) << 0) | ((dr) << 7) | ((dsx) << 9) | ((dsy) << 12) | ((dsz) << 15) | ((dsw) << 18) | \
- ((lod_bias) << 21) | ((ctx) << 28) | ((cty) << 29) | ((ctz) << 30) | ((ctw) << 31))
+ cpu_to_le32((((dst_gpr) << 0) | ((dr) << 7) | ((dsx) << 9) | ((dsy) << 12) | ((dsz) << 15) | ((dsw) << 18) | \
+ ((lod_bias) << 21) | ((ctx) << 28) | ((cty) << 29) | ((ctz) << 30) | ((ctw) << 31)))
#define TEX_DWORD2(offset_x, offset_y, offset_z, sampler_id, ssx, ssy, ssz, ssw) \
- (((offset_x) << 0) | ((offset_y) << 5) | ((offset_z) << 10) | ((sampler_id) << 15) | \
- ((ssx) << 20) | ((ssy) << 23) | ((ssz) << 26) | ((ssw) << 29))
-#define TEX_DWORD_PAD 0x00000000
+ cpu_to_le32((((offset_x) << 0) | ((offset_y) << 5) | ((offset_z) << 10) | ((sampler_id) << 15) | \
+ ((ssx) << 20) | ((ssy) << 23) | ((ssz) << 26) | ((ssw) << 29)))
+#define TEX_DWORD_PAD cpu_to_le32(0x00000000)
#endif
commit 470ecd02347c32e79316046d01a7d5dad0e2fe99
Author: Alex Deucher <alexdeucher@gmail.com>
Date: Tue May 24 18:31:47 2011 -0400
EXA/Xv: add workarounds for eg/cayman scissors bugs
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
diff --git a/src/evergreen_accel.c b/src/evergreen_accel.c
index 40aa372..5a0e357 100644
--- a/src/evergreen_accel.c
+++ b/src/evergreen_accel.c
@@ -704,12 +704,36 @@ evergreen_set_tex_sampler (ScrnInfoPtr pScrn, tex_sampler_t *s)
END_BATCH();
}
+/* workarounds for hw bugs in eg+ */
+/* only affects screen/window/generic/vport. cliprects are not affected */
+void evergreen_fix_scissor_coordinates(ScrnInfoPtr pScrn, int *x1, int *y1, int *x2, int *y2)
+{
+ RADEONInfoPtr info = RADEONPTR(pScrn);
+
+ /* all eg+ asics */
+ if (*x2 == 0)
+ *x1 = 1;
+ if (*y2 == 0)
+ *y1 = 1;
+
+ /* cayman only */
+ if (info->ChipFamily == CHIP_FAMILY_CAYMAN) {
+ /* cliprects aren't affected so we can use them to clip if we need
+ * a true 1x1 clip region
+ */
+ if ((*x2 == 1) && (*y2 == 1))
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