[Date Prev][Date Next] [Thread Prev][Thread Next] [Date Index] [Thread Index]

mesa: Changes to 'upstream-unstable'



 docs/news.html                              |    6 -
 docs/relnotes-7.10.3.html                   |    7 +
 src/gallium/drivers/r300/r300_render.c      |   53 +++++-----
 src/glx/applegl_glx.c                       |    3 
 src/glx/glxclient.h                         |    1 
 src/mesa/drivers/dri/radeon/radeon_screen.c |  140 +++++++++++++++++++---------
 6 files changed, 131 insertions(+), 79 deletions(-)

New commits:
commit 1ad06c7a2573d2e3a946c8340ce2530c076c5f0b
Author: Marek Olšák <maraeo@gmail.com>
Date:   Sat Jun 18 22:11:16 2011 +0200

    r300g: fix handling PREP_* options
    
    This should fix rendering >65532 vertices using draw_arrays on r300-r400.
    
    NOTE: This is a candidate for the 7.10 branch.
    (cherry picked from commit 7df7eaf8453bbc7bfd8d23b7808c92d30c62bf55)
    
    Conflicts:
    
    	src/gallium/drivers/r300/r300_render.c

diff --git a/src/gallium/drivers/r300/r300_render.c b/src/gallium/drivers/r300/r300_render.c
index bb06d3d..f5a084c 100644
--- a/src/gallium/drivers/r300/r300_render.c
+++ b/src/gallium/drivers/r300/r300_render.c
@@ -184,23 +184,22 @@ static boolean r300_reserve_cs_dwords(struct r300_context *r300,
                                    unsigned cs_dwords)
 {
     boolean flushed        = FALSE;
-    boolean first_draw     = flags & PREP_FIRST_DRAW;
-    boolean emit_aos       = flags & PREP_EMIT_AOS;
-    boolean emit_aos_swtcl = flags & PREP_EMIT_AOS_SWTCL;
+    boolean emit_states    = flags & PREP_FIRST_DRAW;
+    boolean emit_vertex_arrays       = flags & PREP_EMIT_AOS;
+    boolean emit_vertex_arrays_swtcl = flags & PREP_EMIT_AOS_SWTCL;
 
     /* Add dirty state, index offset, and AOS. */
-    if (first_draw) {
+    if (emit_states)
         cs_dwords += r300_get_num_dirty_dwords(r300);
 
-        if (r300->screen->caps.index_bias_supported)
-            cs_dwords += 2; /* emit_index_offset */
+    if (r300->screen->caps.index_bias_supported)
+        cs_dwords += 2; /* emit_index_offset */
 
-        if (emit_aos)
-            cs_dwords += 55; /* emit_aos */
+    if (emit_vertex_arrays)
+        cs_dwords += 55; /* emit_vertex_arrays */
 
-        if (emit_aos_swtcl)
-            cs_dwords += 7; /* emit_aos_swtcl */
-    }
+    if (emit_vertex_arrays_swtcl)
+        cs_dwords += 7; /* emit_vertex_arrays_swtcl */
 
     cs_dwords += r300_get_num_cs_end_dwords(r300);
 
@@ -228,14 +227,13 @@ static boolean r300_emit_states(struct r300_context *r300,
                                 int aos_offset,
                                 int index_bias)
 {
-    boolean first_draw     = flags & PREP_FIRST_DRAW;
-    boolean emit_aos       = flags & PREP_EMIT_AOS;
-    boolean emit_aos_swtcl = flags & PREP_EMIT_AOS_SWTCL;
+    boolean emit_states    = flags & PREP_FIRST_DRAW;
+    boolean emit_vertex_arrays       = flags & PREP_EMIT_AOS;
+    boolean emit_vertex_arrays_swtcl = flags & PREP_EMIT_AOS_SWTCL;
     boolean indexed        = flags & PREP_INDEXED;
     boolean validate_vbos  = flags & PREP_VALIDATE_VBOS;
 
-    /* Validate buffers and emit dirty state if needed. */
-    if (first_draw) {
+    if (emit_states) {
         /* upload buffers first */
         if (r300->screen->caps.has_tcl && r300->any_user_vbs) {
             r300_upload_user_buffers(r300);
@@ -257,20 +255,21 @@ static boolean r300_emit_states(struct r300_context *r300,
         }
 
         r300_emit_dirty_state(r300);
-        if (r300->screen->caps.index_bias_supported) {
-            if (r300->screen->caps.has_tcl)
-                r500_emit_index_bias(r300, index_bias);
-            else
-                r500_emit_index_bias(r300, 0);
-        }
-
-        if (emit_aos)
-            r300_emit_aos(r300, aos_offset, indexed);
+    }
 
-        if (emit_aos_swtcl)
-            r300_emit_aos_swtcl(r300, indexed);
+    if (r300->screen->caps.index_bias_supported) {
+        if (r300->screen->caps.has_tcl)
+            r500_emit_index_bias(r300, index_bias);
+        else
+            r500_emit_index_bias(r300, 0);
     }
 
+    if (emit_vertex_arrays)
+        r300_emit_aos(r300, aos_offset, indexed);
+
+    if (emit_vertex_arrays_swtcl)
+        r300_emit_aos_swtcl(r300, indexed);
+
     return TRUE;
 }
 

commit bdc518e341ed5342f9a75da5a52033d63fc5e80c
Author: Alex Deucher <alexdeucher@gmail.com>
Date:   Tue Jun 14 18:47:11 2011 -0400

    r600c: add tiling support for evergreen+
    
    Signed-off-by: Alex Deucher <alexdeucher@gmail.com>

diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c
index 6a49b0e..d829cdd 100644
--- a/src/mesa/drivers/dri/radeon/radeon_screen.c
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.c
@@ -1640,52 +1640,102 @@ radeonCreateScreen2(__DRIscreen *sPriv)
 	   screen->group_bytes = 512;
    else
 	   screen->group_bytes = 256;
-   if (IS_R600_CLASS(screen) && (sPriv->drm_version.minor >= 6) &&
-       (screen->chip_family < CHIP_FAMILY_CEDAR)) {
-	   ret = radeonGetParam(sPriv, RADEON_INFO_TILE_CONFIG, &temp);
-	   if (ret)
-		   fprintf(stderr, "failed to get tiling info\n");
-	   else {
-		   screen->tile_config = temp;
-		   screen->r7xx_bank_op = 0;
-		   switch((screen->tile_config & 0xe) >> 1) {
-		   case 0:
-			   screen->num_channels = 1;
-			   break;
-		   case 1:
-			   screen->num_channels = 2;
-			   break;
-		   case 2:
-			   screen->num_channels = 4;
-			   break;
-		   case 3:
-			   screen->num_channels = 8;
-			   break;
-		   default:
-			   fprintf(stderr, "bad channels\n");
-			   break;
+   if (IS_R600_CLASS(screen)) {
+	   if ((sPriv->drm_version.minor >= 6) &&
+	       (screen->chip_family < CHIP_FAMILY_CEDAR)) {
+		   ret = radeonGetParam(sPriv, RADEON_INFO_TILE_CONFIG, &temp);
+		   if (ret)
+			   fprintf(stderr, "failed to get tiling info\n");
+		   else {
+			   screen->tile_config = temp;
+			   screen->r7xx_bank_op = 0;
+			   switch ((screen->tile_config & 0xe) >> 1) {
+			   case 0:
+				   screen->num_channels = 1;
+				   break;
+			   case 1:
+				   screen->num_channels = 2;
+				   break;
+			   case 2:
+				   screen->num_channels = 4;
+				   break;
+			   case 3:
+				   screen->num_channels = 8;
+				   break;
+			   default:
+				   fprintf(stderr, "bad channels\n");
+				   break;
+			   }
+			   switch ((screen->tile_config & 0x30) >> 4) {
+			   case 0:
+				   screen->num_banks = 4;
+				   break;
+			   case 1:
+				   screen->num_banks = 8;
+				   break;
+			   default:
+				   fprintf(stderr, "bad banks\n");
+				   break;
+			   }
+			   switch ((screen->tile_config & 0xc0) >> 6) {
+			   case 0:
+				   screen->group_bytes = 256;
+				   break;
+			   case 1:
+				   screen->group_bytes = 512;
+				   break;
+			   default:
+				   fprintf(stderr, "bad group_bytes\n");
+				   break;
+			   }
 		   }
-		   switch((screen->tile_config & 0x30) >> 4) {
-		   case 0:
-			   screen->num_banks = 4;
-			   break;
-		   case 1:
-			   screen->num_banks = 8;
-			   break;
-		   default:
-			   fprintf(stderr, "bad banks\n");
-			   break;
-		   }
-		   switch((screen->tile_config & 0xc0) >> 6) {
-		   case 0:
-			   screen->group_bytes = 256;
-			   break;
-		   case 1:
-			   screen->group_bytes = 512;
-			   break;
-		   default:
-			   fprintf(stderr, "bad group_bytes\n");
-			   break;
+	   } else if ((sPriv->drm_version.minor >= 7) &&
+		      (screen->chip_family >= CHIP_FAMILY_CEDAR)) {
+		   ret = radeonGetParam(sPriv, RADEON_INFO_TILE_CONFIG, &temp);
+		   if (ret)
+			   fprintf(stderr, "failed to get tiling info\n");
+		   else {
+			   screen->tile_config = temp;
+			   screen->r7xx_bank_op = 0;
+			   switch (screen->tile_config & 0xf) {
+			   case 0:
+				   screen->num_channels = 1;
+				   break;
+			   case 1:
+				   screen->num_channels = 2;
+				   break;
+			   case 2:
+				   screen->num_channels = 4;
+				   break;
+			   case 3:
+				   screen->num_channels = 8;
+				   break;
+			   default:
+				   fprintf(stderr, "bad channels\n");
+				   break;
+			   }
+			   switch ((screen->tile_config & 0xf0) >> 4) {
+			   case 0:
+				   screen->num_banks = 4;
+				   break;
+			   case 1:
+				   screen->num_banks = 8;
+				   break;
+			   default:
+				   fprintf(stderr, "bad banks\n");
+				   break;
+			   }
+			   switch ((screen->tile_config & 0xf00) >> 8) {
+			   case 0:
+				   screen->group_bytes = 256;
+				   break;
+			   case 1:
+				   screen->group_bytes = 512;
+				   break;
+			   default:
+				   fprintf(stderr, "bad group_bytes\n");
+				   break;
+			   }
 		   }
 	   }
    }

commit 338e8e5f146eb0f2497d21222d2ebbaf6a5774a4
Author: Jeremy Huddleston <jeremyhu@apple.com>
Date:   Mon Jun 13 12:10:38 2011 -0700

    apple: Dead code removal
    
    Signed-off-by: Jeremy Huddleston <jeremyhu@apple.com>
    (cherry picked from commit e903cc17bbf7152b3f7d64fe7fbb5ceebcc7452e)
    (cherry picked from commit 5078cb68586a52e2a2a991c6e89ed42e8bac7d96)

diff --git a/src/glx/applegl_glx.c b/src/glx/applegl_glx.c
index e888a0f..92c785f 100644
--- a/src/glx/applegl_glx.c
+++ b/src/glx/applegl_glx.c
@@ -116,7 +116,6 @@ applegl_create_context(struct glx_screen *psc,
 
    gc->vtable = &applegl_context_vtable;
    gc->driContext = NULL;
-   gc->do_destroy = False;
 
    /* TODO: darwin: Integrate with above to do indirect */
    if(apple_glx_create_context(&gc->driContext, dpy, screen, config, 
diff --git a/src/glx/glxclient.h b/src/glx/glxclient.h
index 2152e16..9b795ff 100644
--- a/src/glx/glxclient.h
+++ b/src/glx/glxclient.h
@@ -343,7 +343,6 @@ struct glx_context
 
 #if defined(GLX_DIRECT_RENDERING) && defined(GLX_USE_APPLEGL)
    void *driContext;
-   Bool do_destroy;
 #endif
 
     /**

commit 5255e844afb7b2618cfdbe9a724d95382dc203f8
Author: Jeremy Huddleston <jeremyhu@apple.com>
Date:   Mon Jun 13 12:00:55 2011 -0700

    apple: applegl_destroy_context: Pass along the correct display
    
    Signed-off-by: Jeremy Huddleston <jeremyhu@apple.com>
    (cherry picked from commit c6cf82fb553405bee241170f6e51cafd751d46ea)

diff --git a/src/glx/applegl_glx.c b/src/glx/applegl_glx.c
index 9b8605f..e888a0f 100644
--- a/src/glx/applegl_glx.c
+++ b/src/glx/applegl_glx.c
@@ -43,7 +43,7 @@
 static void
 applegl_destroy_context(struct glx_context *gc)
 {
-   apple_glx_destroy_context(&gc->driContext, gc->currentDpy);
+   apple_glx_destroy_context(&gc->driContext, gc->psc->dpy);
 }
 
 static int

commit 45f369c74d54e2d1155a07284ca090079bb57d7f
Author: Brian Paul <brianp@vmware.com>
Date:   Mon Jun 13 18:29:44 2011 -0600

    docs: fix 'release release' typos

diff --git a/docs/news.html b/docs/news.html
index 9a210ba..a2e0342 100644
--- a/docs/news.html
+++ b/docs/news.html
@@ -15,21 +15,21 @@
 
 <p>
 <a href="relnotes-7.10.3.html">Mesa 7.10.3</a> is released.  This is a bug
-fix release release.
+fix release.
 </p>
 
 <h2>April 6, 2011</h2>
 
 <p>
 <a href="relnotes-7.10.2.html">Mesa 7.10.2</a> is released.  This is a bug
-fix release release.
+fix release.
 </p>
 
 <h2>March 2, 2011</h2>
 
 <p>
 <a href="relnotes-7.10.1.html">Mesa 7.10.1</a> is released.  This is a bug
-fix release release.
+fix release.
 </p>
 
 <p>

commit 39ad7dc7b1a79863fe6aa5c614fa50ba264ffd17
Author: Ian Romanick <ian.d.romanick@intel.com>
Date:   Mon Jun 13 16:53:24 2011 -0700

    docs: Add 7.10.3 md5sums

diff --git a/docs/relnotes-7.10.3.html b/docs/relnotes-7.10.3.html
index 423d89a..9ac5ef2 100644
--- a/docs/relnotes-7.10.3.html
+++ b/docs/relnotes-7.10.3.html
@@ -28,7 +28,12 @@ for DRI hardware acceleration.
 
 <h2>MD5 checksums</h2>
 <pre>
-tbd
+d77b02034c11d6c2a55c07f82367d780  MesaLib-7.10.3.tar.gz
+8c38fe8266be8e1ed1d84076ba5a703b  MesaLib-7.10.3.tar.bz2
+614d063ecd170940d9ae7b355d365d59  MesaLib-7.10.3.zip
+8768fd562ede7ed763d92b2d22232d7a  MesaGLUT-7.10.3.tar.gz
+1496415b89da9549f0f3b34d9622e2e2  MesaGLUT-7.10.3.tar.bz2
+1f29d0e7398fd3bf9f36f5db02941198  MesaGLUT-7.10.3.zip
 </pre>
 
 


Reply to: