xserver-xorg-video-nouveau: Changes to 'upstream-jaunty'
src/drmmode_display.c | 26 +-
src/nouveau_bios.h | 11 -
src/nouveau_xv.c | 16 -
src/nv10_xv_ovl.c | 6
src/nv50_connector.c | 4
src/nv50_randr.c | 12 -
src/nv50_xv.c | 10
src/nv_bios.c | 105 +++++-----
src/nv_crtc.c | 403 +++++++++++++++++++-------------------
src/nv_cursor.c | 8
src/nv_dac.c | 14 -
src/nv_dri.c | 15 -
src/nv_driver.c | 57 +++--
src/nv_hw.c | 94 ++++-----
src/nv_output.c | 91 ++++----
src/nv_proto.h | 1
src/nv_setup.c | 52 ++--
src/nv_type.h | 51 ++--
src/nvreg.h | 521 +++++++++++++++++++++++---------------------------
19 files changed, 756 insertions(+), 741 deletions(-)
New commits:
commit f1907dcef8d06d7ee4ef10ba22bb7decef700110
Author: Ben Skeggs <skeggsb@gmail.com>
Date: Fri Mar 27 15:37:17 2009 +1000
nv50: add default modes to mode pool for LVDS panel
At some point X stopped doing this if the display doesn't support
continuous timing. For a lot of G80 LVDS panels, they only report
their native mode via DDC.
We'll add the default modes ourself, and use the GPU scalers.
diff --git a/src/nv50_randr.c b/src/nv50_randr.c
index aad84f4..6399c98 100644
--- a/src/nv50_randr.c
+++ b/src/nv50_randr.c
@@ -507,6 +507,7 @@ nv50_output_get_modes(xf86OutputPtr output)
xf86OutputSetEDID(output, ddc_mon);
DisplayModePtr ddc_modes = connector->GetDDCModes(connector);
+ DisplayModePtr default_modes = NULL;
xf86DeleteMode(&nv_output->output->native_mode, nv_output->output->native_mode);
nv_output->output->native_mode = NULL;
@@ -567,6 +568,13 @@ nv50_output_get_modes(xf86OutputPtr output)
if (nv_output->output->crtc)
nv_output->output->crtc->native_mode = nv_output->output->native_mode;
+ if (nv_output->output->type == OUTPUT_LVDS &&
+ (!ddc_mon ||!GTF_SUPPORTED(ddc_mon->features.msc))) {
+ default_modes = xf86GetDefaultModes(output->interlaceAllowed,
+ output->doubleScanAllowed);
+ }
+
+ xf86ModesAdd(ddc_modes, default_modes);
return ddc_modes;
}
commit 7da6fdb8b477d2007c83b47e9cbcc2476ae40f22
Author: Ben Skeggs <skeggsb@gmail.com>
Date: Fri Mar 27 14:17:29 2009 +1000
kms: fix bug which prevented getting edid from the kernel
diff --git a/src/drmmode_display.c b/src/drmmode_display.c
index 7341392..8714cad 100644
--- a/src/drmmode_display.c
+++ b/src/drmmode_display.c
@@ -576,8 +576,9 @@ drmmode_output_get_modes(xf86OutputPtr output)
if (!props || !(props->flags & DRM_MODE_PROP_BLOB))
continue;
- if (!strcmp(props->name, "EDID") && drmmode_output->edid_blob) {
- drmModeFreePropertyBlob(drmmode_output->edid_blob);
+ if (!strcmp(props->name, "EDID")) {
+ if (drmmode_output->edid_blob)
+ drmModeFreePropertyBlob(drmmode_output->edid_blob);
drmmode_output->edid_blob =
drmModeGetPropertyBlob(drmmode->fd,
koutput->prop_values[i]);
commit f431e204d3a9be92df5ca606e86ed7c6d82103f0
Author: Ben Skeggs <skeggsb@gmail.com>
Date: Fri Mar 27 11:50:22 2009 +1000
randr: fix crash when rotation requested
diff --git a/src/nv_crtc.c b/src/nv_crtc.c
index 43bc531..c70d4d3 100644
--- a/src/nv_crtc.c
+++ b/src/nv_crtc.c
@@ -1052,7 +1052,7 @@ nv_crtc_shadow_allocate (xf86CrtcPtr crtc, int width, int height)
"Couldn't allocate shadow memory for rotated CRTC.\n");
return NULL;
}
- offset = pNv->FB->map + nv_crtc->shadow->offset;
+ offset = pNv->FBMap + nv_crtc->shadow->offset;
#endif /* NOUVEAU_EXA_PIXMAPS */
return offset;
commit 36dedd04da1b3c89be61a95270414477d284b2ef
Author: Ben Skeggs <skeggsb@gmail.com>
Date: Fri Mar 27 11:26:09 2009 +1000
kms: check for mm_enabled as an additional test for kms presence
diff --git a/src/nv_driver.c b/src/nv_driver.c
index 220a88e..4f07836 100644
--- a/src/nv_driver.c
+++ b/src/nv_driver.c
@@ -962,6 +962,10 @@ NVPreInitDRM(ScrnInfoPtr pScrn)
*/
#ifdef XF86DRM_MODE
pNv->kms_enable = !drmCheckModesettingSupported(bus_id);
+
+ /* Additional sanity check */
+ if (!nouveau_device(pNv->dev)->mm_enabled)
+ pNv->kms_enable = false;
#endif
xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
"[drm] kernel modesetting %s\n", pNv->kms_enable ?
commit a923bc1e4840c0386301f8648add2ccbfbf79a88
Author: Ben Skeggs <skeggsb@gmail.com>
Date: Thu Mar 26 16:24:01 2009 +1000
nv50/xv: correct rendering to partically obscured windows
Won't be exposed by current git, due to lack of accelerated front-buffer
rendering. But should fix rh#492173, rh#492229.
diff --git a/src/nv50_xv.c b/src/nv50_xv.c
index 5741cbd..9601326 100644
--- a/src/nv50_xv.c
+++ b/src/nv50_xv.c
@@ -225,7 +225,7 @@ nv50_xv_image_put(ScrnInfoPtr pScrn,
if (!nv50_xv_check_image_put(ppix))
return BadMatch;
- nv50_xv_state_emit(ppix, id, src, packed_y, uv, src_w, src_h);
+ nv50_xv_state_emit(ppix, id, src, packed_y, uv, width, height);
/* These are fixed point values in the 16.16 format. */
X1 = (float)(x1>>16)+(float)(x1&0xFFFF)/(float)0x10000;
@@ -245,10 +245,10 @@ nv50_xv_image_put(ScrnInfoPtr pScrn,
int sy1=pbox->y1;
int sy2=pbox->y2;
- tx1 = tx1 / src_w;
- tx2 = tx2 / src_w;
- ty1 = ty1 / src_h;
- ty2 = ty2 / src_h;
+ tx1 = tx1 / width;
+ tx2 = tx2 / width;
+ ty1 = ty1 / height;
+ ty2 = ty2 / height;
if (AVAIL_RING(chan) < 64) {
nv50_xv_state_emit(ppix, id, src, packed_y, uv,
commit 01cee2906686897c4b795d308270b3b69a3e286e
Author: Ben Skeggs <skeggsb@gmail.com>
Date: Thu Mar 26 11:43:09 2009 +1000
nv50: call NVSync() in CloseScreen() before restoring video mode
Without this, if accel is still being done to the front buffer (usually at
offset 0), we'll restore the video mode and then the engine will clobber
the text mode fonts right afterwards leaving a messed up console.
diff --git a/src/nv_driver.c b/src/nv_driver.c
index ef1d74f..220a88e 100644
--- a/src/nv_driver.c
+++ b/src/nv_driver.c
@@ -719,12 +719,10 @@ NVLeaveVT(int scrnIndex, int flags)
NVSync(pScrn);
if (!pNv->kms_enable) {
- if (pNv->Architecture == NV_ARCH_50) {
+ if (pNv->Architecture < NV_ARCH_50)
+ NVRestore(pScrn);
+ else
NV50ReleaseDisplay(pScrn);
- return;
- }
-
- NVRestore(pScrn);
}
}
@@ -767,19 +765,8 @@ NVCloseScreen(int scrnIndex, ScreenPtr pScreen)
NVPtr pNv = NVPTR(pScrn);
if (pScrn->vtSema) {
-#ifdef XF86DRM_MODE
- if (pNv->kms_enable) {
- NVSync(pScrn);
- } else
-#endif
- if (pNv->Architecture == NV_ARCH_50) {
- NV50ReleaseDisplay(pScrn);
- } else {
- if (pNv->randr12_enable)
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NVCloseScreen is called.\n");
- NVSync(pScrn);
- NVRestore(pScrn);
- }
+ NVLeaveVT(scrnIndex, 0);
+ pScrn->vtSema = FALSE;
}
NVAccelFree(pScrn);
commit aa7c0375b51d813be54de5e19b96e958ac183f17
Author: Ben Skeggs <skeggsb@gmail.com>
Date: Thu Mar 26 06:36:17 2009 +1000
kms: implement AdjustFrame, should fix crash in fdo#24236
diff --git a/src/drmmode_display.c b/src/drmmode_display.c
index 42c0704..7341392 100644
--- a/src/drmmode_display.c
+++ b/src/drmmode_display.c
@@ -1064,4 +1064,17 @@ Bool drmmode_is_rotate_pixmap(ScrnInfoPtr pScrn, pointer pPixData,
return FALSE;
}
+void
+drmmode_adjust_frame(ScrnInfoPtr scrn, int x, int y, int flags)
+{
+ xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(scrn);
+ xf86OutputPtr output = config->output[config->compat_output];
+ xf86CrtcPtr crtc = output->crtc;
+
+ if (!crtc || !crtc->enabled)
+ return;
+
+ drmmode_set_mode_major(crtc, &crtc->mode, crtc->rotation, x, y);
+}
+
#endif
diff --git a/src/nv_driver.c b/src/nv_driver.c
index 1cd5457..ef1d74f 100644
--- a/src/nv_driver.c
+++ b/src/nv_driver.c
@@ -596,6 +596,9 @@ NVAdjustFrame(int scrnIndex, int x, int y, int flags)
ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
NVPtr pNv = NVPTR(pScrn);
+ if (pNv->kms_enable) {
+ drmmode_adjust_frame(pScrn, x, y, flags);
+ } else
if (pNv->randr12_enable) {
xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(pScrn);
xf86CrtcPtr crtc = config->output[config->compat_output]->crtc;
diff --git a/src/nv_proto.h b/src/nv_proto.h
index af888d0..1d00e1a 100644
--- a/src/nv_proto.h
+++ b/src/nv_proto.h
@@ -7,6 +7,7 @@
Bool drmmode_pre_init(ScrnInfoPtr pScrn, int fd, int cpp);
Bool drmmode_is_rotate_pixmap(ScrnInfoPtr pScrn, pointer pPixData,
struct nouveau_bo **);
+void drmmode_adjust_frame(ScrnInfoPtr pScrn, int x, int y, int flags);
/* in nv_accel_common.c */
Bool NVAccelCommonInit(ScrnInfoPtr pScrn);
commit 61879b8079bee1caeedc0bd9c11061423ff27b4a
Author: Ben Skeggs <skeggsb@gmail.com>
Date: Wed Mar 25 10:09:39 2009 +1000
kms: drm_mode_modeinfo struct changed names at some point
diff --git a/src/drmmode_display.c b/src/drmmode_display.c
index 850c9be..42c0704 100644
--- a/src/drmmode_display.c
+++ b/src/drmmode_display.c
@@ -67,8 +67,7 @@ typedef struct {
static void drmmode_output_dpms(xf86OutputPtr output, int mode);
static void
-drmmode_ConvertFromKMode(ScrnInfoPtr scrn,
- struct drm_mode_modeinfo *kmode,
+drmmode_ConvertFromKMode(ScrnInfoPtr scrn, drmModeModeInfo *kmode,
DisplayModePtr mode)
{
memset(mode, 0, sizeof(DisplayModeRec));
@@ -99,8 +98,7 @@ drmmode_ConvertFromKMode(ScrnInfoPtr scrn,
}
static void
-drmmode_ConvertToKMode(ScrnInfoPtr scrn,
- struct drm_mode_modeinfo *kmode,
+drmmode_ConvertToKMode(ScrnInfoPtr scrn, drmModeModeInfo *kmode,
DisplayModePtr mode)
{
memset(kmode, 0, sizeof(*kmode));
@@ -232,7 +230,7 @@ drmmode_set_mode_major(xf86CrtcPtr crtc, DisplayModePtr mode,
int ret = TRUE;
int i;
int fb_id;
- struct drm_mode_modeinfo kmode;
+ drmModeModeInfo kmode;
if (drmmode->fb_id == 0) {
unsigned int pitch =
commit 79306fc29f6b27fd61fe51855bad5489fc4fd986
Author: Ben Skeggs <skeggsb@gmail.com>
Date: Wed Mar 25 08:15:41 2009 +1000
dri: fail harder
diff --git a/src/nv_dri.c b/src/nv_dri.c
index 664feb3..bd3e5a9 100644
--- a/src/nv_dri.c
+++ b/src/nv_dri.c
@@ -289,6 +289,8 @@ Bool NVDRIScreenInit(ScrnInfoPtr pScrn)
pDRIInfo->createDummyCtx = FALSE;
pDRIInfo->createDummyCtxPriv = FALSE;
+ pDRIInfo->keepFDOpen = TRUE;
+
if (!DRIScreenInit(pScreen, pDRIInfo, &nouveau_device(pNv->dev)->fd)) {
xf86DrvMsg(pScreen->myNum, X_ERROR,
"[dri] DRIScreenInit failed. Disabling DRI.\n");
@@ -320,7 +322,10 @@ Bool NVDRIFinishScreenInit(ScrnInfoPtr pScrn)
NOUVEAUDRIPtr pNOUVEAUDRI;
int ret;
- if (!pNv->pDRIInfo || !DRIFinishScreenInit(pScreen))
+ if (!pNv->pDRIInfo)
+ return TRUE;
+
+ if (!DRIFinishScreenInit(pScreen))
return FALSE;
pNOUVEAUDRI = (NOUVEAUDRIPtr)pNv->pDRIInfo->devPrivate;
diff --git a/src/nv_driver.c b/src/nv_driver.c
index bd0eb01..1cd5457 100644
--- a/src/nv_driver.c
+++ b/src/nv_driver.c
@@ -959,7 +959,7 @@ NVPreInitDRM(ScrnInfoPtr pScrn)
}
/* Initialise libdrm_nouveau */
- ret = nouveau_device_open_existing(&pNv->dev, 0, DRIMasterFD(pScrn), 0);
+ ret = nouveau_device_open_existing(&pNv->dev, 1, DRIMasterFD(pScrn), 0);
if (ret) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"[drm] error creating device, setting NoAccel\n");
@@ -2182,7 +2182,11 @@ NVScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
xf86SetSilkenMouse(pScreen);
/* Finish DRI init */
- NVDRIFinishScreenInit(pScrn);
+ if (!NVDRIFinishScreenInit(pScrn)) {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+ "[dri] NVDRIFinishScreenInit failed, disbling DRI\n");
+ NVDRICloseScreen(pScrn);
+ }
/*
* Initialize software cursor.
commit da1ba93f1dc2b02615e4f0366450872659176799
Author: Ben Skeggs <skeggsb@gmail.com>
Date: Wed Mar 25 08:12:26 2009 +1000
device close doesn't belong in DRI close, can have DRM without DRI
diff --git a/src/nv_dri.c b/src/nv_dri.c
index 37538f0..664feb3 100644
--- a/src/nv_dri.c
+++ b/src/nv_dri.c
@@ -359,16 +359,8 @@ void NVDRICloseScreen(ScrnInfoPtr pScrn)
if (pNv->NoAccel)
return;
- nouveau_device_close(&pNv->dev);
-
DRICloseScreen(pScreen);
- /* The channel should have been removed from the drm side, that still leaves a memory leak though. */
- if (pNv->chan) {
- free(pNv->chan);
- pNv->chan = NULL;
- }
-
if (pNv->pDRIInfo) {
if (pNv->pDRIInfo->devPrivate) {
xfree(pNv->pDRIInfo->devPrivate);
diff --git a/src/nv_driver.c b/src/nv_driver.c
index ec4577f..bd0eb01 100644
--- a/src/nv_driver.c
+++ b/src/nv_driver.c
@@ -44,6 +44,7 @@ static Bool NVEnterVT(int scrnIndex, int flags);
static void NVLeaveVT(int scrnIndex, int flags);
static Bool NVCloseScreen(int scrnIndex, ScreenPtr pScreen);
static Bool NVSaveScreen(ScreenPtr pScreen, int mode);
+static void NVCloseDRM(ScrnInfoPtr);
/* Optional functions */
static Bool NVSwitchMode(int scrnIndex, DisplayModePtr mode, int flags);
@@ -792,6 +793,8 @@ NVCloseScreen(int scrnIndex, ScreenPtr pScreen)
nouveau_dri2_fini(pScreen);
#endif
+ NVCloseDRM(pScrn);
+
if (pNv->randr12_enable)
xf86_cursors_fini(pScreen);
if (pNv->ShadowPtr) {
@@ -908,6 +911,14 @@ static const xf86CrtcConfigFuncsRec nv_xf86crtc_config_funcs = {
return FALSE; \
} while(0)
+static void
+NVCloseDRM(ScrnInfoPtr pScrn)
+{
+ NVPtr pNv = NVPTR(pScrn);
+
+ nouveau_device_close(&pNv->dev);
+}
+
static Bool
NVPreInitDRM(ScrnInfoPtr pScrn)
{
commit 56b11c773ac9392069c6a589f4f87c5cc79e020e
Author: Younes Manton <younes.m@gmail.com>
Date: Tue Mar 24 14:27:40 2009 -0400
Fix mouse cursor disappearing when near top/left edge of screen.
diff --git a/src/nvreg.h b/src/nvreg.h
index 9544c18..6f142b3 100644
--- a/src/nvreg.h
+++ b/src/nvreg.h
@@ -304,8 +304,8 @@
#define NV_PRMCIO_INP0__COLOR 0x006013da
#define NV_PRAMDAC_CU_START_POS 0x00680300
-# define NV_PRAMDAC_CU_START_POS_X 11:0
-# define NV_PRAMDAC_CU_START_POS_Y 27:16
+# define NV_PRAMDAC_CU_START_POS_X 15:0
+# define NV_PRAMDAC_CU_START_POS_Y 31:16
#define NV_RAMDAC_NV10_CURSYNC 0x00680404
#define NV_PRAMDAC_NVPLL_COEFF 0x00680500
commit 4067ab466fe3aa817e0323959f70c7dd3494de0a
Author: Ben Skeggs <skeggsb@gmail.com>
Date: Mon Mar 23 14:43:22 2009 +1000
another ppc fix
diff --git a/src/nv_crtc.c b/src/nv_crtc.c
index d9c1a32..43bc531 100644
--- a/src/nv_crtc.c
+++ b/src/nv_crtc.c
@@ -854,7 +854,7 @@ nv_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
/* turn on LFB swapping */
{
uint8_t tmp = NVReadVgaCrtc(pNv, nv_crtc->head, NV_CIO_CRE_RCR);
- tmp |= NV_CIO_CRE_RCR_ENDIAN_BIG;
+ tmp |= MASK(NV_CIO_CRE_RCR_ENDIAN_BIG);
NVWriteVgaCrtc(pNv, nv_crtc->head, NV_CIO_CRE_RCR, tmp);
}
#endif
commit 862dba8b6ca6354d915f2430826a5581f41d1002
Author: Ben Skeggs <skeggsb@gmail.com>
Date: Mon Mar 23 14:22:15 2009 +1000
more ppc..
diff --git a/src/nv_driver.c b/src/nv_driver.c
index 0776083..ec4577f 100644
--- a/src/nv_driver.c
+++ b/src/nv_driver.c
@@ -1936,13 +1936,13 @@ static void NVBacklightEnable(NVPtr pNv, Bool on)
/* NV17,18,34 Apple iMac, iBook, PowerBook */
CARD32 tmp_pmc, tmp_pcrt;
tmp_pmc = nvReadMC(pNv, NV_PBUS_DEBUG_DUALHEAD_CTL) & 0x7FFFFFFF;
- tmp_pcrt = NVReadCRTC(pNv, 0, NV_CRTC_GPIO_EXT) & 0xFFFFFFFC;
+ tmp_pcrt = NVReadCRTC(pNv, 0, NV_PCRTC_GPIO_EXT) & 0xFFFFFFFC;
if(on) {
tmp_pmc |= (1 << 31);
tmp_pcrt |= 0x1;
}
nvWriteMC(pNv, NV_PBUS_DEBUG_DUALHEAD_CTL, tmp_pmc);
- NVWriteCRTC(pNv, 0, NV_CRTC_GPIO_EXT, tmp_pcrt);
+ NVWriteCRTC(pNv, 0, NV_PCRTC_GPIO_EXT, tmp_pcrt);
}
#endif
commit 30634865617737171835f6ac9437df597e5a8951
Author: Ben Skeggs <skeggsb@gmail.com>
Date: Mon Mar 23 13:57:52 2009 +1000
fix ppc build
diff --git a/src/nv_bios.c b/src/nv_bios.c
index 6934cf1..2aded0c 100644
--- a/src/nv_bios.c
+++ b/src/nv_bios.c
@@ -3021,11 +3021,11 @@ static int call_lvds_manufacturer_script(ScrnInfoPtr pScrn, struct dcb_entry *dc
if ((pNv->Chipset & 0xffff) == 0x0179 || (pNv->Chipset & 0xffff) == 0x0189 || (pNv->Chipset & 0xffff) == 0x0329) {
if (script == LVDS_PANEL_ON) {
bios_wr32(pScrn, NV_PBUS_DEBUG_DUALHEAD_CTL, bios_rd32(pScrn, NV_PBUS_DEBUG_DUALHEAD_CTL) | (1 << 31));
- bios_wr32(pScrn, NV_CRTC_GPIO_EXT, bios_rd32(pScrn, NV_CRTC_GPIO_EXT) | 1);
+ bios_wr32(pScrn, NV_PCRTC_GPIO_EXT, bios_rd32(pScrn, NV_PCRTC_GPIO_EXT) | 1);
}
if (script == LVDS_PANEL_OFF) {
bios_wr32(pScrn, NV_PBUS_DEBUG_DUALHEAD_CTL, bios_rd32(pScrn, NV_PBUS_DEBUG_DUALHEAD_CTL) & ~(1 << 31));
- bios_wr32(pScrn, NV_CRTC_GPIO_EXT, bios_rd32(pScrn, NV_CRTC_GPIO_EXT) & ~3);
+ bios_wr32(pScrn, NV_PCRTC_GPIO_EXT, bios_rd32(pScrn, NV_PCRTC_GPIO_EXT) & ~3);
}
}
#endif
commit d80fe7878379aefd3345746a149f2b46d3a84805
Author: Francisco Jerez <currojerez@riseup.net>
Date: Mon Mar 23 03:27:16 2009 +0100
Fix nouveau_hw_decode_pll on NV30/35.
diff --git a/src/nv_hw.c b/src/nv_hw.c
index 0804f86..e49e084 100644
--- a/src/nv_hw.c
+++ b/src/nv_hw.c
@@ -375,8 +375,8 @@ static void nouveau_hw_decode_pll(NVPtr pNv, uint32_t reg1,
pllvals->M1 &= 0xf; /* only 4 bits */
if (pll1 & NV30_RAMDAC_ENABLE_VCO2) {
pllvals->M2 = (pll1 >> 4) & 0x7;
- pllvals->N2 = ((pll2 >> 21) & 0x18) |
- ((pll2 >> 19) & 0x7);
+ pllvals->N2 = ((pll1 >> 21) & 0x18) |
+ ((pll1 >> 19) & 0x7);
}
}
}
commit 62aa81deca5c63d30407872c0e2b784f5084acb3
Author: Stuart Bennett <stuart@freedesktop.org>
Date: Sat Mar 21 01:43:14 2009 +0000
Some laptop mode finding fixes resulting from rh#487456
On closer inspection, it seems BMP laptops only depend on
use_straps_for_mode to ban DDC. Therefore use pxclk alone to determine
EDID case in parse_lvds_table, and invert sense of fp ddc flag to get a
default of "false"
diff --git a/src/nouveau_bios.h b/src/nouveau_bios.h
index 1fba4a3..4e3db73 100644
--- a/src/nouveau_bios.h
+++ b/src/nouveau_bios.h
@@ -133,7 +133,7 @@ struct nouveau_bios_info {
uint32_t dactestval;
uint8_t digital_min_front_porch;
- bool fp_ddc_permitted;
+ bool fp_no_ddc;
};
struct nvbios {
diff --git a/src/nv_bios.c b/src/nv_bios.c
index c25a801..6934cf1 100644
--- a/src/nv_bios.c
+++ b/src/nv_bios.c
@@ -3231,18 +3231,13 @@ static int parse_fp_mode_table(ScrnInfoPtr pScrn, struct nvbios *bios)
struct lvdstableheader lth;
if (bios->fp.fptablepointer == 0x0) {
-#ifdef __powerpc__
/* Apple cards don't have the fp table; the laptops use DDC */
- bios->pub.fp_ddc_permitted = true;
- goto missingok;
-#else
+#ifndef __powerpc__
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Pointer to flat panel table invalid\n");
- if (bios->chip_version == 0x67) /* sigh, IGPs */
- goto missingok;
- return -EINVAL;
+ if (bios->chip_version != 0x67) /* sigh, IGPs */
+ return -EINVAL;
#endif
-missingok:
bios->pub.digital_min_front_porch = 0x4b;
return 0;
}
@@ -3335,12 +3330,9 @@ missingok:
return -ENOENT;
}
- /* a strap value of 0xf is sufficient to indicate DDC use on BMP era
- * cards; nv4x cards need an fpindex of 0xf too
- */
- if (fpstrapping == 0xf &&
- (lth.lvds_ver == 0x0a || fpindex == 0xf))
- bios->pub.fp_ddc_permitted = true;
+ /* nv4x cards need both a strap value and fpindex of 0xf to use DDC */
+ if (lth.lvds_ver > 0x10)
+ bios->pub.fp_no_ddc = fpstrapping != 0xf || fpindex != 0xf;
/* if either the strap or xlated fpindex value are 0xf there is no
* panel using a strap-derived bios mode present. this condition
@@ -3436,7 +3428,7 @@ int nouveau_bios_parse_lvds_table(ScrnInfoPtr pScrn, int pxclk, bool *dl, bool *
lvdsmanufacturerindex = bios->data[bios->fp.fpxlatemanufacturertableptr + fpstrapping];
/* we're done if this isn't the EDID panel case */
- if (!bios->pub.fp_ddc_permitted)
+ if (!pxclk)
break;
/* change in behaviour guessed at nv30; see datapoints below */
@@ -3506,7 +3498,7 @@ int nouveau_bios_parse_lvds_table(ScrnInfoPtr pScrn, int pxclk, bool *dl, bool *
}
/* set dual_link flag for EDID case */
- if (bios->pub.fp_ddc_permitted)
+ if (pxclk)
bios->fp.dual_link = (pxclk >= bios->fp.duallink_transition_clk);
*dl = bios->fp.dual_link;
diff --git a/src/nv_output.c b/src/nv_output.c
index 1172f4a..42ef7d1 100644
--- a/src/nv_output.c
+++ b/src/nv_output.c
@@ -210,7 +210,7 @@ nv_output_detect(xf86OutputPtr output)
if (det_encoder->dcb->lvdsconf.use_straps_for_mode) {
if (nouveau_bios_fp_mode(pScrn, NULL))
ret = XF86OutputStatusConnected;
- } else if (pNv->vbios->fp_ddc_permitted &&
+ } else if (!pNv->vbios->fp_no_ddc &&
nouveau_bios_embedded_edid(pScrn)) {
nv_connector->edid = xf86InterpretEDID(pScrn->scrnIndex,
nouveau_bios_embedded_edid(pScrn));
@@ -312,6 +312,7 @@ nv_lvds_output_get_modes(xf86OutputPtr output)
struct nouveau_encoder *nv_encoder = nv_connector->detected_encoder;
ScrnInfoPtr pScrn = output->scrn;
DisplayModeRec mode, *ret_mode = NULL;
+ int clock = 0; /* needs to be zero for straps case */
bool dl, if_is_24bit = false;
/* panels only have one mode, and it doesn't change */
@@ -328,11 +329,12 @@ nv_lvds_output_get_modes(xf86OutputPtr output)
nv_encoder->native_mode = xf86DuplicateMode(&mode);
ret_mode = xf86DuplicateMode(&mode);
- } else
+ } else {
ret_mode = nv_output_get_edid_modes(output);
+ clock = nv_encoder->native_mode->Clock;
+ }
- if (nouveau_bios_parse_lvds_table(pScrn, nv_encoder->native_mode->Clock,
- &dl, &if_is_24bit))
+ if (nouveau_bios_parse_lvds_table(pScrn, clock, &dl, &if_is_24bit))
return NULL;
/* because of the pre-existing native mode exit above, this will only
@@ -1022,7 +1024,7 @@ void NvSetupOutputs(ScrnInfoPtr pScrn)
funcs = &nv_lvds_output_funcs;
/* don't create i2c adapter when lvds ddc not allowed */
if (dcbent->lvdsconf.use_straps_for_mode ||
- !pNv->vbios->fp_ddc_permitted)
+ pNv->vbios->fp_no_ddc)
i2c_index = 0xf;
break;
default:
commit aa6edfaf1c32432b07c298c42b68f2d93f3b337c
Author: Stuart Bennett <stuart@freedesktop.org>
Date: Sun Mar 15 15:18:16 2009 +0000
randr12: name VGA CRTC fields
Now with added consistent indentation
Use fields in a couple of other cases while we're about it
diff --git a/src/nv_crtc.c b/src/nv_crtc.c
index 57c6320..d9c1a32 100644
--- a/src/nv_crtc.c
+++ b/src/nv_crtc.c
@@ -132,11 +132,13 @@ static void nv_crtc_cursor_set(xf86CrtcPtr crtc)
uint32_t cursor_start = head ? pNv->Cursor2->offset :
pNv->Cursor->offset;
- regp->CRTC[NV_CIO_CRE_HCUR_ADDR0_INDEX] = NV_CIO_CRE_HCUR_ASI |
- (cursor_start >> 17);
- regp->CRTC[NV_CIO_CRE_HCUR_ADDR1_INDEX] = (cursor_start >> 11) << 2;
+ regp->CRTC[NV_CIO_CRE_HCUR_ADDR0_INDEX] = MASK(NV_CIO_CRE_HCUR_ASI) |
+ XLATE(cursor_start, 17,
+ NV_CIO_CRE_HCUR_ADDR0_ADR);
+ regp->CRTC[NV_CIO_CRE_HCUR_ADDR1_INDEX] = XLATE(cursor_start, 11,
+ NV_CIO_CRE_HCUR_ADDR1_ADR);
if (crtc->mode.Flags & V_DBLSCAN)
- regp->CRTC[NV_CIO_CRE_HCUR_ADDR1_INDEX] |= NV_CIO_CRE_HCUR_ADDR1_CUR_DBL;
+ regp->CRTC[NV_CIO_CRE_HCUR_ADDR1_INDEX] |= MASK(NV_CIO_CRE_HCUR_ADDR1_CUR_DBL);
regp->CRTC[NV_CIO_CRE_HCUR_ADDR2_INDEX] = cursor_start >> 24;
crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_HCUR_ADDR0_INDEX);
@@ -375,8 +377,8 @@ nv_crtc_mode_set_vga(xf86CrtcPtr crtc, DisplayModePtr mode, DisplayModePtr adjus
regp->MiscOutReg |= (mode->ClockIndex & 0x03) << 2;
/*
- * Time Sequencer
- */
+ * Time Sequencer
+ */
regp->Sequencer[NV_VIO_SR_RESET_INDEX] = 0x00;
/* 0x20 disables the sequencer */
if (mode->Flags & V_CLKDIV2)
@@ -388,44 +390,43 @@ nv_crtc_mode_set_vga(xf86CrtcPtr crtc, DisplayModePtr mode, DisplayModePtr adjus
regp->Sequencer[NV_VIO_SR_MEM_MODE_INDEX] = 0x0E;
/*
- * CRTC Controller
- */
- regp->CRTC[NV_CIO_CR_HDT_INDEX] = Set8Bits(horizTotal);
- regp->CRTC[NV_CIO_CR_HDE_INDEX] = Set8Bits(horizDisplay);
- regp->CRTC[NV_CIO_CR_HBS_INDEX] = Set8Bits(horizBlankStart);
- regp->CRTC[NV_CIO_CR_HBE_INDEX] = SetBitField(horizBlankEnd,4:0,4:0)
- | SetBit(7);
- regp->CRTC[NV_CIO_CR_HRS_INDEX] = Set8Bits(horizStart);
- regp->CRTC[NV_CIO_CR_HRE_INDEX] = SetBitField(horizBlankEnd,5:5,7:7)
- | SetBitField(horizEnd,4:0,4:0);
- regp->CRTC[NV_CIO_CR_VDT_INDEX] = SetBitField(vertTotal,7:0,7:0);
- regp->CRTC[NV_CIO_CR_OVL_INDEX] = SetBitField(vertTotal,8:8,0:0)
- | SetBitField(vertDisplay,8:8,1:1)
- | SetBitField(vertStart,8:8,2:2)
- | SetBitField(vertBlankStart,8:8,3:3)
- | SetBit(4)
- | SetBitField(vertTotal,9:9,5:5)
- | SetBitField(vertDisplay,9:9,6:6)
- | SetBitField(vertStart,9:9,7:7);
- regp->CRTC[NV_CIO_CR_RSAL_INDEX] = 0x00;
- regp->CRTC[NV_CIO_CR_CELL_HT_INDEX] = SetBitField(vertBlankStart,9:9,5:5)
- | SetBit(6)
- | ((mode->Flags & V_DBLSCAN) ? NV_CIO_CR_CELL_HT_SCANDBL : 0);
+ * CRTC
+ */
+ regp->CRTC[NV_CIO_CR_HDT_INDEX] = horizTotal;
+ regp->CRTC[NV_CIO_CR_HDE_INDEX] = horizDisplay;
+ regp->CRTC[NV_CIO_CR_HBS_INDEX] = horizBlankStart;
+ regp->CRTC[NV_CIO_CR_HBE_INDEX] = (1 << 7) |
+ XLATE(horizBlankEnd, 0, NV_CIO_CR_HBE_4_0);
+ regp->CRTC[NV_CIO_CR_HRS_INDEX] = horizStart;
+ regp->CRTC[NV_CIO_CR_HRE_INDEX] = XLATE(horizBlankEnd, 5, NV_CIO_CR_HRE_HBE_5) |
+ XLATE(horizEnd, 0, NV_CIO_CR_HRE_4_0);
+ regp->CRTC[NV_CIO_CR_VDT_INDEX] = vertTotal;
+ regp->CRTC[NV_CIO_CR_OVL_INDEX] = XLATE(vertStart, 9, NV_CIO_CR_OVL_VRS_9) |
+ XLATE(vertDisplay, 9, NV_CIO_CR_OVL_VDE_9) |
+ XLATE(vertTotal, 9, NV_CIO_CR_OVL_VDT_9) |
+ (1 << 4) |
+ XLATE(vertBlankStart, 8, NV_CIO_CR_OVL_VBS_8) |
+ XLATE(vertStart, 8, NV_CIO_CR_OVL_VRS_8) |
+ XLATE(vertDisplay, 8, NV_CIO_CR_OVL_VDE_8) |
+ XLATE(vertTotal, 8, NV_CIO_CR_OVL_VDT_8);
+ regp->CRTC[NV_CIO_CR_RSAL_INDEX] = 0x00;
+ regp->CRTC[NV_CIO_CR_CELL_HT_INDEX] = ((mode->Flags & V_DBLSCAN) ? MASK(NV_CIO_CR_CELL_HT_SCANDBL) : 0) |
+ 1 << 6 |
+ XLATE(vertBlankStart, 9, NV_CIO_CR_CELL_HT_VBS_9);
regp->CRTC[NV_CIO_CR_CURS_ST_INDEX] = 0x00;
regp->CRTC[NV_CIO_CR_CURS_END_INDEX] = 0x00;
regp->CRTC[NV_CIO_CR_SA_HI_INDEX] = 0x00;
regp->CRTC[NV_CIO_CR_SA_LO_INDEX] = 0x00;
regp->CRTC[NV_CIO_CR_TCOFF_HI_INDEX] = 0x00;
regp->CRTC[NV_CIO_CR_TCOFF_LO_INDEX] = 0x00;
- regp->CRTC[NV_CIO_CR_VRS_INDEX] = Set8Bits(vertStart);
- /* What is the meaning of bit5, it is empty in the vga spec. */
- regp->CRTC[NV_CIO_CR_VRE_INDEX] = SetBitField(vertEnd,3:0,3:0) | SetBit(5);
- regp->CRTC[NV_CIO_CR_VDE_INDEX] = Set8Bits(vertDisplay);
+ regp->CRTC[NV_CIO_CR_VRS_INDEX] = vertStart;
+ regp->CRTC[NV_CIO_CR_VRE_INDEX] = 1 << 5 | XLATE(vertEnd, 0, NV_CIO_CR_VRE_3_0);
+ regp->CRTC[NV_CIO_CR_VDE_INDEX] = vertDisplay;
/* framebuffer can be larger than crtc scanout area. */
regp->CRTC[NV_CIO_CR_OFFSET_INDEX] = pScrn->displayWidth / 8 * pScrn->bitsPerPixel / 8;
regp->CRTC[NV_CIO_CR_ULINE_INDEX] = 0x00;
- regp->CRTC[NV_CIO_CR_VBS_INDEX] = Set8Bits(vertBlankStart);
- regp->CRTC[NV_CIO_CR_VBE_INDEX] = Set8Bits(vertBlankEnd);
+ regp->CRTC[NV_CIO_CR_VBS_INDEX] = vertBlankStart;
+ regp->CRTC[NV_CIO_CR_VBE_INDEX] = vertBlankEnd;
regp->CRTC[NV_CIO_CR_MODE_INDEX] = 0x43;
regp->CRTC[NV_CIO_CR_LCOMP_INDEX] = 0xff;
@@ -434,29 +435,27 @@ nv_crtc_mode_set_vga(xf86CrtcPtr crtc, DisplayModePtr mode, DisplayModePtr adjus
*/
/* framebuffer can be larger than crtc scanout area. */
- regp->CRTC[NV_CIO_CRE_RPC0_INDEX] = ((pScrn->displayWidth / 8 * pScrn->bitsPerPixel / 8) & 0x700) >> 3;
+ regp->CRTC[NV_CIO_CRE_RPC0_INDEX] = XLATE(pScrn->displayWidth / 8 * pScrn->bitsPerPixel / 8, 8, NV_CIO_CRE_RPC0_OFFSET_10_8);
regp->CRTC[NV_CIO_CRE_RPC1_INDEX] = mode->CrtcHDisplay < 1280 ?
- NV_CIO_CRE_RPC1_LARGE : 0x00;
- regp->CRTC[NV_CIO_CRE_LSR_INDEX] = SetBitField(horizBlankEnd,6:6,4:4)
- | SetBitField(vertBlankStart,10:10,3:3)
- | SetBitField(vertStart,10:10,2:2)
- | SetBitField(vertDisplay,10:10,1:1)
- | SetBitField(vertTotal,10:10,0:0);
-
- regp->CRTC[NV_CIO_CRE_HEB__INDEX] = SetBitField(horizTotal,8:8,0:0)
- | SetBitField(horizDisplay,8:8,1:1)
- | SetBitField(horizBlankStart,8:8,2:2)
- | SetBitField(horizStart,8:8,3:3);
-
- regp->CRTC[NV_CIO_CRE_EBR_INDEX] = SetBitField(vertTotal,11:11,0:0)
- | SetBitField(vertDisplay,11:11,2:2)
- | SetBitField(vertStart,11:11,4:4)
- | SetBitField(vertBlankStart,11:11,6:6);
+ MASK(NV_CIO_CRE_RPC1_LARGE) : 0x00;
+ regp->CRTC[NV_CIO_CRE_LSR_INDEX] = XLATE(horizBlankEnd, 6, NV_CIO_CRE_LSR_HBE_6) |
+ XLATE(vertBlankStart, 10, NV_CIO_CRE_LSR_VBS_10) |
+ XLATE(vertStart, 10, NV_CIO_CRE_LSR_VRS_10) |
+ XLATE(vertDisplay, 10, NV_CIO_CRE_LSR_VDE_10) |
+ XLATE(vertTotal, 10, NV_CIO_CRE_LSR_VDT_10);
+ regp->CRTC[NV_CIO_CRE_HEB__INDEX] = XLATE(horizStart, 8, NV_CIO_CRE_HEB_HRS_8) |
+ XLATE(horizBlankStart, 8, NV_CIO_CRE_HEB_HBS_8) |
+ XLATE(horizDisplay, 8, NV_CIO_CRE_HEB_HDE_8) |
+ XLATE(horizTotal, 8, NV_CIO_CRE_HEB_HDT_8);
+ regp->CRTC[NV_CIO_CRE_EBR_INDEX] = XLATE(vertBlankStart, 11, NV_CIO_CRE_EBR_VBS_11) |
+ XLATE(vertStart, 11, NV_CIO_CRE_EBR_VRS_11) |
+ XLATE(vertDisplay, 11, NV_CIO_CRE_EBR_VDE_11) |
+ XLATE(vertTotal, 11, NV_CIO_CRE_EBR_VDT_11);
if (mode->Flags & V_INTERLACE) {
horizTotal = (horizTotal >> 1) & ~1;
- regp->CRTC[NV_CIO_CRE_ILACE__INDEX] = Set8Bits(horizTotal);
- regp->CRTC[NV_CIO_CRE_HEB__INDEX] |= SetBitField(horizTotal,8:8,4:4);
+ regp->CRTC[NV_CIO_CRE_ILACE__INDEX] = horizTotal;
+ regp->CRTC[NV_CIO_CRE_HEB__INDEX] |= XLATE(horizTotal, 8, NV_CIO_CRE_HEB_ILC_8);
} else
regp->CRTC[NV_CIO_CRE_ILACE__INDEX] = 0xff; /* interlace off */
@@ -755,7 +754,7 @@ nv_crtc_mode_set_fp_regs(xf86CrtcPtr crtc, DisplayModePtr mode, DisplayModePtr a
scale = (1 << 12) * mode->VDisplay / adjusted_mode->VDisplay;
regp->fp_debug_1 = NV_PRAMDAC_FP_DEBUG_1_XSCALE_TESTMODE_ENABLE |
- ((scale >> 1) & 0xfff);
+ XLATE(scale, 1, NV_PRAMDAC_FP_DEBUG_1_XSCALE_VALUE);
/* restrict area of screen used, horizontally */
diff = adjusted_mode->HDisplay -
@@ -771,7 +770,7 @@ nv_crtc_mode_set_fp_regs(xf86CrtcPtr crtc, DisplayModePtr mode, DisplayModePtr a
scale = (1 << 12) * mode->HDisplay / adjusted_mode->HDisplay;
regp->fp_debug_1 = NV_PRAMDAC_FP_DEBUG_1_YSCALE_TESTMODE_ENABLE |
- ((scale >> 1) & 0xfff) << 16;
+ XLATE(scale, 1, NV_PRAMDAC_FP_DEBUG_1_YSCALE_VALUE);
/* restrict area of screen used, vertically */
diff = adjusted_mode->VDisplay -
diff --git a/src/nv_cursor.c b/src/nv_cursor.c
index f3ba4a2..2863f2f 100644
--- a/src/nv_cursor.c
+++ b/src/nv_cursor.c
@@ -24,9 +24,6 @@
#include "nv_include.h"
-#define CURSOR_Y_SHIFT 16
-#define CURSOR_POS_MASK 0xffff
-
#define TO_ARGB1555(c) (0x8000 | /* Mask bit */ \
((c & 0xf80000) >> 9 ) | /* Red */ \
((c & 0xf800) >> 6 ) | /* Green */ \
@@ -200,7 +197,8 @@ void nv_crtc_set_cursor_position(xf86CrtcPtr crtc, int x, int y)
NVPtr pNv = NVPTR(crtc->scrn);
NVWriteRAMDAC(pNv, nv_crtc->head, NV_PRAMDAC_CU_START_POS,
- (y << CURSOR_Y_SHIFT) | (x & CURSOR_POS_MASK));
+ XLATE(y, 0, NV_PRAMDAC_CU_START_POS_Y) |
+ XLATE(x, 0, NV_PRAMDAC_CU_START_POS_X));
}
Bool NVCursorInitRandr12(ScreenPtr pScreen)
diff --git a/src/nv_hw.c b/src/nv_hw.c
index 9e0ec19..0804f86 100644
--- a/src/nv_hw.c
+++ b/src/nv_hw.c
@@ -303,7 +303,7 @@ bool NVLockVgaCrtcs(NVPtr pNv, bool lock)
NVWriteVgaCrtc(pNv, 0, NV_CIO_SR_LOCK_INDEX,
lock ? NV_CIO_SR_LOCK_VALUE : NV_CIO_SR_UNLOCK_RW_VALUE);
/* NV11 has independently lockable extended crtcs, except when tied */
- if (pNv->NVArch == 0x11 && !(nvReadMC(pNv, NV_PBUS_DEBUG_1) & (1 << 28)))
+ if (pNv->NVArch == 0x11 && !nv_heads_tied(pNv))
NVWriteVgaCrtc(pNv, 1, NV_CIO_SR_LOCK_INDEX,
lock ? NV_CIO_SR_LOCK_VALUE : NV_CIO_SR_UNLOCK_RW_VALUE);
@@ -343,9 +343,9 @@ void nv_show_cursor(NVPtr pNv, int head, bool show)
uint8_t *curctl1 = &pNv->ModeReg.crtc_reg[head].CRTC[NV_CIO_CRE_HCUR_ADDR1_INDEX];
if (show)
- *curctl1 |= NV_CIO_CRE_HCUR_ADDR1_ENABLE;
+ *curctl1 |= MASK(NV_CIO_CRE_HCUR_ADDR1_ENABLE);
else
- *curctl1 &= ~NV_CIO_CRE_HCUR_ADDR1_ENABLE;
+ *curctl1 &= ~MASK(NV_CIO_CRE_HCUR_ADDR1_ENABLE);
NVWriteVgaCrtc(pNv, head, NV_CIO_CRE_HCUR_ADDR1_INDEX, *curctl1);
if (pNv->Architecture == NV_ARCH_40)
diff --git a/src/nv_setup.c b/src/nv_setup.c
index ec32fc5..1635037 100644
--- a/src/nv_setup.c
+++ b/src/nv_setup.c
@@ -256,11 +256,11 @@ static void store_initial_head_owner(ScrnInfoPtr pScrn)
slaved_on_B = NVReadVgaCrtc(pNv, 1, NV_CIO_CRE_PIXEL_INDEX) & 0x80;
if (slaved_on_B)
- tvB = !(NVReadVgaCrtc(pNv, 1, NV_CIO_CRE_LCD__INDEX) & NV_CIO_CRE_LCD_LCD_SELECT);
+ tvB = !(NVReadVgaCrtc(pNv, 1, NV_CIO_CRE_LCD__INDEX) & MASK(NV_CIO_CRE_LCD_LCD_SELECT));
slaved_on_A = NVReadVgaCrtc(pNv, 0, NV_CIO_CRE_PIXEL_INDEX) & 0x80;
if (slaved_on_A)
- tvA = !(NVReadVgaCrtc(pNv, 0, NV_CIO_CRE_LCD__INDEX) & NV_CIO_CRE_LCD_LCD_SELECT);
+ tvA = !(NVReadVgaCrtc(pNv, 0, NV_CIO_CRE_LCD__INDEX) & MASK(NV_CIO_CRE_LCD_LCD_SELECT));
NVLockVgaCrtcs(pNv, true);
diff --git a/src/nv_type.h b/src/nv_type.h
index 8fa6ef6..f03c198 100644
--- a/src/nv_type.h
+++ b/src/nv_type.h
@@ -80,6 +80,9 @@
#define SetBit(n) (1<<(n))
#define Set8Bits(value) ((value)&0xff)
+#define MASK(field) ((0xffffffff >> (31 - ((1?field) - (0?field)))) << (0?field))
+#define XLATE(src, srclowbit, outfield) ((((src) >> (srclowbit)) << (0?outfield)) & MASK(outfield))
+
/* NV50 */
typedef enum Head {
HEAD0 = 0,
diff --git a/src/nvreg.h b/src/nvreg.h
index 5d839d2..9544c18 100644
--- a/src/nvreg.h
+++ b/src/nvreg.h
@@ -120,23 +120,23 @@
#define NV_PRMVIO_MISC__WRITE 0x000c03c2
#define NV_PRMVIO_SRX 0x000c03c4
#define NV_PRMVIO_SR 0x000c03c5
- #define NV_VIO_SR_RESET_INDEX 0x00
- #define NV_VIO_SR_CLOCK_INDEX 0x01
- #define NV_VIO_SR_PLANE_MASK_INDEX 0x02
- #define NV_VIO_SR_CHAR_MAP_INDEX 0x03
- #define NV_VIO_SR_MEM_MODE_INDEX 0x04
+# define NV_VIO_SR_RESET_INDEX 0x00
+# define NV_VIO_SR_CLOCK_INDEX 0x01
+# define NV_VIO_SR_PLANE_MASK_INDEX 0x02
+# define NV_VIO_SR_CHAR_MAP_INDEX 0x03
+# define NV_VIO_SR_MEM_MODE_INDEX 0x04
#define NV_PRMVIO_MISC__READ 0x000c03cc
#define NV_PRMVIO_GRX 0x000c03ce
#define NV_PRMVIO_GX 0x000c03cf
- #define NV_VIO_GX_SR_INDEX 0x00
- #define NV_VIO_GX_SREN_INDEX 0x01
- #define NV_VIO_GX_CCOMP_INDEX 0x02
- #define NV_VIO_GX_ROP_INDEX 0x03
- #define NV_VIO_GX_READ_MAP_INDEX 0x04
- #define NV_VIO_GX_MODE_INDEX 0x05
- #define NV_VIO_GX_MISC_INDEX 0x06
- #define NV_VIO_GX_DONT_CARE_INDEX 0x07
- #define NV_VIO_GX_BIT_MASK_INDEX 0x08
+# define NV_VIO_GX_SR_INDEX 0x00
+# define NV_VIO_GX_SREN_INDEX 0x01
+# define NV_VIO_GX_CCOMP_INDEX 0x02
+# define NV_VIO_GX_ROP_INDEX 0x03
+# define NV_VIO_GX_READ_MAP_INDEX 0x04
+# define NV_VIO_GX_MODE_INDEX 0x05
+# define NV_VIO_GX_MISC_INDEX 0x06
+# define NV_VIO_GX_DONT_CARE_INDEX 0x07
+# define NV_VIO_GX_BIT_MASK_INDEX 0x08
#define NV_PFB_BOOT_0 0x00100000
#define NV_PFB_CFG0 0x00100200
@@ -190,91 +190,122 @@
#define NV_PRMCIO_ARX 0x006013c0
#define NV_PRMCIO_AR__WRITE 0x006013c0
#define NV_PRMCIO_AR__READ 0x006013c1
- #define NV_CIO_AR_MODE_INDEX 0x10
- #define NV_CIO_AR_OSCAN_INDEX 0x11
- #define NV_CIO_AR_PLANE_INDEX 0x12
- #define NV_CIO_AR_HPP_INDEX 0x13
- #define NV_CIO_AR_CSEL_INDEX 0x14
+# define NV_CIO_AR_MODE_INDEX 0x10
+# define NV_CIO_AR_OSCAN_INDEX 0x11
+# define NV_CIO_AR_PLANE_INDEX 0x12
+# define NV_CIO_AR_HPP_INDEX 0x13
+# define NV_CIO_AR_CSEL_INDEX 0x14
#define NV_PRMCIO_CRX__COLOR 0x006013d4
#define NV_PRMCIO_CR__COLOR 0x006013d5
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