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xserver-xorg-video-intel: Changes to 'debian-experimental'



 ChangeLog                                            |  850 +++++++++++++++++++
 NEWS                                                 |    7 
 RELEASING                                            |    2 
 configure.ac                                         |   12 
 debian/changelog                                     |    7 
 man/intel.man                                        |   20 
 src/Makefile.am                                      |   68 -
 src/bios_reader/bios_reader.c                        |   22 
 src/brw_structs.h                                    |   21 
 src/drmmode_display.c                                |  232 ++++-
 src/exa_sf.g4a                                       |  107 --
 src/exa_sf.g4b                                       |   15 
 src/exa_sf_mask.g4a                                  |  107 --
 src/exa_sf_mask.g4b                                  |   15 
 src/exa_wm.g4i                                       |  156 ---
 src/exa_wm_affine.g4i                                |   44 
 src/exa_wm_ca.g4a                                    |   38 
 src/exa_wm_ca.g4b                                    |    4 
 src/exa_wm_ca_srcalpha.g4a                           |   37 
 src/exa_wm_ca_srcalpha.g4b                           |    4 
 src/exa_wm_mask_affine.g4a                           |   41 
 src/exa_wm_mask_affine.g4b                           |    8 
 src/exa_wm_mask_projective.g4a                       |   53 -
 src/exa_wm_mask_projective.g4b                       |   16 
 src/exa_wm_mask_sample_a.g4a                         |   48 -
 src/exa_wm_mask_sample_a.g4b                         |    2 
 src/exa_wm_mask_sample_argb.g4a                      |   48 -
 src/exa_wm_mask_sample_argb.g4b                      |    2 
 src/exa_wm_noca.g4a                                  |   38 
 src/exa_wm_noca.g4b                                  |    4 
 src/exa_wm_nomask.g4a                                |  143 ---
 src/exa_wm_projective.g4i                            |   51 -
 src/exa_wm_src_affine.g4a                            |   45 -
 src/exa_wm_src_affine.g4b                            |    8 
 src/exa_wm_src_projective.g4a                        |   49 -
 src/exa_wm_src_projective.g4b                        |   16 
 src/exa_wm_src_sample_a.g4a                          |   47 -
 src/exa_wm_src_sample_a.g4b                          |    2 
 src/exa_wm_src_sample_argb.g4a                       |   47 -
 src/exa_wm_src_sample_argb.g4b                       |    2 
 src/exa_wm_src_sample_planar.g4a                     |   65 -
 src/exa_wm_src_sample_planar.g4b                     |    4 
 src/exa_wm_write.g4a                                 |   74 -
 src/exa_wm_write.g4b                                 |   18 
 src/exa_wm_xy.g4a                                    |   52 -
 src/exa_wm_xy.g4b                                    |    4 
 src/exa_wm_yuv_rgb.g4a                               |   98 --
 src/exa_wm_yuv_rgb.g4b                               |   12 
 src/i810_reg.h                                       |    6 
 src/i830.h                                           |   29 
 src/i830_accel.c                                     |   11 
 src/i830_batchbuffer.c                               |    2 
 src/i830_bios.c                                      |   98 ++
 src/i830_bios.h                                      |    2 
 src/i830_display.c                                   |    5 
 src/i830_dri.c                                       |   55 -
 src/i830_driver.c                                    |  279 ++----
 src/i830_hdmi.c                                      |   18 
 src/i830_hwmc.c                                      |    4 
 src/i830_lvds.c                                      |   83 +
 src/i830_memory.c                                    |  155 +--
 src/i830_quirks.c                                    |    4 
 src/i830_render.c                                    |    4 
 src/i830_sdvo.c                                      |  165 +++
 src/i830_sdvo_regs.h                                 |    2 
 src/i830_tv.c                                        |    3 
 src/i830_uxa.c                                       |   62 -
 src/i830_video.c                                     |  467 +++++-----
 src/i965_render.c                                    |  340 ++++++-
 src/i965_video.c                                     |  190 +++-
 src/packed_yuv_sf.g4a                                |   45 -
 src/packed_yuv_sf.g4b                                |   17 
 src/packed_yuv_wm.g4a                                |  221 ----
 src/packed_yuv_wm.g4b                                |   79 -
 src/render_program/Makefile.am                       |   82 +
 src/render_program/exa_sf.g4a                        |  107 ++
 src/render_program/exa_sf.g4b                        |   15 
 src/render_program/exa_sf.g4b.gen5                   |   15 
 src/render_program/exa_sf_mask.g4a                   |  107 ++
 src/render_program/exa_sf_mask.g4b                   |   15 
 src/render_program/exa_sf_mask.g4b.gen5              |   15 
 src/render_program/exa_wm.g4i                        |  156 +++
 src/render_program/exa_wm_affine.g4i                 |   44 
 src/render_program/exa_wm_ca.g4a                     |   38 
 src/render_program/exa_wm_ca.g4b                     |    4 
 src/render_program/exa_wm_ca.g4b.gen5                |    4 
 src/render_program/exa_wm_ca_srcalpha.g4a            |   37 
 src/render_program/exa_wm_ca_srcalpha.g4b            |    4 
 src/render_program/exa_wm_ca_srcalpha.g4b.gen5       |    4 
 src/render_program/exa_wm_mask_affine.g4a            |   41 
 src/render_program/exa_wm_mask_affine.g4b            |    8 
 src/render_program/exa_wm_mask_affine.g4b.gen5       |    8 
 src/render_program/exa_wm_mask_projective.g4a        |   53 +
 src/render_program/exa_wm_mask_projective.g4b        |   16 
 src/render_program/exa_wm_mask_projective.g4b.gen5   |   16 
 src/render_program/exa_wm_mask_sample_a.g4a          |   48 +
 src/render_program/exa_wm_mask_sample_a.g4b          |    2 
 src/render_program/exa_wm_mask_sample_a.g4b.gen5     |    2 
 src/render_program/exa_wm_mask_sample_argb.g4a       |   48 +
 src/render_program/exa_wm_mask_sample_argb.g4b       |    2 
 src/render_program/exa_wm_mask_sample_argb.g4b.gen5  |    2 
 src/render_program/exa_wm_noca.g4a                   |   38 
 src/render_program/exa_wm_noca.g4b                   |    4 
 src/render_program/exa_wm_noca.g4b.gen5              |    4 
 src/render_program/exa_wm_projective.g4i             |   51 +
 src/render_program/exa_wm_src_affine.g4a             |   45 +
 src/render_program/exa_wm_src_affine.g4b             |    8 
 src/render_program/exa_wm_src_affine.g4b.gen5        |    8 
 src/render_program/exa_wm_src_projective.g4a         |   49 +
 src/render_program/exa_wm_src_projective.g4b         |   16 
 src/render_program/exa_wm_src_projective.g4b.gen5    |   16 
 src/render_program/exa_wm_src_sample_a.g4a           |   47 +
 src/render_program/exa_wm_src_sample_a.g4b           |    2 
 src/render_program/exa_wm_src_sample_a.g4b.gen5      |    2 
 src/render_program/exa_wm_src_sample_argb.g4a        |   47 +
 src/render_program/exa_wm_src_sample_argb.g4b        |    2 
 src/render_program/exa_wm_src_sample_argb.g4b.gen5   |    2 
 src/render_program/exa_wm_src_sample_planar.g4a      |   65 +
 src/render_program/exa_wm_src_sample_planar.g4b      |    4 
 src/render_program/exa_wm_src_sample_planar.g4b.gen5 |    4 
 src/render_program/exa_wm_write.g4a                  |   74 +
 src/render_program/exa_wm_write.g4b                  |   18 
 src/render_program/exa_wm_write.g4b.gen5             |   18 
 src/render_program/exa_wm_xy.g4a                     |   52 +
 src/render_program/exa_wm_xy.g4b                     |    4 
 src/render_program/exa_wm_xy.g4b.gen5                |    4 
 src/render_program/exa_wm_yuv_rgb.g4a                |   98 ++
 src/render_program/exa_wm_yuv_rgb.g4b                |   12 
 src/render_program/exa_wm_yuv_rgb.g4b.gen5           |   12 
 src/xvmc/intel_batchbuffer.c                         |    4 
 uxa/uxa-render.c                                     |    5 
 131 files changed, 4046 insertions(+), 2673 deletions(-)

New commits:
commit e708a3b7c333e7139051ce5d897b8666d757df79
Author: Brice Goglin <bgoglin@debian.org>
Date:   Tue Jul 14 00:17:19 2009 +0200

    Prepare Changelog for upload

diff --git a/debian/changelog b/debian/changelog
index 5681b9f..a9c64c8 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,9 +1,9 @@
-xserver-xorg-video-intel (2:2.7.99.902-1) UNRELEASED; urgency=low
+xserver-xorg-video-intel (2:2.7.99.902-1) experimental; urgency=low
 
   * New upstream release candidate.
     + Fix crash in drm_intel_gem_bo_unreference_locked, closes: #535772.
 
- -- Brice Goglin <bgoglin@debian.org>  Tue, 14 Jul 2009 00:14:36 +0200
+ -- Brice Goglin <bgoglin@debian.org>  Tue, 14 Jul 2009 00:17:00 +0200
 
 xserver-xorg-video-intel (2:2.7.99.901-2) experimental; urgency=low
 

commit aa27b9e9d59edf0855912d0ddb01a5681102f8b7
Author: Brice Goglin <bgoglin@debian.org>
Date:   Tue Jul 14 00:16:55 2009 +0200

    New upstream release candidate

diff --git a/ChangeLog b/ChangeLog
index 8d63f68..a7ed1a5 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,853 @@
+commit 82905c7c0b871a97ec435a765c2ca407903ba595
+Author: Carl Worth <cworth@cworth.org>
+Date:   Mon Jul 13 05:29:49 2009 -0700
+
+    Increment version to 2.7.99.902
+
+commit 925bc6cbd430a00928fac2ef58724dd37c3bc349
+Author: Carl Worth <cworth@cworth.org>
+Date:   Mon Jul 13 05:27:40 2009 -0700
+
+    RELEASING: Fix typo in instructions
+
+commit 67c0afc7b7446a7b98aa7c65043ddba4c7c72b82
+Author: Carl Worth <cworth@cworth.org>
+Date:   Mon Jul 13 05:27:06 2009 -0700
+
+    NEWS: Add notes for 2.7.99.902
+
+commit 34c674dd45879b8ba8395b93b16c8a9e7b848f1f
+Author: Keith Packard <keithp@keithp.com>
+Date:   Sat Jul 11 22:53:42 2009 -0700
+
+    Remove vestiges of NoAccel options from i830_driver.c
+    
+    The enum and OptionInfoRec weren't removed in the initial patch
+    
+    Signed-off-by: Keith Packard <keithp@keithp.com>
+
+commit 33d6e7a2355dfb8ad324c4fa28ce61c7e051b435
+Author: Keith Packard <keithp@keithp.com>
+Date:   Sat Jul 11 22:53:11 2009 -0700
+
+    intel.man: Mark NoAccel option as i810/i815 only
+    
+    The NoAccel option is not valid for other chips.
+    
+    Signed-off-by: Keith Packard <keithp@keithp.com>
+
+commit ed8a9a94e1a670ca35311c9ed83d0c479530d41a
+Author: Keith Packard <keithp@keithp.com>
+Date:   Fri Jul 10 17:13:14 2009 -0700
+
+    i830_uxa_prepare_access: Flush and wait for idle for non-bo pixmaps
+    
+    Without kernel support and explicit knowledge about where in the ring the
+    last rendering operation for a specific pixmap was, we must synchronize with
+    any outstanding rendering before accessing a pixmap which does not have a
+    buffer object.
+    
+    Signed-off-by: Keith Packard <keithp@keithp.com>
+
+commit cb19ac207b784d814f6f389110fd1b21a0f34e8b
+Author: Keith Packard <keithp@keithp.com>
+Date:   Fri Jul 10 14:01:02 2009 -0700
+
+    KMS: Keep screen pixmap devPrivate.ptr NULL during init and resize
+    
+    The frame buffer only has a valid address between prepare_access and
+    finish_access calls, so remove all other attempts to compute an address from
+    the driver.
+    
+    Signed-off-by: Keith Packard <keithp@keithp.com>
+
+commit 704b88dd50a7e7e3f362264b86d0401bee8603aa
+Author: Keith Packard <keithp@keithp.com>
+Date:   Wed Jul 8 13:06:47 2009 -0700
+
+    i830_bind_memory: Under UMS: Bind GEM bos with dri_bo_pin, else through the GART
+    
+    We only need to get static offsets for objects when not running KMS,
+    otherwise the kernel will manage those as needed for us.
+    
+    Binding objects is done in one of two ways. For GEM buffer objects, we use
+    dri_bo_pin. For GART allocated memory, we bind that to the GART.
+
+commit 7b273732f70e91df8b41d5c48e1379271557dd8e
+Author: Keith Packard <keithp@keithp.com>
+Date:   Wed Jul 8 11:53:13 2009 -0700
+
+    Allocate GTT space for GEM only under UMS
+    
+    GEM requires GTT space to map objects. Under KMS, the kernel driver has
+    already provided all available GTT space to GEM, so the X server need not do
+    anything.
+    
+    Signed-off-by: Keith Packard <keithp@keithp.com>
+
+commit 56bfee8705f5d7d965227013b205dbc4c93e220c
+Author: Keith Packard <keithp@keithp.com>
+Date:   Fri Jul 10 14:49:20 2009 -0700
+
+    Always set screen pixmap data pointer at init and resize times
+    
+    For non-DRM environments, the screen pixmap will be GART allocated memory
+    and not a libdrm buffer object and so uxa will only use devPrivate.ptr to
+    find the associated memory. Make sure devPrivate.ptr is set each time the
+    framebuffer is allocated so that uxa will be able to draw to it.
+    
+    Signed-off-by: Keith Packard <keithp@keithp.com>
+
+commit 98087a0b966d5dc69faf72719153a2c878ba3de1
+Author: Keith Packard <keithp@keithp.com>
+Date:   Wed Jul 8 11:47:25 2009 -0700
+
+    Make xorg.conf DRI option work under KMS. Fix name of I830AccelMethodInit
+    
+    KMS mode does not call I830AccelMethodInit as that does the user
+    modesetting initialization (yes, it was misnamed), but that means that the DRI option
+    was ignored. Create a new i830_check_dri_option function to do the option
+    detection, then remove that from I830AccelMethodInit, which is renamed
+    i830_user_modesetting_init to reflect what it actually does.
+    
+    Signed-off-by: Keith Packard <keithp@keithp.com>
+
+commit d655a3ff423e69c19a5dc07140cbf3caaa32cb86
+Author: Keith Packard <keithp@keithp.com>
+Date:   Wed Jul 8 18:06:40 2009 -0700
+
+    Remove NoAccel support
+    
+    This removes yet another 'debugging' option that hasn't seen real use in a
+    long time, and wasn't supported under KMS in any case.
+    
+    Signed-off-by: Keith Packard <keithp@keithp.com>
+
+commit 4e4b947f0b13f4a62606ccfd5729d5eb26ca0e92
+Author: Eric Anholt <eric@anholt.net>
+Date:   Thu Jul 9 15:52:16 2009 -0700
+
+    Remove bad comment about 3DSTATE_DRAWING_RECTANGLE size.
+
+commit 9155cfca75a207bce0fad945f32f0cb33eab8c4e
+Author: Eric Anholt <eric@anholt.net>
+Date:   Thu Jul 9 14:16:07 2009 -0700
+
+    Fix lols in trying to figure out whether this is a 64-bit build.
+    
+    Noticed by:	Michel Dänzer <michel@daenzer.net>
+
+commit 40e7c9505265823786cf730214db84812a5e494e
+Author: Eric Anholt <eric@anholt.net>
+Date:   Mon Jul 6 11:54:50 2009 -0700
+
+    Refuse to allocate giant BOs on 32-bit systems.
+    
+    The overcommit of address space combined with these buffers hitting SW
+    fallbacks all the time means that we're probably better off telling the
+    application "no" instead of likely silently failing later.
+    
+    Bug #22601.
+
+commit 6337cd23e692cae789d07f429442c425c18e1d4f
+Author: Eric Anholt <eric@anholt.net>
+Date:   Wed Jul 1 15:54:38 2009 -0700
+
+    Initialize the other argument to drmSetInterfaceVersion.
+    
+    The kernel ignores it if dd_major is -1, anyway.
+
+commit 216d939858abc924f2e32c95518f937f29ea018e
+Author: ling.ma@intel.com <ling.ma@intel.com>
+Date:   Tue Jul 7 14:26:02 2009 +0800
+
+    enable sdvo lvds scaling function
+    
+    Currently we implemented basic sdvo lvds function,
+    But except for sdvo lvds fixed mode, we can not switch
+    to other modes, otherwise display get black. The patch
+    intends to work for all modes whose HDisplay and VDisplay
+    are lower than fixed mode.
+    
+    Signed-off-by: Ma Ling <ling.ma@intel.com>
+
+commit 0402f4f331148084552bd3963dbcb3fb900be8ea
+Author: Simon Farnsworth <simon.farnsworth@onelan.co.uk>
+Date:   Thu Jun 18 12:33:47 2009 +0100
+
+    Raise XV limit to 2048x2048 to match hardware limits.
+    
+    The bigrequests limit isn't present in current X servers (tested using
+    textured video on a 965 with both image and window at 2048x2048 on a
+    1920x1200 display, and image at 2048x2048, window at 1024x1024).
+    
+    Remove the artificial limit, enabling full-screen HD video when
+    rotated.
+
+commit a66357832388ba9db21a4b3bf8311d9d1f1ab308
+Author: Keith Packard <keithp@keithp.com>
+Date:   Tue Jul 7 14:13:57 2009 -0700
+
+    non-DRI FB resize failed to assign the screen pixmap devPrivate.ptr (22328)
+    
+    When not using DRI, the screen pixmap is not in a bo, and so the usual
+    enable/disable access functions don't adjust the pixmap devPrivate field,
+    leaving it to the frame buffer allocation code to assign this correctly.
+    
+    During mode setting and fb resizing, FB access is disabled, and the
+    screen pixmap devPrivate is stashed away by xf86EnableDisableFBAccess,
+    to be restored when FB access is turned back on. This means that we have to
+    set the pixmap devPrivate.ptr (in case xf86EnableDisableFBAccess doesn't
+    do this), along with storing the address in the scrn->pixmapPrivate field.
+    
+    Signed-off-by: Keith Packard <keithp@keithp.com>
+    Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
+
+commit c889b34e432198d5410a068eff3089ff5314ac27
+Author: Chris Wilson <chris@chris-wilson.co.uk>
+Date:   Tue Jul 7 18:05:01 2009 +0100
+
+    Check for a valid I830Ptr before closing master.
+    
+    After failing to become DRM master, the X server dies attempting to close
+    the master fd during free:
+    
+    (EE) intel(0): [drm] failed to set drm interface version.
+    (EE) intel(0): Failed to become DRM master.
+    (EE) intel(0): failed to get resources: Bad file descriptor
+    (EE) intel(0): Kernel modesetting setup failed
+    
+    Backtrace:
+    0: X(xorg_backtrace+0x3b) [0x8133a3b]
+    1: X(xf86SigHandler+0x55) [0x80c7945]
+    2: [0xb805d400]
+    3: /usr/lib/xorg/modules/drivers//intel_drv.so [0xb7b4bfcc]
+    4: X(xf86DeleteScreen+0x6b) [0x80d465b]
+    5: X(InitOutput+0x548) [0x80b0158]
+    6: X(main+0x1cb) [0x807220b]
+    7: /lib/tls/i686/cmov/libc.so.6(__libc_start_main+0xe5) [0xb7d107a5]
+    8: X [0x8071881]
+    Saw signal 11.  Server aborting.
+     ddxSigGiveUp: Closing log
+     ddxSigGiveUp: re-raising 11
+    Segmentation fault
+    
+    Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 705042f497b7b3843c2dcc5c160fb8dfeac1472a
+Author: Keith Packard <keithp@keithp.com>
+Date:   Mon Jul 6 13:49:31 2009 -0700
+
+    Handle DRI2INFOREC version 3
+    
+    This DRI2 version does not support the old CreateBuffers/DestroyBuffers
+    interface anymore.
+    
+    Signed-off-by: Keith Packard <keithp@keithp.com>
+
+commit 2ebc7d32e47b5edd5b776c39f936ed4e053caac2
+Author: Keith Packard <keithp@keithp.com>
+Date:   Thu Jul 2 13:13:14 2009 -0700
+
+    Update to multi-API DRI2 interface
+    
+    The DRI2 interface was changed to support both old and new drivers in an
+    API/ABI compatible fashion. This change syncs the intel driver with the new
+    version of the DRI2 API.
+    
+    Signed-off-by: Keith Packard <keithp@keithp.com>
+
+commit f6f79eb629184366b1355743d601129a526da90c
+Author: Rémi Cardona <remi@gentoo.org>
+Date:   Mon Jul 6 11:01:31 2009 +0200
+
+    remove unused shader program
+    
+    This file is not even referenced by any Makefile.am
+    
+    Acked-by: Zhenyu Wang <zhenyuw@linux.intel.com>
+
+commit 7e722ada533777c5e9ddf44bb4d770bacf8e13bf
+Author: Zhenyu Wang <zhenyuw@linux.intel.com>
+Date:   Mon Jul 6 16:25:13 2009 +0800
+
+    Disable FBC on IGDNG
+    
+    Don't make FBC count for memory allocation.
+    
+    Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
+
+commit 74227141923a2f5049592219ab80e8733062a5d9
+Author: Barry Scott <barry.scott@onelan.co.uk>
+Date:   Tue Jun 23 14:14:50 2009 +0100
+
+    Fix segv for clipped movie window
+    
+    When playing a movie that is clipped on its left and right edges the Xorg
+    server will SEGV sometimes. This is because the intel driver ignores the
+    clipping info when it copies the planes out of the XV data.
+    
+    The check for the optimised copy was wrong to ignore the width required.
+    Which leads to too much data being copied by the memcpy. It the source buffer
+    happens to end exactly on a page boundary the server will SEGV.
+    
+    As we reviewed the code we checked the calculation of src1, src2 and src3.
+    The patch includes additional comments to make it clear what the elements of
+    the calculation are.
+    
+    This bug exists in git head and we also see it in 2.4.1.
+    
+    Barry
+    
+    Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
+
+commit c1755599db1d9a20954b84ccc07afd892bb6ac9e
+Author: Jesse Barnes <jbarnes@virtuousgeek.org>
+Date:   Thu Jul 2 13:04:51 2009 -0700
+
+    Clear the bo on the rotate scratch pixmap
+    
+    Since the scratch pixmap header will be re-used after allocation, we
+    need to clear its bo attachment when we stop using it, otherwise a later
+    user will use a bogus bo.
+    
+    Reviewed-by: Keith Packard <keithp@keithp.com>
+    Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
+
+commit 324b4686204feb3a7370eeecaff8ba44635f73ca
+Author: Daniel Vetter <daniel.vetter@ffwll.ch>
+Date:   Thu Jul 2 14:15:37 2009 +0200
+
+    Xv i830_display_video splitup: extract i830_update_scaling_factors
+    
+    Just moved the code, no other changes.
+    
+    Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+
+commit c2410addbfb99fcd7069591d9f387c35ed760522
+Author: Daniel Vetter <daniel.vetter@ffwll.ch>
+Date:   Thu Jul 2 14:15:36 2009 +0200
+
+    Xv i830_display_video splitup: extract i830_update_polyphase_coeffs
+    
+    To slightly clean up the implementation of i830_update_polyphase_coeffs,
+    introduce the two small helper functions i830_limit_coeff and
+    i830_store coeffs_in_overlay_regs.
+    
+    Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+    Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
+
+commit 795c11c49cf10525f02127a3629d35378d802fa7
+Author: Daniel Vetter <daniel.vetter@ffwll.ch>
+Date:   Thu Jul 2 14:15:34 2009 +0200
+
+    Xv i830_display_video splitup: extract i830_update_dst_box_to_crtc_coords
+    
+    Just moved the code ouf of line.
+    
+    Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+
+commit 4100abdf5d208bbcbb4ceabad0572c04221443c9
+Author: Daniel Vetter <daniel.vetter@ffwll.ch>
+Date:   Tue Jun 30 13:12:45 2009 +0200
+
+    Xv: kill !textured condition
+    
+    This is in the overlay path and therefore always true.
+    
+    Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+
+commit b0df0fe91e2b800ed096f369850aa1af4be2f157
+Author: Daniel Vetter <daniel.vetter@ffwll.ch>
+Date:   Tue Jun 30 13:12:44 2009 +0200
+
+    Xv overlay: implement GAMMA5 errata
+    
+    - also ensure that the most significant byte is zero
+    - while I was looking at the code, add the Overlay suffix to
+    SetPortAttribute like in the textured case.
+    
+    Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+
+commit 5ef4d3cde1335350d82469ebbaed1b547a59552c
+Author: Daniel Vetter <daniel.vetter@ffwll.ch>
+Date:   Tue Jun 30 13:12:43 2009 +0200
+
+    Xv: kill unneeded indirection
+    
+    overlay and textured video have the exact same QueryImageAttributes
+    function.
+    
+    Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+
+commit 1e4784bf26e3c154f5673f7b5add3ef7af3b1474
+Author: Eric Anholt <eric@anholt.net>
+Date:   Tue Jun 30 19:52:36 2009 -0700
+
+    uxa: Fix segfault on source-only picture usage with FallbackDebug.
+    
+    Bug #22107.
+
+commit 7e79fc8aa93df4df37c25cf37ee0ec6c7caca1d9
+Author: Zhenyu Wang <zhenyuw@linux.intel.com>
+Date:   Tue Jun 30 15:40:34 2009 +0800
+
+    Fix 945GM VT switch in UMS
+    
+    Bug #19578. We should set private intel_crtc state according
+    to current, as fail to do so pipe A needs active won't be taken
+    care of. Also make sure pipe swap operation always set during
+    VT switch.
+    
+    Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
+
+commit 50392ac8234d643c8a99e1753bdb196c0062a891
+Author: Zhenyu Wang <zhenyu.z.wang@intel.com>
+Date:   Mon May 18 13:53:33 2009 +0800
+
+    Load fbcon too if kernel mode setting is checked on
+    
+    If i915 module has already been loaded and kms check is true,
+    it would be nice to load fbcon module too.
+    
+    Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com>
+
+commit 058ad9e6ab4a00ff66046d94c2129056011ebee9
+Author: Jesse Barnes <jbarnes@virtuousgeek.org>
+Date:   Tue Jun 30 16:02:19 2009 -0700
+
+    Don't try to pin buffers in KMS mode
+    
+    The only things we try to pin in KMS mode are the cursor objects and
+    front buffer, and those are taken care of by the kernel anyway, so we
+    shouldn't even bother trying to pin them (well, not entirely true,
+    XvMC tries to pin as well, but it needs work w/KMS anyway).
+    
+    Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
+
+commit cec9fc6f6cffce186606f39982d0d78ff7c63bbf
+Author: Jesse Barnes <jbarnes@virtuousgeek.org>
+Date:   Tue Jun 30 12:27:59 2009 -0700
+
+    Make KMS set_resource function return TRUE
+    
+    This is what's expected by the server, and allows the EDID for example
+    to be exported in the KMS case.
+    
+    Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
+
+commit 53e248af4365232416d2143a791a07c6751f8319
+Author: Jesse Barnes <jbarnes@virtuousgeek.org>
+Date:   Tue Jun 30 12:00:28 2009 -0700
+
+    Use DVO timing block instead of fp_timing when parsing LFP data
+    
+    The KMS side was correct, but the UMS patch was broken.  We need to use
+    the DVO timing block of the LFP data to get the timing, not the
+    fp_timing block.
+    
+    Fixes fdo bug #22529.
+    
+    Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
+
+commit 362883c2f9a3442f7678e6e815f41b21baaa3f53
+Author: Jesse Barnes <jbarnes@virtuousgeek.org>
+Date:   Mon Jun 29 16:26:15 2009 -0700
+
+    Add a few error messages for DRM initialization
+    
+    Makes it easier to see where things go wrong.
+    
+    Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
+
+commit afac333bef4a0ac934f0e4d933dc5053d81ca88c
+Author: Zhenyu Wang <zhenyuw@linux.intel.com>
+Date:   Tue Jun 30 11:10:52 2009 +0800
+
+    Remove unused packed yuv sampler shader programs
+    
+    Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
+
+commit 150c9adebc0b502f19c970783f411928e5a5c3b1
+Author: Zhenyu Wang <zhenyuw@linux.intel.com>
+Date:   Tue Jun 30 10:42:41 2009 +0800
+
+    Xv: fix domain usage for binding table on i965+ chips
+    
+    Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
+
+commit 7770958e42d60966d95702e75c704e20ae2d90dd
+Author: Zhenyu Wang <zhenyuw@linux.intel.com>
+Date:   Tue Jun 30 10:41:26 2009 +0800
+
+    Add XV support on IGDNG
+    
+    This brings necessary change for IGDNG for texture video support
+    from 2D render code.
+    
+    Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
+
+commit f806fe7d675b966680a63406167ce37e4f8a1ae8
+Author: Xiang Haihao <haihao.xiang@intel.com>
+Date:   Thu Jun 25 15:39:32 2009 +0800
+
+    Enable 2D composite on IGDNG
+    
+    This patch enables 2D composite on IGDNG. IGDNG requires
+    new compiled shader programs for Gen5 and some command changes.
+    The most notable is the layout of vertex element has changed,
+    but we tried to keep it as origin to not change shader programs.
+    Also vertex buffer state requires end address of vertex buffer
+    instead of origin max index.
+    
+    Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
+
+commit 9fb34012f667e37f480085696ef9c2632d6eb7e1
+Author: Zhenyu Wang <zhenyuw@linux.intel.com>
+Date:   Thu Jun 25 15:30:04 2009 +0800
+
+    Add new compiled shader program for IGDNG
+    
+    Also check intel-gen4asm tool here for new -g option, which is
+    required to compile new programs.
+    
+    Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
+
+commit 488acc4595bb7f40130afcb8bcb05656ff3ae82c
+Author: Zhenyu Wang <zhenyuw@linux.intel.com>
+Date:   Thu Jun 25 14:05:40 2009 +0800
+
+    Move shader programs under its own subdirectory
+    
+    Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
+
+commit 170cae0c8d58fc141de1d8a2f17a4328d39c1263
+Author: Jesse Barnes <jbarnes@virtuousgeek.org>
+Date:   Mon Jun 29 12:55:43 2009 -0700
+
+    Only get the VBIOS in non-KMS mode
+    
+    In KMS mode, the kernel takes care of this for us, so don't bother.
+
+commit 6511c082459789cf279e7a4528775a1c821ad8cc
+Author: Jesse Barnes <jbarnes@virtuousgeek.org>
+Date:   Mon Jun 29 12:53:51 2009 -0700
+
+    Output error info if we fail to get DRM resources
+    
+    Useful for debugging.
+
+commit 00eb73286c3512a362dce00efdeae740772d0dcd
+Author: Jesse Barnes <jbarnes@virtuousgeek.org>
+Date:   Mon Jun 29 09:12:28 2009 -0700
+
+    Use swapbuffers_wait control
+    
+    Commit 1eec83a203c48822400742a1fb184b2cb52c62f7, which added the new
+    SwapbuffersWait option, didn't actually include the code which used it.  So
+    add a test to DRI2's CopyRegion call, only emitting the scanline wait
+    command if the swapbuffers_wait option is set.
+    
+    Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
+
+commit f53b3239dbc0ed723774e386e07ac9d8ce96bb89
+Author: Zhenyu Wang <zhenyuw@linux.intel.com>
+Date:   Thu Jun 25 10:22:23 2009 +0800
+
+    Disable XvMC on 915G/GM in KMS
+    
+    These chips require physical address for XvMC surface, which
+    is not available in KMS case. Instead of crashing X, disable it now.
+    
+    Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
+
+commit f0270bbb47baed78a0ff6189ae20d3ac322ec02b
+Author: Jesse Barnes <jbarnes@virtuousgeek.org>
+Date:   Wed Jun 24 14:42:08 2009 -0700
+
+    Fix i830_crtc_on to only check outputs associated with the given CRTC
+    
+    Otherwise we may end up returning a false positive if some other output & crtc
+    are on, but not the one in question, again leading to hangs.
+    
+    Reported-by: Eric Anholt <eric@anholt.net>
+    Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
+
+commit 5d80e24b5fc6d6028028da6ded35389c08bfce29
+Author: Jesse Barnes <jbarnes@virtuousgeek.org>
+Date:   Wed Jun 24 13:12:25 2009 -0700
+
+    Treat disabled CRTCs as "not covering" for scanline wait purposes
+    
+    Now that swapbuffers does a scanline wait to avoid tearing, it's
+    important to take into account the CRTC status to avoid hangs.  If we
+    do a scanline wait when the CRTC is off (due to DPMS for example) we'll
+    hang the GPU.  So add some code to check the CRTC DPMS status to the
+    i830_covering_crtc function, returning NULL if none of the covering
+    CRTCs are actually active.  KMS vs UMS logic is hidden in new i830*
+    functions, cleaning up both DRI2 & video paths a bit.
+    
+    Fixes fdo bug #22383.
+    
+    Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
+
+commit 6d025e679a99778496576af9a6a6fa8c043ae811
+Author: Alan Coopersmith <alan.coopersmith@sun.com>
+Date:   Tue Jun 23 09:53:14 2009 -0700
+
+    Harden i830 render in case check_composite didn't throw out bad formats.
+    
+    Fixes a warning in a static analysis program, and the code's a little
+    clearer.
+    
+    Bug #21667
+
+commit 1eec83a203c48822400742a1fb184b2cb52c62f7
+Author: Jesse Barnes <jbarnes@virtuousgeek.org>
+Date:   Tue Jun 23 15:05:03 2009 -0700
+
+    Add option to control swapbuffers behavior
+    
+    Until we get triple buffering, we'll want this so users can avoid taking a
+    performance hit on apps that render slower than the refresh rate.
+    
+    Fixes fdo bug #22234.
+    
+    Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
+
+commit bfeeac6de096256fca82244338bb45d53ee53cbc
+Author: Zou Nan hai <nanhai.zou@intel.com>
+Date:   Tue Jun 23 11:31:37 2009 +0800
+
+     i915 xvmc, fix fd.o bug #22103
+
+commit 15af8ea6ab6998bbab9f4eeda227565c409da229
+Author: Jesse Barnes <jbarnes@virtuousgeek.org>
+Date:   Mon Jun 22 11:11:06 2009 -0700
+
+    Fix LFP data block fetch
+    
+    Apparently the proper way to do this is to use the LFP data pointer block to figure out the LFP data block entry size, then use that plus the panel index to calculate an offset into the LFP data block array.
+    
+    Fixes fdo bug #19450.
+    
+    Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
+
+commit 534e73ad4f234a04755917f2bf17ba821c27eb52
+Author: Zhao Yakui <yakui.zhao@intel.com>
+Date:   Thu Jun 18 09:46:32 2009 +0800
+
+    Don't change the blank/sync width when calculating scaled modes
+    
+    Don't the change the blank/vsync width while doing LVDS scaled modes.
+    And use the border instead of border minus one.
+    
+    At the same time, make sure the horizontal border and hsync are even for
+    the LVDS that works in dual-channel mode. So both horizontal border and hsync
+    start are also changed to be even, even for the LVDS in single-channel
+    mode.
+    
+    https://bugs.freedesktop.org/show_bug.cgi?id=20951
+    
+    Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
+    Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
+
+commit b5cd2130f97591f4a387db1b98c940c30bc6404c
+Author: ling.ma@intel.com <ling.ma@intel.com>
+Date:   Tue Jun 16 16:52:25 2009 +0800
+
+    TV: Set correct voltage level override values
+    
+    We detect TV connect status by setting DAC voltage level override
+    values as 0.7 voltage for DAC_A/B/C. The corresponding 2-bits shold be 0x2,
+    In order correctly to set last bit as 0, at first we must clean it.
+    
+    It fixed freedesktop.org bug #21204
+    
+    Signed-off-by: Ma Ling <ling.ma@intel.com>
+
+commit a6cdcd9fee0164f79075063fd163d142a55fcbc5
+Author: ling.ma@intel.com <ling.ma@intel.com>
+Date:   Tue Jun 16 16:47:52 2009 +0800
+
+    Set hot plug interrupt to detect HDMI output
+    
+    We detect HDMI output connection status by writing to HOT Plug Interrupt
+    Detect Enable bit in PORT_HOTPLUG_EN. The behavior will generate an specified
+    interrupt, which is caught by audio driver, but during one detection driver
+    set all Detect Enable bits of HDMIB, HDMIC and HDMID, which generate wrong
+    interrupt signals for current output, according to the signals audio driver
+    misunderstand device status. The patch intends to handle corresponding output
+    precisely.
+    
+    It fixed fredesktop bug #21371
+    
+    Signed-off-by: Ma Ling <ling.ma@intel.com>
+
+commit 6b93afc564a5e74b0eaaa46c95f557449951b3b9
+Author: Bryce Harrington <bryce@bryceharrington.org>
+Date:   Wed May 27 03:40:52 2009 -0700
+
+    add pipe a force quirk for Dell mini
+    
+    Add quirk to solve issue with black screen and hang occuring after closing the
+    lid with attached external monitor, on Dell Mini.
+    
+    Fixes fdo bug #21960.
+    
+    Signed-off-by: Bryce Harrington <bryce@bryceharrington.org>
+
+commit eb09014ce10428bbcab04e155186382975545f0a
+Author: Li Peng <peng.li@intel.com>
+Date:   Tue Jun 16 15:29:57 2009 -0700
+
+    don't wait for vblank on rotated displays
+    
+    We may hang or wait for the wrong line if the display is rotated, so just skip
+    the wait in that case.
+    
+    Fixes fdo bug #22196.
+
+commit 6c56521bdc0443c0656271caaa795feb13bc1d6b
+Author: Bryce Harrington <bryce@bryceharrington.org>
+Date:   Wed May 27 05:18:53 2009 -0700
+
+    pipe-a quirk for thinkpad x30
+    
+    Fixes freeze when closing lid on ThinkPad X30.
+    
+    Fixes FDO bug # 21976.
+    
+    Signed-off-by: Bryce Harrington <bryce@bryceharrington.org>
+
+commit 246cec965958e94babf5377e6f221522b05fb458
+Author: Zhao Yakui <yakui.zhao@intel.com>
+Date:   Wed Jun 10 11:17:28 2009 +0800
+
+    Fix EDID for LVDS output device to add the default modes
+    
+    Fix the EDID for the LVDS output device to add the default modes.This is
+    similar to what we have done in UMS mode.
+    a. When there exists the EDID, either find the DS_RANGES block or replace
+    a DS_VENDOR block, smashing it into a DS_RANGES block with open refresh
+    to match all the defaults modes.
+    b. When there is no EDID, we will construct a bogus EDID and add a DS_RANGES
+    block with the open refresh to match all the default modes.
+    
+    http://bugs.freedesktop.org/show_bug.cgi?id=20801
+    http://bugs.freedesktop.org/show_bug.cgi?id=21094
+    http://bugs.freedesktop.org/show_bug.cgi?id=21346
+    http://bugs.freedesktop.org/show_bug.cgi?id=21417
+    http://bugs.freedesktop.org/show_bug.cgi?id=21671
+    
+    Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
+
+commit 5d1dc7677004d445a7a781decd8c1ef9747c14fb
+Author: Zhao Yakui <yakui.zhao@intel.com>
+Date:   Wed Jun 10 11:17:27 2009 +0800
+
+    Get the LVDS panel limit and check whether the given modeline is valid
+    
+    When the connector type is LVDS, it will traverse the mode list returned by
+    KMS kernel to get the LVDS panel limit. Then it will use the panel limit to
+    check whether the given modeline is valid. If the given modeline exceeds
+    the LVDS panel limit, it will be invalid.
+    
+    http://bugs.freedesktop.org/show_bug.cgi?id=20801
+    http://bugs.freedesktop.org/show_bug.cgi?id=21094
+    http://bugs.freedesktop.org/show_bug.cgi?id=21346
+    http://bugs.freedesktop.org/show_bug.cgi?id=21417
+    http://bugs.freedesktop.org/show_bug.cgi?id=21671
+    
+    Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
+
+commit 115e28639fbf6a1eba636dafac02fadd83036c75
+Author: Zhao Yakui <yakui.zhao@intel.com>
+Date:   Wed Jun 10 11:17:26 2009 +0800
+
+    Add the private data for the LVDS connector
+    
+    Add the private data when the connector type is LVDS.
+    We can use the private_data to store the LVDS panel limit.
+    For example: Hdisplay, Vdisplay.
+    
+    http://bugs.freedesktop.org/show_bug.cgi?id=20801
+    http://bugs.freedesktop.org/show_bug.cgi?id=21094
+    http://bugs.freedesktop.org/show_bug.cgi?id=21346
+    http://bugs.freedesktop.org/show_bug.cgi?id=21417
+    http://bugs.freedesktop.org/show_bug.cgi?id=21671
+    
+    Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
+
+commit 3da549f5b350dd42516e5cb3576f7fefe012d95e
+Author: Zhao Yakui <yakui.zhao@intel.com>
+Date:   Wed Jun 10 11:37:03 2009 +0800
+
+    GFX: Initialize the SDVO device based on the valid slave address
+    
+    When the slave address is found for the SDVO port, the SDVO device will
+    be initialzied.
+    When the slave address is not found for the SDVO port, it will return
+    the slave address by using the following flowchart:
+    a. If the SDVO device info is found for another SDVO port, it will return
+    the slave address that is not used. For example: if 0x70 is used, then 0x72
+    is returned.
+    b. If no SDVO device info is found for another SDVO port, it will return
+    0x70 for SDVOB and 0x72 for SDVOC.
+    
+    http://bugs.freedesktop.org/show_bug.cgi?id=20429
+    
+    Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
+
+commit 51b87b9913ba164d4d5de79e558233915b37a0a5
+Author: Zhao Yakui <yakui.zhao@intel.com>
+Date:   Wed Jun 10 11:37:02 2009 +0800
+
+    parse general definition block to get the SDVO device info
+    
+    The general definition block contains the child device tables, which include
+    the child device info. For example: device slave address, device dvo port,
+    device type.
+    We will get the info of SDVO device by parsing the general definition blocks.
+    Only when a valid slave address is found, it is regarded as the SDVO device.
+    And the info of DVO port and slave address is recorded.
+    
+    http://bugs.freedesktop.org/show_bug.cgi?id=20429
+    
+    Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
+
+commit 6ba148bbd78783f59eed3d898638c39b950dcd89
+Author: Zhao Yakui <yakui.zhao@intel.com>
+Date:   Wed Jun 10 11:37:01 2009 +0800
+
+    Dynamically get the number of child device in general definition block
+    
+    The size of general definition block varies on different platform/machines.
+    In such case the number of child device is also different.
+    And it will be better to get the number of child device in general definition
+    block dynamically.
+    
+    The number of child device can be calculated by the following formula:
+    	(block_size - block_header_size) /
+    		sizeof( struct child_device_config)


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