mesa: Changes to 'upstream-unstable'
Rebased ref, commits from common ancestor:
commit bf1e6581a56884c383e5446d84c56b39a7f4e0a0
Author: Brian Paul <brianp@vmware.com>
Date: Fri Mar 27 18:57:39 2009 -0600
docs: set 7.4 release date
diff --git a/docs/news.html b/docs/news.html
index 8b96ab6..d34c273 100644
--- a/docs/news.html
+++ b/docs/news.html
@@ -11,7 +11,7 @@
<H1>News</H1>
-<h2>March ??, 2009</h2>
+<h2>March 27, 2009</h2>
<p>
<a href="relnotes-7.4.html">Mesa 7.4</a> is released.
This is a stable release fixing bugs since the 7.3 release.
diff --git a/docs/relnotes-7.4.html b/docs/relnotes-7.4.html
index b7a7a77..fff82f3 100644
--- a/docs/relnotes-7.4.html
+++ b/docs/relnotes-7.4.html
@@ -8,7 +8,7 @@
<body bgcolor="#eeeeee">
-<H1>Mesa 7.4 Release Notes / date TBD</H1>
+<H1>Mesa 7.4 Release Notes / 27 March 2009</H1>
<p>
Mesa 7.4 is a stable development release fixing bugs since the 7.3 release.
commit 80ec7843bc31e28b865429c134d43bee462f0c6c
Author: Brian Paul <brianp@vmware.com>
Date: Fri Mar 27 18:57:23 2009 -0600
mesa: set VERSION=7.4
diff --git a/Makefile b/Makefile
index 630bf9f..726b263 100644
--- a/Makefile
+++ b/Makefile
@@ -174,7 +174,7 @@ ultrix-gcc:
# Rules for making release tarballs
-VERSION=7.4-rc2
+VERSION=7.4
DIRECTORY = Mesa-$(VERSION)
LIB_NAME = MesaLib-$(VERSION)
DEMO_NAME = MesaDemos-$(VERSION)
commit 366d6e8cd1228d965bfe2c93269e15eda5fece59
Author: Brian Paul <brianp@vmware.com>
Date: Fri Mar 27 18:57:07 2009 -0600
mesa: set version to 7.4
diff --git a/src/mesa/main/version.h b/src/mesa/main/version.h
index 4fde441..84dcb26 100644
--- a/src/mesa/main/version.h
+++ b/src/mesa/main/version.h
@@ -31,7 +31,7 @@
#define MESA_MAJOR 7
#define MESA_MINOR 4
#define MESA_PATCH 0
-#define MESA_VERSION_STRING "7.4-rc2"
+#define MESA_VERSION_STRING "7.4"
/* To make version comparison easy */
#define MESA_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c))
commit 63ed288396a7f078b88dbd92e201134797cf89eb
Author: Ian Romanick <ian.d.romanick@intel.com>
Date: Fri Mar 27 14:22:47 2009 -0700
intel: Add extra, stronger flushes around CopyTexSubImage blits
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index 20dad52..2e76e93 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -533,7 +533,7 @@ intelFlush(GLcontext * ctx)
intel_flush(ctx, GL_FALSE);
}
-static void
+void
intel_glFlush(GLcontext *ctx)
{
intel_flush(ctx, GL_TRUE);
diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h
index c536e76..8a8e59f 100644
--- a/src/mesa/drivers/dri/intel/intel_context.h
+++ b/src/mesa/drivers/dri/intel/intel_context.h
@@ -440,6 +440,7 @@ extern void intelGetLock(struct intel_context *intel, GLuint flags);
extern void intelFinish(GLcontext * ctx);
extern void intelFlush(GLcontext * ctx);
+extern void intel_glFlush(GLcontext *ctx);
extern void intelInitDriverFunctions(struct dd_function_table *functions);
extern void intelInitExtensions(GLcontext *ctx, GLboolean enable_imaging);
diff --git a/src/mesa/drivers/dri/intel/intel_tex_copy.c b/src/mesa/drivers/dri/intel/intel_tex_copy.c
index 08437aa..a7143b8 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_copy.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_copy.c
@@ -104,7 +104,7 @@ do_copy_texsubimage(struct intel_context *intel,
return GL_FALSE;
}
- intelFlush(ctx);
+ intel_glFlush(ctx);
LOCK_HARDWARE(intel);
{
GLuint image_offset = intel_miptree_image_offset(intelImage->mt,
@@ -155,6 +155,7 @@ do_copy_texsubimage(struct intel_context *intel,
}
UNLOCK_HARDWARE(intel);
+ intel_glFlush(ctx);
/* GL_SGIS_generate_mipmap */
if (intelImage->level == texObj->BaseLevel && texObj->GenerateMipmap) {
commit 88ce34f400e9e0250a5b46d5b58aa8a868b769b5
Author: Eric Anholt <eric@anholt.net>
Date: Tue Feb 3 19:29:11 2009 -0800
swrast: Add support for x8r8g8b8 fbconfig.
This lets swrast produce an fbconfig suitable for the root visual now that
the server's not allowing mismatched fbconfigs.
(cherry picked from commit 529d1d720e1422bad1880ef33fae1c9423112d2e)
diff --git a/src/mesa/drivers/dri/swrast/swrast.c b/src/mesa/drivers/dri/swrast/swrast.c
index 4197603..c7cb3e8 100644
--- a/src/mesa/drivers/dri/swrast/swrast.c
+++ b/src/mesa/drivers/dri/swrast/swrast.c
@@ -166,17 +166,27 @@ swrastFillInModes(__DRIscreen *psp,
depth_buffer_factor = 4;
back_buffer_factor = 2;
- if (pixel_bits == 8) {
+ switch (pixel_bits) {
+ case 8:
fb_format = GL_RGB;
fb_type = GL_UNSIGNED_BYTE_2_3_3_REV;
- }
- else if (pixel_bits == 16) {
+ break;
+ case 16:
fb_format = GL_RGB;
fb_type = GL_UNSIGNED_SHORT_5_6_5;
- }
- else {
+ break;
+ case 24:
+ fb_format = GL_BGR;
+ fb_type = GL_UNSIGNED_INT_8_8_8_8_REV;
+ break;
+ case 32:
fb_format = GL_BGRA;
fb_type = GL_UNSIGNED_INT_8_8_8_8_REV;
+ break;
+ default:
+ fprintf(stderr, "[%s:%u] bad depth %d\n", __func__, __LINE__,
+ pixel_bits);
+ return NULL;
}
configs = driCreateConfigs(fb_format, fb_type,
@@ -198,7 +208,7 @@ driCreateNewScreen(int scrn, const __DRIextension **extensions,
{
static const __DRIextension *emptyExtensionList[] = { NULL };
__DRIscreen *psp;
- __DRIconfig **configs8, **configs16, **configs32;
+ const __DRIconfig **configs8, **configs16, **configs24, **configs32;
(void) data;
@@ -215,11 +225,12 @@ driCreateNewScreen(int scrn, const __DRIextension **extensions,
configs8 = swrastFillInModes(psp, 8, 8, 0, 1);
configs16 = swrastFillInModes(psp, 16, 16, 0, 1);
+ configs24 = swrastFillInModes(psp, 24, 24, 8, 1);
configs32 = swrastFillInModes(psp, 32, 24, 8, 1);
- configs16 = (__DRIconfig **)driConcatConfigs(configs8, configs16);
-
- *driver_configs = driConcatConfigs(configs16, configs32);
+ configs16 = driConcatConfigs(configs8, configs16);
+ configs24 = driConcatConfigs(configs16, configs24);
+ *driver_configs = driConcatConfigs(configs24, configs32);
driInitExtensions( NULL, card_extensions, GL_FALSE );
@@ -251,19 +262,24 @@ static GLuint
choose_pixel_format(const GLvisual *v)
{
if (v->rgbMode) {
- int bpp = v->rgbBits;
+ int depth = v->rgbBits;
- if (bpp == 32
+ if (depth == 32
&& v->redMask == 0xff0000
&& v->greenMask == 0x00ff00
&& v->blueMask == 0x0000ff)
return PF_A8R8G8B8;
- else if (bpp == 16
+ else if (depth == 24
+ && v->redMask == 0xff0000
+ && v->greenMask == 0x00ff00
+ && v->blueMask == 0x0000ff)
+ return PF_X8R8G8B8;
+ else if (depth == 16
&& v->redMask == 0xf800
&& v->greenMask == 0x07e0
&& v->blueMask == 0x001f)
return PF_R5G6B5;
- else if (bpp == 8
+ else if (depth == 8
&& v->redMask == 0x07
&& v->greenMask == 0x38
&& v->blueMask == 0xc0)
@@ -292,7 +308,6 @@ swrast_alloc_front_storage(GLcontext *ctx, struct gl_renderbuffer *rb,
GLenum internalFormat, GLuint width, GLuint height)
{
struct swrast_renderbuffer *xrb = swrast_renderbuffer(rb);
- int bpp;
unsigned mask = PITCH_ALIGN_BITS - 1;
TRACE;
@@ -301,23 +316,8 @@ swrast_alloc_front_storage(GLcontext *ctx, struct gl_renderbuffer *rb,
rb->Width = width;
rb->Height = height;
- switch (internalFormat) {
- case GL_RGB:
- bpp = rb->RedBits + rb->GreenBits + rb->BlueBits;
- break;
- case GL_RGBA:
- bpp = rb->RedBits + rb->GreenBits + rb->BlueBits + rb->AlphaBits;
- break;
- case GL_COLOR_INDEX8_EXT:
- bpp = rb->IndexBits;
- break;
- default:
- _mesa_problem( NULL, "unexpected format in %s", __FUNCTION__ );
- return GL_FALSE;
- }
-
/* always pad to PITCH_ALIGN_BITS */
- xrb->pitch = ((width * bpp + mask) & ~mask) / 8;
+ xrb->pitch = ((width * xrb->bpp + mask) & ~mask) / 8;
return GL_TRUE;
}
@@ -373,6 +373,17 @@ swrast_new_renderbuffer(const GLvisual *visual, GLboolean front)
xrb->Base.GreenBits = 8 * sizeof(GLubyte);
xrb->Base.BlueBits = 8 * sizeof(GLubyte);
xrb->Base.AlphaBits = 8 * sizeof(GLubyte);
+ xrb->bpp = 32;
+ break;
+ case PF_X8R8G8B8:
+ xrb->Base.InternalFormat = GL_RGB;
+ xrb->Base._BaseFormat = GL_RGB;
+ xrb->Base.DataType = GL_UNSIGNED_BYTE;
+ xrb->Base.RedBits = 8 * sizeof(GLubyte);
+ xrb->Base.GreenBits = 8 * sizeof(GLubyte);
+ xrb->Base.BlueBits = 8 * sizeof(GLubyte);
+ xrb->Base.AlphaBits = 0;
+ xrb->bpp = 32;
break;
case PF_R5G6B5:
xrb->Base.InternalFormat = GL_RGB;
@@ -382,6 +393,7 @@ swrast_new_renderbuffer(const GLvisual *visual, GLboolean front)
xrb->Base.GreenBits = 6 * sizeof(GLubyte);
xrb->Base.BlueBits = 5 * sizeof(GLubyte);
xrb->Base.AlphaBits = 0;
+ xrb->bpp = 16;
break;
case PF_R3G3B2:
xrb->Base.InternalFormat = GL_RGB;
@@ -391,12 +403,14 @@ swrast_new_renderbuffer(const GLvisual *visual, GLboolean front)
xrb->Base.GreenBits = 3 * sizeof(GLubyte);
xrb->Base.BlueBits = 2 * sizeof(GLubyte);
xrb->Base.AlphaBits = 0;
+ xrb->bpp = 8;
break;
case PF_CI8:
xrb->Base.InternalFormat = GL_COLOR_INDEX8_EXT;
xrb->Base._BaseFormat = GL_COLOR_INDEX;
xrb->Base.DataType = GL_UNSIGNED_BYTE;
xrb->Base.IndexBits = 8 * sizeof(GLubyte);
+ xrb->bpp = 8;
break;
default:
return NULL;
diff --git a/src/mesa/drivers/dri/swrast/swrast_priv.h b/src/mesa/drivers/dri/swrast/swrast_priv.h
index a707ffc..1a5fb31 100644
--- a/src/mesa/drivers/dri/swrast/swrast_priv.h
+++ b/src/mesa/drivers/dri/swrast/swrast_priv.h
@@ -90,6 +90,8 @@ struct swrast_renderbuffer {
/* renderbuffer pitch (in bytes) */
GLuint pitch;
+ /* bits per pixel of storage */
+ GLuint bpp;
};
static INLINE __DRIcontext *
@@ -115,10 +117,10 @@ swrast_renderbuffer(struct gl_renderbuffer *rb)
* Pixel formats we support
*/
#define PF_CI8 1 /**< Color Index mode */
-#define PF_A8R8G8B8 2 /**< 32-bit TrueColor: 8-A, 8-R, 8-G, 8-B bits */
-#define PF_R5G6B5 3 /**< 16-bit TrueColor: 5-R, 6-G, 5-B bits */
-#define PF_R3G3B2 4 /**< 8-bit TrueColor: 3-R, 3-G, 2-B bits */
-
+#define PF_A8R8G8B8 2 /**< 32bpp TrueColor: 8-A, 8-R, 8-G, 8-B bits */
+#define PF_R5G6B5 3 /**< 16bpp TrueColor: 5-R, 6-G, 5-B bits */
+#define PF_R3G3B2 4 /**< 8bpp TrueColor: 3-R, 3-G, 2-B bits */
+#define PF_X8R8G8B8 5 /**< 32bpp TrueColor: 8-R, 8-G, 8-B bits */
/**
* Renderbuffer pitch alignment (in bits).
diff --git a/src/mesa/drivers/dri/swrast/swrast_span.c b/src/mesa/drivers/dri/swrast/swrast_span.c
index 5e99036..2d3c25d 100644
--- a/src/mesa/drivers/dri/swrast/swrast_span.c
+++ b/src/mesa/drivers/dri/swrast/swrast_span.c
@@ -79,6 +79,24 @@ static const GLubyte kernel[16] = {
DST[BCOMP] = SRC[0]
+/* 32-bit BGRX */
+#define STORE_PIXEL_X8R8G8B8(DST, X, Y, VALUE) \
+ DST[3] = 0xff; \
+ DST[2] = VALUE[RCOMP]; \
+ DST[1] = VALUE[GCOMP]; \
+ DST[0] = VALUE[BCOMP]
+#define STORE_PIXEL_RGB_X8R8G8B8(DST, X, Y, VALUE) \
+ DST[3] = 0xff; \
+ DST[2] = VALUE[RCOMP]; \
+ DST[1] = VALUE[GCOMP]; \
+ DST[0] = VALUE[BCOMP]
+#define FETCH_PIXEL_X8R8G8B8(DST, SRC) \
+ DST[ACOMP] = 0xff; \
+ DST[RCOMP] = SRC[2]; \
+ DST[GCOMP] = SRC[1]; \
+ DST[BCOMP] = SRC[0]
+
+
/* 16-bit BGR */
#define STORE_PIXEL_R5G6B5(DST, X, Y, VALUE) \
do { \
@@ -139,6 +157,24 @@ static const GLubyte kernel[16] = {
#include "swrast/s_spantemp.h"
+/* 32-bit BGRX */
+#define NAME(FUNC) FUNC##_X8R8G8B8
+#define RB_TYPE GLubyte
+#define SPAN_VARS \
+ struct swrast_renderbuffer *xrb = swrast_renderbuffer(rb);
+#define INIT_PIXEL_PTR(P, X, Y) \
+ GLubyte *P = (GLubyte *)xrb->Base.Data + YFLIP(xrb, Y) * xrb->pitch + (X) * 4;
+#define INC_PIXEL_PTR(P) P += 4
+#define STORE_PIXEL(DST, X, Y, VALUE) \
+ STORE_PIXEL_X8R8G8B8(DST, X, Y, VALUE)
+#define STORE_PIXEL_RGB(DST, X, Y, VALUE) \
+ STORE_PIXEL_RGB_X8R8G8B8(DST, X, Y, VALUE)
+#define FETCH_PIXEL(DST, SRC) \
+ FETCH_PIXEL_X8R8G8B8(DST, SRC)
+
+#include "swrast/s_spantemp.h"
+
+
/* 16-bit BGR */
#define NAME(FUNC) FUNC##_R5G6B5
#define RB_TYPE GLubyte
@@ -210,6 +246,24 @@ static const GLubyte kernel[16] = {
#include "swrast_spantemp.h"
+/* 32-bit BGRX */
+#define NAME(FUNC) FUNC##_X8R8G8B8_front
+#define RB_TYPE GLubyte
+#define SPAN_VARS \
+ struct swrast_renderbuffer *xrb = swrast_renderbuffer(rb);
+#define INIT_PIXEL_PTR(P, X, Y) \
+ GLubyte *P = (GLubyte *)row;
+#define INC_PIXEL_PTR(P) P += 4
+#define STORE_PIXEL(DST, X, Y, VALUE) \
+ STORE_PIXEL_X8R8G8B8(DST, X, Y, VALUE)
+#define STORE_PIXEL_RGB(DST, X, Y, VALUE) \
+ STORE_PIXEL_RGB_X8R8G8B8(DST, X, Y, VALUE)
+#define FETCH_PIXEL(DST, SRC) \
+ FETCH_PIXEL_X8R8G8B8(DST, SRC)
+
+#include "swrast_spantemp.h"
+
+
/* 16-bit BGR */
#define NAME(FUNC) FUNC##_R5G6B5_front
#define RB_TYPE GLubyte
@@ -279,6 +333,15 @@ swrast_set_span_funcs_back(struct swrast_renderbuffer *xrb,
xrb->Base.PutValues = put_values_A8R8G8B8;
xrb->Base.PutMonoValues = put_mono_values_A8R8G8B8;
break;
+ case PF_X8R8G8B8:
+ xrb->Base.GetRow = get_row_X8R8G8B8;
+ xrb->Base.GetValues = get_values_X8R8G8B8;
+ xrb->Base.PutRow = put_row_X8R8G8B8;
+ xrb->Base.PutRowRGB = put_row_rgb_X8R8G8B8;
+ xrb->Base.PutMonoRow = put_mono_row_X8R8G8B8;
+ xrb->Base.PutValues = put_values_X8R8G8B8;
+ xrb->Base.PutMonoValues = put_mono_values_X8R8G8B8;
+ break;
case PF_R5G6B5:
xrb->Base.GetRow = get_row_R5G6B5;
xrb->Base.GetValues = get_values_R5G6B5;
@@ -334,6 +397,15 @@ swrast_set_span_funcs_front(struct swrast_renderbuffer *xrb,
xrb->Base.PutValues = put_values_A8R8G8B8_front;
xrb->Base.PutMonoValues = put_mono_values_A8R8G8B8_front;
break;
+ case PF_X8R8G8B8:
+ xrb->Base.GetRow = get_row_X8R8G8B8_front;
+ xrb->Base.GetValues = get_values_X8R8G8B8_front;
+ xrb->Base.PutRow = put_row_X8R8G8B8_front;
+ xrb->Base.PutRowRGB = put_row_rgb_X8R8G8B8_front;
+ xrb->Base.PutMonoRow = put_mono_row_X8R8G8B8_front;
+ xrb->Base.PutValues = put_values_X8R8G8B8_front;
+ xrb->Base.PutMonoValues = put_mono_values_X8R8G8B8_front;
+ break;
case PF_R5G6B5:
xrb->Base.GetRow = get_row_R5G6B5_front;
xrb->Base.GetValues = get_values_R5G6B5_front;
commit f535de8721e4c11872a496414b5001e950ac5577
Author: Ian Romanick <ian.d.romanick@intel.com>
Date: Thu Mar 26 15:32:29 2009 -0700
Mark current bits as 2009Q1-RC2 for Intel driver.
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index bf935f1..20dad52 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -97,7 +97,7 @@ int INTEL_DEBUG = (0);
#include "extension_helper.h"
-#define DRIVER_DATE "20090316 2009Q1 RC1"
+#define DRIVER_DATE "20090326 2009Q1 RC2"
#define DRIVER_DATE_GEM "GEM " DRIVER_DATE
static const GLubyte *
commit 1db913f687146c29b9af4bdc472729ffdc03383c
Author: Eric Anholt <eric@anholt.net>
Date: Mon Mar 23 16:29:31 2009 -0700
i965: Fix glFrontFacing in twoside GLSL demo.
This also cuts instructions by just using the existing bit in the payload
rather than computing it from the determinant in the SF unit and passing it
as a varying down to the WM. Something still goes wrong with getting the
backface color right, but a simpler shader appears to get the right result.
(cherry picked from commit 699db6d842c52d0b3b98b320f8ef1104a65fa783)
diff --git a/src/mesa/drivers/dri/i965/brw_sf_emit.c b/src/mesa/drivers/dri/i965/brw_sf_emit.c
index ffdb0ae..862835f 100644
--- a/src/mesa/drivers/dri/i965/brw_sf_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_sf_emit.c
@@ -59,37 +59,6 @@ static GLboolean have_attr(struct brw_sf_compile *c,
return (c->key.attrs & (1<<attr)) ? 1 : 0;
}
-/**
- * Sets VERT_RESULT_FOGC.Y for gl_FrontFacing
- *
- * This is currently executed if the fragment program uses VERT_RESULT_FOGC
- * at all, but this could be eliminated with a scan of the FP contents.
- */
-static void
-do_front_facing( struct brw_sf_compile *c )
-{
- struct brw_compile *p = &c->func;
- int i;
-
- if (!have_attr(c, VERT_RESULT_FOGC))
- return;
-
- brw_push_insn_state(p);
- brw_CMP(p, brw_null_reg(),
- c->key.frontface_ccw ? BRW_CONDITIONAL_G : BRW_CONDITIONAL_L,
- c->det, brw_imm_f(0));
- brw_set_predicate_control(p, BRW_PREDICATE_NONE);
- for (i = 0; i < 3; i++) {
- struct brw_reg fogc = get_vert_attr(c, c->vert[i],FRAG_ATTRIB_FOGC);
- brw_MOV(p, get_element(fogc, 1), brw_imm_f(0));
- brw_set_predicate_control(p, BRW_PREDICATE_NORMAL);
- brw_MOV(p, get_element(fogc, 1), brw_imm_f(1));
- brw_set_predicate_control(p, BRW_PREDICATE_NONE);
- }
- brw_pop_insn_state(p);
-}
-
-
/***********************************************************************
* Twoside lighting
*/
@@ -384,7 +353,6 @@ void brw_emit_tri_setup( struct brw_sf_compile *c, GLboolean allocate)
invert_det(c);
copy_z_inv_w(c);
- do_front_facing(c);
if (c->key.do_twoside_color)
do_twoside_color(c);
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
index 655358b..c6791da 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -40,6 +40,8 @@
GLuint brw_wm_nr_args( GLuint opcode )
{
switch (opcode) {
+ case WM_FRONTFACING:
+ return 0;
case WM_PIXELXY:
case WM_CINTERP:
case WM_WPOSXY:
diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h
index 13e4ebf..3cbdf81 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.h
+++ b/src/mesa/drivers/dri/i965/brw_wm.h
@@ -172,7 +172,8 @@ struct brw_wm_instruction {
#define WM_CINTERP (MAX_OPCODE + 5)
#define WM_WPOSXY (MAX_OPCODE + 6)
#define WM_FB_WRITE (MAX_OPCODE + 7)
-#define MAX_WM_OPCODE (MAX_OPCODE + 8)
+#define WM_FRONTFACING (MAX_OPCODE + 8)
+#define MAX_WM_OPCODE (MAX_OPCODE + 9)
#define PROGRAM_PAYLOAD (PROGRAM_FILE_MAX)
#define PAYLOAD_DEPTH (FRAG_ATTRIB_MAX)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_debug.c b/src/mesa/drivers/dri/i965/brw_wm_debug.c
index 8f07f89..2208210 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_debug.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_debug.c
@@ -130,6 +130,9 @@ void brw_wm_print_insn( struct brw_wm_compile *c,
case WM_FB_WRITE:
_mesa_printf(" = FB_WRITE");
break;
+ case WM_FRONTFACING:
+ _mesa_printf(" = FRONTFACING");
+ break;
default:
_mesa_printf(" = %s", _mesa_opcode_string(inst->opcode));
break;
diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c
index b5050a3..bc8e8c9 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c
@@ -254,6 +254,34 @@ static void emit_cinterp( struct brw_compile *p,
}
}
+/* Sets the destination channels to 1.0 or 0.0 according to glFrontFacing. */
+static void emit_frontfacing( struct brw_compile *p,
+ const struct brw_reg *dst,
+ GLuint mask )
+{
+ struct brw_reg r1_6ud = retype(brw_vec1_grf(1, 6), BRW_REGISTER_TYPE_UD);
+ GLuint i;
+
+ if (!(mask & WRITEMASK_XYZW))
+ return;
+
+ for (i = 0; i < 4; i++) {
+ if (mask & (1<<i)) {
+ brw_MOV(p, dst[i], brw_imm_f(0.0));
+ }
+ }
+
+ /* bit 31 is "primitive is back face", so checking < (1 << 31) gives
+ * us front face
+ */
+ brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_L, r1_6ud, brw_imm_ud(1 << 31));
+ for (i = 0; i < 4; i++) {
+ if (mask & (1<<i)) {
+ brw_MOV(p, dst[i], brw_imm_f(1.0));
+ }
+ }
+ brw_set_predicate_control_flag_value(p, 0xff);
+}
static void emit_alu1( struct brw_compile *p,
struct brw_instruction *(*func)(struct brw_compile *,
@@ -1158,6 +1186,10 @@ void brw_wm_emit( struct brw_wm_compile *c )
emit_fb_write(c, args[0], args[1], args[2], inst->target, inst->eot);
break;
+ case WM_FRONTFACING:
+ emit_frontfacing(p, dst, dst_flags);
+ break;
+
/* Straightforward arithmetic:
*/
case OPCODE_ADD:
diff --git a/src/mesa/drivers/dri/i965/brw_wm_fp.c b/src/mesa/drivers/dri/i965/brw_wm_fp.c
index 3b2883d..7ebe5b9 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_fp.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_fp.c
@@ -58,7 +58,8 @@ static const char *wm_opcode_strings[] = {
"PINTERP",
"CINTERP",
"WPOSXY",
- "FB_WRITE"
+ "FB_WRITE",
+ "FRONTFACING",
};
#if 0
@@ -377,12 +378,12 @@ static void emit_interp( struct brw_wm_compile *c,
/* Move the front facing value into FOGC.y if it's needed. */
if (c->fp->program.UsesFrontFacing) {
emit_op(c,
- WM_PINTERP,
+ WM_FRONTFACING,
dst_mask(dst, WRITEMASK_Y),
0,
- interp,
- deltas,
- get_pixel_w(c));
+ src_undef(),
+ src_undef(),
+ src_undef());
} else {
emit_op(c,
OPCODE_MOV,
diff --git a/src/mesa/drivers/dri/i965/brw_wm_glsl.c b/src/mesa/drivers/dri/i965/brw_wm_glsl.c
index 11f592d..5a5497e 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_glsl.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_glsl.c
@@ -564,6 +564,36 @@ static void emit_pinterp(struct brw_wm_compile *c,
}
}
+/* Sets the destination channels to 1.0 or 0.0 according to glFrontFacing. */
+static void emit_frontfacing(struct brw_wm_compile *c,
+ struct prog_instruction *inst)
+{
+ struct brw_compile *p = &c->func;
+ struct brw_reg r1_6ud = retype(brw_vec1_grf(1, 6), BRW_REGISTER_TYPE_UD);
+ struct brw_reg dst;
+ GLuint mask = inst->DstReg.WriteMask;
+ int i;
+
+ for (i = 0; i < 4; i++) {
+ if (mask & (1<<i)) {
+ dst = get_dst_reg(c, inst, i, 1);
+ brw_MOV(p, dst, brw_imm_f(0.0));
+ }
+ }
+
+ /* bit 31 is "primitive is back face", so checking < (1 << 31) gives
+ * us front face
+ */
+ brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_L, r1_6ud, brw_imm_ud(1 << 31));
+ for (i = 0; i < 4; i++) {
+ if (mask & (1<<i)) {
+ dst = get_dst_reg(c, inst, i, 1);
+ brw_MOV(p, dst, brw_imm_f(1.0));
+ }
+ }
+ brw_set_predicate_control_flag_value(p, 0xff);
+}
+
static void emit_xpd(struct brw_wm_compile *c,
struct prog_instruction *inst)
{
@@ -2342,6 +2372,9 @@ static void brw_wm_emit_glsl(struct brw_context *brw, struct brw_wm_compile *c)
case WM_FB_WRITE:
emit_fb_write(c, inst);
break;
+ case WM_FRONTFACING:
+ emit_frontfacing(c, inst);
+ break;
case OPCODE_ABS:
emit_abs(c, inst);
break;
diff --git a/src/mesa/drivers/dri/i965/brw_wm_pass1.c b/src/mesa/drivers/dri/i965/brw_wm_pass1.c
index f6f3a38..a1fea6f 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_pass1.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_pass1.c
@@ -260,6 +260,7 @@ void brw_wm_pass1( struct brw_wm_compile *c )
case OPCODE_DST:
case OPCODE_TXP:
+ case WM_FRONTFACING:
default:
break;
}
commit 0e5d1f43af953ee344777ce67a2e87544f481302
Author: Eric Anholt <eric@anholt.net>
Date: Mon Mar 23 22:35:03 2009 -0700
i965: Fix fog coordinate g,b,a values when glFrontFacing isn't used.
Previously, we would sample (f,glFrontFacing,undef,undef) instead of the
(f,0,0,1) that fragment.fogcoord is supposed to return. Due to
glFrontFacing's presence in FOGC.y, we'll still give bad results there when
glFrontFacing is used.
Bug #19122, piglit testcase fp-fog.
(cherry picked from commit 411d913ccea362dbd75411266d7abb685214ee93)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_fp.c b/src/mesa/drivers/dri/i965/brw_wm_fp.c
index de867d6..3b2883d 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_fp.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_fp.c
@@ -356,6 +356,56 @@ static void emit_interp( struct brw_wm_compile *c,
src_undef());
}
break;
+ case FRAG_ATTRIB_FOGC:
+ /* The FOGC input is really special. When a program uses glFogFragCoord,
+ * the results returned are supposed to be (f,0,0,1). But for Mesa GLSL,
+ * the glFrontFacing and glPointCoord values are also stashed in FOGC.
+ * So, write the interpolated fog value to X, then either 0, 1, or the
+ * stashed values to Y, Z, W. Note that this means that
+ * glFogFragCoord.yzw can be wrong in those cases!
+ */
+
+ /* Interpolate the fog coordinate */
+ emit_op(c,
+ WM_PINTERP,
+ dst_mask(dst, WRITEMASK_X),
+ 0,
+ interp,
+ deltas,
+ get_pixel_w(c));
+
+ /* Move the front facing value into FOGC.y if it's needed. */
+ if (c->fp->program.UsesFrontFacing) {
+ emit_op(c,
+ WM_PINTERP,
+ dst_mask(dst, WRITEMASK_Y),
+ 0,
+ interp,
+ deltas,
+ get_pixel_w(c));
+ } else {
+ emit_op(c,
+ OPCODE_MOV,
+ dst_mask(dst, WRITEMASK_Y),
+ 0,
+ src_swizzle1(interp, SWIZZLE_ZERO),
+ src_undef(),
+ src_undef());
+ }
+
+ /* Should do the PointCoord thing here. */
+ emit_op(c,
+ OPCODE_MOV,
+ dst_mask(dst, WRITEMASK_ZW),
+ 0,
+ src_swizzle(interp,
+ SWIZZLE_ZERO,
+ SWIZZLE_ZERO,
+ SWIZZLE_ZERO,
+ SWIZZLE_ONE),
+ src_undef(),
+ src_undef());
+ break;
default:
emit_op(c,
WM_PINTERP,
commit 09c587ae55fbd0fdec5fddc05b17f272699dc4ed
Author: Eric Anholt <eric@anholt.net>
Date: Mon Mar 23 22:30:12 2009 -0700
i965: Clean up a bit of mess with unneeded variables in emit_interp.
(cherry picked from commit b013f945d8514ed827183a4cbfbc4dccc100704f)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_fp.c b/src/mesa/drivers/dri/i965/brw_wm_fp.c
index 66ea744..de867d6 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_fp.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_fp.c
@@ -306,18 +306,13 @@ static void emit_interp( struct brw_wm_compile *c,
struct prog_dst_register dst = dst_reg(PROGRAM_INPUT, idx);
struct prog_src_register interp = src_reg(PROGRAM_PAYLOAD, idx);
struct prog_src_register deltas = get_delta_xy(c);
- struct prog_src_register arg2;
- GLuint opcode;
-
+
/* Need to use PINTERP on attributes which have been
* multiplied by 1/W in the SF program, and LINTERP on those
* which have not:
*/
switch (idx) {
case FRAG_ATTRIB_WPOS:
- opcode = WM_LINTERP;
- arg2 = src_undef();
-
/* Have to treat wpos.xy specially:
*/
emit_op(c,
@@ -338,7 +333,7 @@ static void emit_interp( struct brw_wm_compile *c,
0,
interp,
deltas,
- arg2);
+ src_undef());
break;
case FRAG_ATTRIB_COL0:
case FRAG_ATTRIB_COL1:
commit 775d8431e9fb3e82ff0186a1b807dcd4e7c23666
Author: Brian Paul <brianp@vmware.com>
Date: Fri Feb 20 12:23:25 2009 -0700
i965: separate emit_op() and emit_tex_op() functions
(cherry picked from commit a79186e29efebed04c927d024b013435e7ff5725)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_fp.c b/src/mesa/drivers/dri/i965/brw_wm_fp.c
index eaef5ab..66ea744 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_fp.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_fp.c
@@ -180,7 +180,7 @@ static struct prog_instruction *emit_insn(struct brw_wm_compile *c,
return inst;
}
-static struct prog_instruction * emit_op(struct brw_wm_compile *c,
+static struct prog_instruction * emit_tex_op(struct brw_wm_compile *c,
GLuint op,
struct prog_dst_register dest,
GLuint saturate,
@@ -206,6 +206,20 @@ static struct prog_instruction * emit_op(struct brw_wm_compile *c,
}
+static struct prog_instruction * emit_op(struct brw_wm_compile *c,
+ GLuint op,
+ struct prog_dst_register dest,
+ GLuint saturate,
+ struct prog_src_register src0,
+ struct prog_src_register src1,
+ struct prog_src_register src2 )
+{
+ return emit_tex_op(c, op, dest, saturate,
+ 0, 0, /* tex unit, target */
+ src0, src1, src2);
+}
+
+
/***********************************************************************
@@ -227,7 +241,7 @@ static struct prog_src_register get_pixel_xy( struct brw_wm_compile *c )
emit_op(c,
WM_PIXELXY,
dst_mask(pixel_xy, WRITEMASK_XY),
- 0, 0, 0,
+ 0,
payload_r0_depth,
src_undef(),
src_undef());
@@ -250,7 +264,7 @@ static struct prog_src_register get_delta_xy( struct brw_wm_compile *c )
emit_op(c,
WM_DELTAXY,
dst_mask(delta_xy, WRITEMASK_XY),
- 0, 0, 0,
+ 0,
pixel_xy,
payload_r0_depth,
src_undef());
@@ -274,7 +288,7 @@ static struct prog_src_register get_pixel_w( struct brw_wm_compile *c )
emit_op(c,
WM_PIXELW,
dst_mask(pixel_w, WRITEMASK_W),
- 0, 0, 0,
+ 0,
interp_wpos,
deltas,
src_undef());
@@ -309,7 +323,7 @@ static void emit_interp( struct brw_wm_compile *c,
emit_op(c,
WM_WPOSXY,
dst_mask(dst, WRITEMASK_XY),
- 0, 0, 0,
+ 0,
get_pixel_xy(c),
src_undef(),
src_undef());
@@ -321,7 +335,7 @@ static void emit_interp( struct brw_wm_compile *c,
emit_op(c,
WM_LINTERP,
dst,
- 0, 0, 0,
+ 0,
interp,
deltas,
arg2);
@@ -332,7 +346,7 @@ static void emit_interp( struct brw_wm_compile *c,
emit_op(c,
WM_CINTERP,
dst,
- 0, 0, 0,
+ 0,
interp,
src_undef(),
src_undef());
@@ -341,7 +355,7 @@ static void emit_interp( struct brw_wm_compile *c,
emit_op(c,
WM_LINTERP,
dst,
- 0, 0, 0,
+ 0,
interp,
deltas,
src_undef());
@@ -351,7 +365,7 @@ static void emit_interp( struct brw_wm_compile *c,
emit_op(c,
WM_PINTERP,
dst,
- 0, 0, 0,
+ 0,
interp,
deltas,
get_pixel_w(c));
@@ -371,7 +385,7 @@ static void emit_ddx( struct brw_wm_compile *c,
emit_op(c,
OPCODE_DDX,
inst->DstReg,
- 0, 0, 0,
+ 0,
interp,
get_pixel_w(c),
src_undef());
@@ -387,7 +401,7 @@ static void emit_ddy( struct brw_wm_compile *c,
emit_op(c,
OPCODE_DDY,
inst->DstReg,
- 0, 0, 0,
+ 0,
interp,
get_pixel_w(c),
src_undef());
@@ -482,7 +496,7 @@ static void precalc_dst( struct brw_wm_compile *c,
emit_op(c,
OPCODE_MUL,
dst_mask(dst, WRITEMASK_Y),
- inst->SaturateMode, 0, 0,
+ inst->SaturateMode,
src0,
src1,
src_undef());
@@ -498,7 +512,7 @@ static void precalc_dst( struct brw_wm_compile *c,
swz = emit_op(c,
OPCODE_SWZ,
dst_mask(dst, WRITEMASK_XZ),
- inst->SaturateMode, 0, 0,
+ inst->SaturateMode,
src_swizzle(src0, SWIZZLE_ONE, z, z, z),
src_undef(),
src_undef());
@@ -511,7 +525,7 @@ static void precalc_dst( struct brw_wm_compile *c,
emit_op(c,
OPCODE_MOV,
dst_mask(dst, WRITEMASK_W),
- inst->SaturateMode, 0, 0,
+ inst->SaturateMode,
src1,
src_undef(),
src_undef());
@@ -533,7 +547,7 @@ static void precalc_lit( struct brw_wm_compile *c,
swz = emit_op(c,
OPCODE_SWZ,
dst_mask(dst, WRITEMASK_XW),
- 0, 0, 0,
+ 0,
src_swizzle1(src0, SWIZZLE_ONE),
src_undef(),
src_undef());
@@ -546,7 +560,7 @@ static void precalc_lit( struct brw_wm_compile *c,
emit_op(c,
OPCODE_LIT,
dst_mask(dst, WRITEMASK_YZ),
- inst->SaturateMode, 0, 0,
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