xserver-xorg-video-ati: Changes to 'upstream-experimental'
configure.ac | 2
man/radeon.man | 42 ++++++++++++-----
src/atombios_crtc.c | 21 +-------
src/atombios_output.c | 46 ++++++++++++++++--
src/legacy_crtc.c | 4 +
src/radeon.h | 3 +
src/radeon_atombios.c | 10 ++++
src/radeon_crtc.c | 2
src/radeon_dri.c | 9 ++-
src/radeon_driver.c | 43 ++++++++++++++++-
src/radeon_exa.c | 10 +++-
src/radeon_exa_render.c | 117 ++++++++++++++++++++++++++----------------------
src/radeon_output.c | 29 ++++++-----
src/radeon_probe.h | 1
14 files changed, 233 insertions(+), 106 deletions(-)
New commits:
commit 0d3d1f1f7b450dabd3ad7d2df26ad1c72709b29b
Author: Alex Deucher <alexdeucher@gmail.com>
Date: Wed Feb 18 17:24:57 2009 -0500
bump for release
diff --git a/configure.ac b/configure.ac
index 8a51171..0523cc0 100644
--- a/configure.ac
+++ b/configure.ac
@@ -22,7 +22,7 @@
AC_PREREQ(2.57)
AC_INIT([xf86-video-ati],
- 6.10.99.99,
+ 6.11.0,
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg],
xf86-video-ati)
commit 76a32f8391317513538dafee49cbb61c0d756356
Author: Alex Deucher <alexdeucher@gmail.com>
Date: Wed Feb 18 16:31:44 2009 -0500
R6xx: Connector quirk for asus board
bug 19943
diff --git a/src/radeon_atombios.c b/src/radeon_atombios.c
index 87e89ba..34bf1dc 100644
--- a/src/radeon_atombios.c
+++ b/src/radeon_atombios.c
@@ -1570,6 +1570,16 @@ static void RADEONApplyATOMQuirks(ScrnInfoPtr pScrn, int index)
(info->BiosConnector[index].ConnectorType == CONNECTOR_HDMI_TYPE_B)) {
info->BiosConnector[index].devices &= ~(ATOM_DEVICE_CRT_SUPPORT);
}
+
+ /* ASUS HD 3600 XT board lists the DVI port as HDMI */
+ if ((info->Chipset == PCI_CHIP_RV635_9598) &&
+ (PCI_SUB_VENDOR_ID(info->PciInfo) == 0x1043) &&
+ (PCI_SUB_DEVICE_ID(info->PciInfo) == 0x01da)) {
+ if (info->BiosConnector[index].ConnectorType == CONNECTOR_HDMI_TYPE_B)
+ info->BiosConnector[index].ConnectorType = CONNECTOR_DVI_D;
+ }
+
+
}
uint32_t
commit 97b8482dba4e99088b59d3ab1396be98a70e823e
Author: Alex Deucher <alexdeucher@gmail.com>
Date: Wed Feb 18 13:27:15 2009 -0500
Set default RMX type to FULL on LVDS
diff --git a/src/radeon_output.c b/src/radeon_output.c
index 113bf67..352519f 100644
--- a/src/radeon_output.c
+++ b/src/radeon_output.c
@@ -1848,7 +1848,10 @@ void RADEONInitConnector(xf86OutputPtr output)
RADEONInfoPtr info = RADEONPTR(pScrn);
RADEONOutputPrivatePtr radeon_output = output->driver_private;
- radeon_output->rmx_type = RMX_OFF;
+ if (radeon_output->devices & (ATOM_DEVICE_LCD_SUPPORT))
+ radeon_output->rmx_type = RMX_FULL;
+ else
+ radeon_output->rmx_type = RMX_OFF;
if (!IS_AVIVO_VARIANT) {
if (radeon_output->devices & (ATOM_DEVICE_CRT2_SUPPORT)) {
commit 7d22b1799b34010d34c3600d6cb02ffe839a0780
Author: Alex Deucher <alexdeucher@gmail.com>
Date: Wed Feb 18 12:55:40 2009 -0500
DCE3.2+: allow output cloning
diff --git a/src/radeon_output.c b/src/radeon_output.c
index 2128dab..113bf67 100644
--- a/src/radeon_output.c
+++ b/src/radeon_output.c
@@ -2469,14 +2469,10 @@ static int
radeon_output_clones (ScrnInfoPtr pScrn, xf86OutputPtr output)
{
RADEONOutputPrivatePtr radeon_output = output->driver_private;
- RADEONInfoPtr info = RADEONPTR(pScrn);
xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR (pScrn);
int o;
int index_mask = 0;
- if (IS_DCE3_VARIANT)
- return index_mask;
-
/* LVDS is too wacky */
if (radeon_output->devices & (ATOM_DEVICE_LCD_SUPPORT))
return index_mask;
commit 1a237a40958c006c56b80850bd77b2ac6c17e030
Author: Alex Deucher <alexdeucher@gmail.com>
Date: Wed Feb 18 11:46:20 2009 -0500
ATOM: reset crtc initialized flag on CloseScreen()
additional fix needed for bug 16781
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 32608a4..32cb307 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -5641,6 +5641,8 @@ static Bool RADEONCloseScreen(int scrnIndex, ScreenPtr pScreen)
{
ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
RADEONInfoPtr info = RADEONPTR(pScrn);
+ xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(pScrn);
+ int i;
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
"RADEONCloseScreen\n");
@@ -5650,6 +5652,13 @@ static Bool RADEONCloseScreen(int scrnIndex, ScreenPtr pScreen)
*/
info->accelOn = FALSE;
+ for (i = 0; i < config->num_crtc; i++) {
+ xf86CrtcPtr crtc = config->crtc[i];
+ RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
+
+ radeon_crtc->initialized = FALSE;
+ }
+
#ifdef XF86DRI
#ifdef DAMAGE
if (info->dri && info->dri->pDamage) {
commit 9a108f0a0b7203458673ce6221e747a166d39617
Author: Alex Deucher <alexdeucher@gmail.com>
Date: Tue Feb 17 19:52:27 2009 -0500
ATOM: don't unblank uninitialized crtcs
If the crtc timing isn't setup, you might get stuck in a loop
in the BlankCRTC command table
fixes bug 16781
diff --git a/src/atombios_crtc.c b/src/atombios_crtc.c
index 432cebe..5c26ef8 100644
--- a/src/atombios_crtc.c
+++ b/src/atombios_crtc.c
@@ -491,6 +491,8 @@ atombios_crtc_mode_set(xf86CrtcPtr crtc,
if (info->DispPriority)
RADEONInitDispBandwidth(pScrn);
+ radeon_crtc->initialized = TRUE;
+
if (tilingChanged) {
/* need to redraw front buffer, I guess this can be considered a hack ? */
/* if this is called during ScreenInit() we don't have pScrn->pScreen yet */
diff --git a/src/legacy_crtc.c b/src/legacy_crtc.c
index cba1b5f..b8c5380 100644
--- a/src/legacy_crtc.c
+++ b/src/legacy_crtc.c
@@ -1832,7 +1832,9 @@ legacy_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
radeon_update_tv_routing(pScrn, info->ModeReg);
if (info->DispPriority)
- RADEONInitDispBandwidth(pScrn);
+ RADEONInitDispBandwidth(pScrn);
+
+ radeon_crtc->initialized = TRUE;
if (tilingChanged) {
/* need to redraw front buffer, I guess this can be considered a hack ? */
diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c
index e0875a4..5a7c730 100644
--- a/src/radeon_crtc.c
+++ b/src/radeon_crtc.c
@@ -609,6 +609,7 @@ Bool RADEONAllocateControllers(ScrnInfoPtr pScrn, int mask)
pRADEONEnt->pCrtc[0]->driver_private = pRADEONEnt->Controller[0];
pRADEONEnt->Controller[0]->crtc_id = 0;
pRADEONEnt->Controller[0]->crtc_offset = 0;
+ pRADEONEnt->Controller[0]->initialized = FALSE;
if (info->allowColorTiling)
pRADEONEnt->Controller[0]->can_tile = 1;
else
@@ -633,6 +634,7 @@ Bool RADEONAllocateControllers(ScrnInfoPtr pScrn, int mask)
pRADEONEnt->pCrtc[1]->driver_private = pRADEONEnt->Controller[1];
pRADEONEnt->Controller[1]->crtc_id = 1;
pRADEONEnt->Controller[1]->crtc_offset = AVIVO_D2CRTC_H_TOTAL - AVIVO_D1CRTC_H_TOTAL;
+ pRADEONEnt->Controller[1]->initialized = FALSE;
if (info->allowColorTiling)
pRADEONEnt->Controller[1]->can_tile = 1;
else
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index d22db58..32608a4 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -5601,18 +5601,24 @@ void RADEONLeaveVT(int scrnIndex, int flags)
}
#endif
-#ifndef HAVE_FREE_SHADOW
+
for (i = 0; i < config->num_crtc; i++) {
xf86CrtcPtr crtc = config->crtc[i];
+ RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
+ radeon_crtc->initialized = FALSE;
+
+#ifndef HAVE_FREE_SHADOW
if (crtc->rotatedPixmap || crtc->rotatedData) {
crtc->funcs->shadow_destroy(crtc, crtc->rotatedPixmap,
crtc->rotatedData);
crtc->rotatedPixmap = NULL;
crtc->rotatedData = NULL;
}
+#endif
}
-#else
+
+#ifdef HAVE_FREE_SHADOW
xf86RotateFreeShadow(pScrn);
#endif
diff --git a/src/radeon_output.c b/src/radeon_output.c
index ba4cb7f..2128dab 100644
--- a/src/radeon_output.c
+++ b/src/radeon_output.c
@@ -510,10 +510,12 @@ radeon_mode_prepare(xf86OutputPtr output)
xf86CrtcPtr other_crtc = loop_output->crtc;
RADEONCrtcPrivatePtr other_radeon_crtc = other_crtc->driver_private;
if (other_crtc->enabled) {
- radeon_crtc_dpms(other_crtc, DPMSModeOff);
- if (IS_AVIVO_VARIANT)
- atombios_lock_crtc(info->atomBIOS, other_radeon_crtc->crtc_id, 1);
- radeon_dpms(loop_output, DPMSModeOff);
+ if (other_radeon_crtc->initialized) {
+ radeon_crtc_dpms(other_crtc, DPMSModeOff);
+ if (IS_AVIVO_VARIANT)
+ atombios_lock_crtc(info->atomBIOS, other_radeon_crtc->crtc_id, 1);
+ radeon_dpms(loop_output, DPMSModeOff);
+ }
}
}
}
@@ -553,10 +555,12 @@ radeon_mode_commit(xf86OutputPtr output)
xf86CrtcPtr other_crtc = loop_output->crtc;
RADEONCrtcPrivatePtr other_radeon_crtc = other_crtc->driver_private;
if (other_crtc->enabled) {
- radeon_crtc_dpms(other_crtc, DPMSModeOn);
- if (IS_AVIVO_VARIANT)
- atombios_lock_crtc(info->atomBIOS, other_radeon_crtc->crtc_id, 0);
- radeon_dpms(loop_output, DPMSModeOn);
+ if (other_radeon_crtc->initialized) {
+ radeon_crtc_dpms(other_crtc, DPMSModeOn);
+ if (IS_AVIVO_VARIANT)
+ atombios_lock_crtc(info->atomBIOS, other_radeon_crtc->crtc_id, 0);
+ radeon_dpms(loop_output, DPMSModeOn);
+ }
}
}
}
diff --git a/src/radeon_probe.h b/src/radeon_probe.h
index 1b6ed7b..447ef57 100644
--- a/src/radeon_probe.h
+++ b/src/radeon_probe.h
@@ -157,6 +157,7 @@ typedef struct _RADEONCrtcPrivateRec {
uint32_t crtc_offset;
int can_tile;
Bool enabled;
+ Bool initialized;
} RADEONCrtcPrivateRec, *RADEONCrtcPrivatePtr;
typedef struct _radeon_encoder {
commit 31bd6d28dd35021e0e706d4f094989deb856c26a
Author: Alex Deucher <alexdeucher@gmail.com>
Date: Tue Feb 17 11:24:02 2009 -0500
Fix crtc routing on pre-DCE3.2 systems
This should fix peterz and bug 20074
diff --git a/src/atombios_output.c b/src/atombios_output.c
index fa986c4..c4baa13 100644
--- a/src/atombios_output.c
+++ b/src/atombios_output.c
@@ -1267,7 +1267,43 @@ atombios_set_output_crtc_source(xf86OutputPtr output)
case 1:
default:
crtc_src_param.ucCRTC = radeon_crtc->crtc_id;
- crtc_src_param.ucDevice = radeon_get_device_index(radeon_output->active_device);
+ switch (radeon_encoder->encoder_id) {
+ case ENCODER_OBJECT_ID_INTERNAL_TMDS1:
+ case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
+ crtc_src_param.ucDevice = ATOM_DEVICE_DFP1_INDEX;
+ break;
+ case ENCODER_OBJECT_ID_INTERNAL_LVDS:
+ case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
+ case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
+ if (radeon_output->active_device & ATOM_DEVICE_LCD1_SUPPORT)
+ crtc_src_param.ucDevice = ATOM_DEVICE_LCD1_INDEX;
+ else
+ crtc_src_param.ucDevice = ATOM_DEVICE_DFP3_INDEX;
+ break;
+ case ENCODER_OBJECT_ID_INTERNAL_DVO1:
+ case ENCODER_OBJECT_ID_INTERNAL_DDI:
+ case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1:
+ crtc_src_param.ucDevice = ATOM_DEVICE_DFP2_INDEX;
+ break;
+ case ENCODER_OBJECT_ID_INTERNAL_DAC1:
+ case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1:
+ if (radeon_output->active_device & (ATOM_DEVICE_TV_SUPPORT))
+ crtc_src_param.ucDevice = ATOM_DEVICE_TV1_INDEX;
+ else if (radeon_output->active_device & (ATOM_DEVICE_CV_SUPPORT))
+ crtc_src_param.ucDevice = ATOM_DEVICE_CV_INDEX;
+ else
+ crtc_src_param.ucDevice = ATOM_DEVICE_CRT1_INDEX;
+ break;
+ case ENCODER_OBJECT_ID_INTERNAL_DAC2:
+ case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2:
+ if (radeon_output->active_device & (ATOM_DEVICE_TV_SUPPORT))
+ crtc_src_param.ucDevice = ATOM_DEVICE_TV1_INDEX;
+ else if (radeon_output->active_device & (ATOM_DEVICE_CV_SUPPORT))
+ crtc_src_param.ucDevice = ATOM_DEVICE_CV_INDEX;
+ else
+ crtc_src_param.ucDevice = ATOM_DEVICE_CRT2_INDEX;
+ break;
+ }
data.exec.pspace = &crtc_src_param;
/*ErrorF("device sourced: 0x%x\n", crtc_src_param.ucDevice);*/
break;
commit 3c9e00c7f2ed494976713e8f77b729e0d76409db
Author: Alex Deucher <alexdeucher@gmail.com>
Date: Mon Feb 16 16:18:42 2009 -0500
RV350: add another AGP quirk
diff --git a/src/radeon_dri.c b/src/radeon_dri.c
index 2e4ef69..59d9a83 100644
--- a/src/radeon_dri.c
+++ b/src/radeon_dri.c
@@ -736,6 +736,8 @@ typedef struct {
/* Keep sorted by hostbridge vendor and device */
static radeon_agpmode_quirk radeon_agpmode_quirk_list[] = {
+ /* Intel E7505 Memory Controller Hub / RV350 AR [Radeon 9600XT] Needs AGPMode 4 (deb #515326) */
+ { PCI_VENDOR_INTEL,0x2550, PCI_VENDOR_ATI,0x4152, 0x1458,0x4038, 4 },
/* Intel 82865G/PE/P DRAM Controller/Host-Hub / Mobility 9800 Needs AGPMode 4 (deb #462590) */
{ PCI_VENDOR_INTEL,0x2570, PCI_VENDOR_ATI,0x4a4e, PCI_VENDOR_DELL,0x5106, 4 },
/* Intel 82855PM Processor to I/O Controller / Mobility M6 LY Needs AGPMode 1 (deb #467235) */
commit 036a17bec5dabbb91640b907811da060dac154d6
Author: Alex Deucher <alexdeucher@gmail.com>
Date: Mon Feb 16 13:10:45 2009 -0500
RV280: add another agp quirk
diff --git a/src/radeon_dri.c b/src/radeon_dri.c
index 7cf4d39..2e4ef69 100644
--- a/src/radeon_dri.c
+++ b/src/radeon_dri.c
@@ -768,6 +768,8 @@ static radeon_agpmode_quirk radeon_agpmode_quirk_list[] = {
{ 0x1106,0x3189, PCI_VENDOR_ATI,0x5964, 0x148c,0x2073, 4 },
/* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 */
{ 0x1106,0x0691, PCI_VENDOR_ATI,0x5960, 0x1043,0x0054, 2 },
+ /* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 (deb #515512) */
+ { 0x1106,0x0691, PCI_VENDOR_ATI,0x5960, 0x1043,0x004c, 2 },
/* VIA K8M800 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (fdo #12544) */
{ 0x1106,0x0204, PCI_VENDOR_ATI,0x5960, 0x17af,0x2020, 4 },
/* VIA KT880 Host Bridge / RV350 [Radeon 9550] Needs AGPMode 4 (fdo #19981) */
commit 00ac9d2f8d58725d0d3e6b1bf7f728d9ae7e6109
Author: David Miller <davem@davemloft.net>
Date: Sun Feb 15 18:26:14 2009 +1000
GART: Save/restore GART table consistently.
Always save the GART table with the RADEON_SURFACE_CNTL register
zero'd out to make sure we always use the same endinanness.
fixed up as per Michel's suggestion for endianness.
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Dave Airlie <airlied@linux.ie>
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 813b25e..d22db58 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -5511,8 +5511,17 @@ Bool RADEONEnterVT(int scrnIndex, int flags)
if (info->cardType == CARD_PCIE &&
info->dri->pKernelDRMVersion->version_minor >= 19 &&
info->FbSecureSize) {
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+ unsigned char *RADEONMMIO = info->MMIO;
+ unsigned int sctrl = INREG(RADEON_SURFACE_CNTL);
+
/* we need to backup the PCIE GART TABLE from fb memory */
+ OUTREG(RADEON_SURFACE_CNTL, 0);
+#endif
memcpy(info->FB + info->dri->pciGartOffset, info->dri->pciGartBackup, info->dri->pciGartSize);
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+ OUTREG(RADEON_SURFACE_CNTL, sctrl);
+#endif
}
/* get the DRI back into shape after resume */
@@ -5562,8 +5571,17 @@ void RADEONLeaveVT(int scrnIndex, int flags)
if (info->cardType == CARD_PCIE &&
info->dri->pKernelDRMVersion->version_minor >= 19 &&
info->FbSecureSize) {
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+ unsigned char *RADEONMMIO = info->MMIO;
+ unsigned int sctrl = INREG(RADEON_SURFACE_CNTL);
+
/* we need to backup the PCIE GART TABLE from fb memory */
+ OUTREG(RADEON_SURFACE_CNTL, 0);
+#endif
memcpy(info->dri->pciGartBackup, (info->FB + info->dri->pciGartOffset), info->dri->pciGartSize);
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+ OUTREG(RADEON_SURFACE_CNTL, sctrl);
+#endif
}
/* Make sure 3D clients will re-upload textures to video RAM */
commit 2de90c8349409eb892edc57fd24b61b679eb7719
Author: David Miller <davem@davemloft.net>
Date: Sun Feb 15 18:24:01 2009 +1000
DRI: Fix page size used in RADEONDRIGetPciAperTableSize().
The ATI GART has a fixed size of 4096 bytes. So using
the system page size here is wrong.
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Dave Airlie <airlied@linux.ie>
diff --git a/src/radeon_dri.c b/src/radeon_dri.c
index 44b3eb6..7cf4d39 100644
--- a/src/radeon_dri.c
+++ b/src/radeon_dri.c
@@ -2295,11 +2295,10 @@ void RADEONDRIAllocatePCIGARTTable(ScreenPtr pScreen)
int RADEONDRIGetPciAperTableSize(ScrnInfoPtr pScrn)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
- int page_size = getpagesize();
int ret_size;
int num_pages;
- num_pages = (info->dri->pciAperSize * 1024 * 1024) / page_size;
+ num_pages = (info->dri->pciAperSize * 1024 * 1024) / 4096;
ret_size = num_pages * sizeof(unsigned int);
commit 3ff1eb7e50fef22adb6280dd7de77c3ecafdb451
Author: Michel Dänzer <daenzer@vmware.com>
Date: Thu Feb 12 19:24:41 2009 +0100
EXA: If making a pixmap offscreen fails, return ~0ULL as texture offset.
This allows AIGLX to fall back to the non-zero-copy code rather than messing up
the 3D driver.
diff --git a/src/radeon_exa.c b/src/radeon_exa.c
index c4bc1bb..2f36d71 100644
--- a/src/radeon_exa.c
+++ b/src/radeon_exa.c
@@ -520,10 +520,16 @@ extern void ExaOffscreenMarkUsed(PixmapPtr);
unsigned long long
RADEONTexOffsetStart(PixmapPtr pPix)
{
+ RINFO_FROM_SCREEN(pPix->drawable.pScreen);
+ unsigned long long offset;
exaMoveInPixmap(pPix);
ExaOffscreenMarkUsed(pPix);
- return RADEONPTR(xf86Screens[pPix->drawable.pScreen->myNum])->fbLocation +
- exaGetPixmapOffset(pPix);
+ offset = exaGetPixmapOffset(pPix);
+
+ if (offset > info->FbMapSize)
+ return ~0ULL;
+ else
+ return info->fbLocation + offset;
}
#endif
commit c19aa4fc8da7ac4745624098b146bcc42c0436dd
Author: Michel Dänzer <daenzer@vmware.com>
Date: Thu Feb 12 19:22:12 2009 +0100
EXA: The source tiling code can't handle RepeatReflect yet.
diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c
index a8d99ec..c44502c 100644
--- a/src/radeon_exa_render.c
+++ b/src/radeon_exa_render.c
@@ -284,7 +284,7 @@ static Bool RADEONSetupSourceTile(PicturePtr pPict,
info->accel_state->need_src_tile_x = info->accel_state->need_src_tile_y = FALSE;
info->accel_state->src_tile_width = info->accel_state->src_tile_height = 65536; /* "infinite" */
- if (pPict->repeat && pPict->repeatType == RepeatNormal) {
+ if (pPict->repeat && pPict->repeatType != RepeatPad) {
Bool badPitch = needMatchingPitch && !RADEONPitchMatches(pPix);
int w = pPict->pDrawable->width;
@@ -297,7 +297,12 @@ static Bool RADEONSetupSourceTile(PicturePtr pPict,
} else {
info->accel_state->need_src_tile_x = (w & (w - 1)) != 0 || badPitch;
info->accel_state->need_src_tile_y = (h & (h - 1)) != 0;
-
+
+ if ((info->accel_state->need_src_tile_x ||
+ info->accel_state->need_src_tile_y) &&
+ pPict->repeatType != RepeatNormal)
+ RADEON_FALLBACK(("Can only tile RepeatNormal at this time\n"));
+
if (!canTile1d)
info->accel_state->need_src_tile_x =
info->accel_state->need_src_tile_y =
commit adc35636aa1e936ec74cba8931ccffe2b5c11656
Author: Alex Deucher <alexdeucher@gmail.com>
Date: Thu Feb 12 13:10:53 2009 -0500
R1xx/R2xx EXA: fix non repeat texture setup
diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c
index a7626dd..a8d99ec 100644
--- a/src/radeon_exa_render.c
+++ b/src/radeon_exa_render.c
@@ -284,7 +284,7 @@ static Bool RADEONSetupSourceTile(PicturePtr pPict,
info->accel_state->need_src_tile_x = info->accel_state->need_src_tile_y = FALSE;
info->accel_state->src_tile_width = info->accel_state->src_tile_height = 65536; /* "infinite" */
- if (pPict->repeatType == RepeatNormal) {
+ if (pPict->repeat && pPict->repeatType == RepeatNormal) {
Bool badPitch = needMatchingPitch && !RADEONPitchMatches(pPix);
int w = pPict->pDrawable->width;
@@ -369,7 +369,7 @@ static Bool FUNC_NAME(R100TextureSetup)(PicturePtr pPict, PixmapPtr pPix,
RADEON_FALLBACK(("Bad texture offset 0x%x\n", (int)txoffset));
if ((txpitch & 0x1f) != 0)
RADEON_FALLBACK(("Bad texture pitch 0x%x\n", (int)txpitch));
-
+
for (i = 0; i < sizeof(R100TexFormats) / sizeof(R100TexFormats[0]); i++)
{
if (R100TexFormats[i].fmt == pPict->format)
@@ -404,19 +404,21 @@ static Bool FUNC_NAME(R100TextureSetup)(PicturePtr pPict, PixmapPtr pPix,
RADEON_FALLBACK(("Bad filter 0x%x\n", pPict->filter));
}
- switch (pPict->repeatType) {
- case RepeatNormal:
- txfilter |= RADEON_CLAMP_S_WRAP | RADEON_CLAMP_T_WRAP;
- break;
- case RepeatPad:
- txfilter |= RADEON_CLAMP_S_CLAMP_LAST | RADEON_CLAMP_T_CLAMP_LAST;
- break;
- case RepeatReflect:
- txfilter |= RADEON_CLAMP_S_MIRROR | RADEON_CLAMP_T_MIRROR;
- break;
- case RepeatNone:
- /* Nothing to do */
- break;
+ if (repeat) {
+ switch (pPict->repeatType) {
+ case RepeatNormal:
+ txfilter |= RADEON_CLAMP_S_WRAP | RADEON_CLAMP_T_WRAP;
+ break;
+ case RepeatPad:
+ txfilter |= RADEON_CLAMP_S_CLAMP_LAST | RADEON_CLAMP_T_CLAMP_LAST;
+ break;
+ case RepeatReflect:
+ txfilter |= RADEON_CLAMP_S_MIRROR | RADEON_CLAMP_T_MIRROR;
+ break;
+ case RepeatNone:
+ /* Nothing to do */
+ break;
+ }
}
BEGIN_ACCEL(5);
@@ -740,19 +742,21 @@ static Bool FUNC_NAME(R200TextureSetup)(PicturePtr pPict, PixmapPtr pPix,
RADEON_FALLBACK(("Bad filter 0x%x\n", pPict->filter));
}
- switch (pPict->repeatType) {
- case RepeatNormal:
- txfilter |= R200_CLAMP_S_WRAP | R200_CLAMP_T_WRAP;
- break;
- case RepeatPad:
- txfilter |= R200_CLAMP_S_CLAMP_LAST | R200_CLAMP_T_CLAMP_LAST;
- break;
- case RepeatReflect:
- txfilter |= R200_CLAMP_S_MIRROR | R200_CLAMP_T_MIRROR;
- break;
- case RepeatNone:
- /* Nothing to do */
- break;
+ if (repeat) {
+ switch (pPict->repeatType) {
+ case RepeatNormal:
+ txfilter |= R200_CLAMP_S_WRAP | R200_CLAMP_T_WRAP;
+ break;
+ case RepeatPad:
+ txfilter |= R200_CLAMP_S_CLAMP_LAST | R200_CLAMP_T_CLAMP_LAST;
+ break;
+ case RepeatReflect:
+ txfilter |= R200_CLAMP_S_MIRROR | R200_CLAMP_T_MIRROR;
+ break;
+ case RepeatNone:
+ /* Nothing to do */
+ break;
+ }
}
BEGIN_ACCEL(6);
commit c6e1bf75c399807716b99486ab3301aeba60fa79
Author: Alex Deucher <alexdeucher@gmail.com>
Date: Thu Feb 12 12:49:24 2009 -0500
R3xx-R5xx EXA: fix texture setup for non-repeat case
fixes bug 19923
diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c
index ceeee49..a7626dd 100644
--- a/src/radeon_exa_render.c
+++ b/src/radeon_exa_render.c
@@ -1088,32 +1088,36 @@ static Bool FUNC_NAME(R300TextureSetup)(PicturePtr pPict, PixmapPtr pPix,
txfilter = (unit << R300_TX_ID_SHIFT);
- switch (pPict->repeatType) {
- case RepeatNormal:
- if (unit != 0 || !info->accel_state->need_src_tile_x)
- txfilter |= R300_TX_CLAMP_S(R300_TX_CLAMP_WRAP);
- else
- txfilter |= R300_TX_CLAMP_S(R300_TX_CLAMP_CLAMP_GL);
+ if (pPict->repeat) {
+ switch (pPict->repeatType) {
+ case RepeatNormal:
+ if (unit != 0 || !info->accel_state->need_src_tile_x)
+ txfilter |= R300_TX_CLAMP_S(R300_TX_CLAMP_WRAP);
+ else
+ txfilter |= R300_TX_CLAMP_S(R300_TX_CLAMP_CLAMP_GL);
- if (unit != 0 || !info->accel_state->need_src_tile_y)
- txfilter |= R300_TX_CLAMP_T(R300_TX_CLAMP_WRAP);
- else
- txfilter |= R300_TX_CLAMP_T(R300_TX_CLAMP_CLAMP_GL);
+ if (unit != 0 || !info->accel_state->need_src_tile_y)
+ txfilter |= R300_TX_CLAMP_T(R300_TX_CLAMP_WRAP);
+ else
+ txfilter |= R300_TX_CLAMP_T(R300_TX_CLAMP_CLAMP_GL);
- break;
- case RepeatPad:
- txfilter |= R300_TX_CLAMP_S(R300_TX_CLAMP_CLAMP_LAST) |
- R300_TX_CLAMP_T(R300_TX_CLAMP_CLAMP_LAST);
- break;
- case RepeatReflect:
- txfilter |= R300_TX_CLAMP_S(R300_TX_CLAMP_MIRROR) |
- R300_TX_CLAMP_T(R300_TX_CLAMP_MIRROR);
- break;
- case RepeatNone:
+ break;
+ case RepeatPad:
+ txfilter |= R300_TX_CLAMP_S(R300_TX_CLAMP_CLAMP_LAST) |
+ R300_TX_CLAMP_T(R300_TX_CLAMP_CLAMP_LAST);
+ break;
+ case RepeatReflect:
+ txfilter |= R300_TX_CLAMP_S(R300_TX_CLAMP_MIRROR) |
+ R300_TX_CLAMP_T(R300_TX_CLAMP_MIRROR);
+ break;
+ case RepeatNone:
+ txfilter |= R300_TX_CLAMP_S(R300_TX_CLAMP_CLAMP_GL) |
+ R300_TX_CLAMP_T(R300_TX_CLAMP_CLAMP_GL);
+ break;
+ }
+ } else
txfilter |= R300_TX_CLAMP_S(R300_TX_CLAMP_CLAMP_GL) |
- R300_TX_CLAMP_T(R300_TX_CLAMP_CLAMP_GL);
- break;
- }
+ R300_TX_CLAMP_T(R300_TX_CLAMP_CLAMP_GL);
switch (pPict->filter) {
case PictFilterNearest:
commit 0804dde9012cf33f614a1c2ee6d5d0def040a9af
Author: Alex Deucher <alexdeucher@gmail.com>
Date: Thu Feb 12 12:02:57 2009 -0500
AVIVO: fix dualhead/rotation for real
diff --git a/src/atombios_crtc.c b/src/atombios_crtc.c
index e79ba13..432cebe 100644
--- a/src/atombios_crtc.c
+++ b/src/atombios_crtc.c
@@ -455,23 +455,6 @@ atombios_crtc_mode_set(xf86CrtcPtr crtc,
x = 0;
y = 0;
fb_location = fb_location + (char *)crtc->rotatedData - (char *)info->FB;
- switch (crtc->rotation) {
- case RR_Rotate_0:
- case RR_Rotate_180:
- OUTREG(AVIVO_D1GRPH_X_END + radeon_crtc->crtc_offset, pScrn->virtualX);
- OUTREG(AVIVO_D1GRPH_Y_END + radeon_crtc->crtc_offset, pScrn->virtualY);
- default:
- break;
- case RR_Rotate_90:
- case RR_Rotate_270:
- OUTREG(AVIVO_D1GRPH_X_END + radeon_crtc->crtc_offset, pScrn->virtualY);
- OUTREG(AVIVO_D1GRPH_Y_END + radeon_crtc->crtc_offset, pScrn->virtualX);
- break;
-
- }
- } else {
- OUTREG(AVIVO_D1GRPH_X_END + radeon_crtc->crtc_offset, pScrn->virtualX);
- OUTREG(AVIVO_D1GRPH_Y_END + radeon_crtc->crtc_offset, pScrn->virtualY);
}
OUTREG(AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, fb_location);
@@ -482,6 +465,8 @@ atombios_crtc_mode_set(xf86CrtcPtr crtc,
OUTREG(AVIVO_D1GRPH_SURFACE_OFFSET_Y + radeon_crtc->crtc_offset, 0);
OUTREG(AVIVO_D1GRPH_X_START + radeon_crtc->crtc_offset, 0);
OUTREG(AVIVO_D1GRPH_Y_START + radeon_crtc->crtc_offset, 0);
+ OUTREG(AVIVO_D1GRPH_X_END + radeon_crtc->crtc_offset, info->virtualX);
+ OUTREG(AVIVO_D1GRPH_Y_END + radeon_crtc->crtc_offset, info->virtualY);
OUTREG(AVIVO_D1GRPH_PITCH + radeon_crtc->crtc_offset,
crtc->scrn->displayWidth);
OUTREG(AVIVO_D1GRPH_ENABLE + radeon_crtc->crtc_offset, 1);
diff --git a/src/radeon.h b/src/radeon.h
index 66b2330..2944fe8 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -836,6 +836,9 @@ typedef struct {
/* some server chips have a hardcoded edid in the bios so that they work with KVMs */
Bool get_hardcoded_edid_from_bios;
+ int virtualX;
+ int virtualY;
+
} RADEONInfoRec, *RADEONInfoPtr;
#define RADEONWaitForFifo(pScrn, entries) \
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index b0817b0..813b25e 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -3248,6 +3248,12 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
info->crtc_on = FALSE;
info->crtc2_on = FALSE;
+ /* save the real front buffer size
+ * it changes with randr, rotation, etc.
+ */
+ info->virtualX = pScrn->virtualX;
+ info->virtualY = pScrn->virtualY;
+
RADEONSave(pScrn);
/* set initial bios scratch reg state */
commit d98359b20e1eb8eae893581ab199c299c8352dc4
Author: Alex Deucher <alexdeucher@gmail.com>
Date: Wed Feb 11 12:03:56 2009 -0500
Revert "Radeon EXA: wait for the engine to be idle before sw access"
This reverts commit 0c4694c58f2ec152b19023626bc7ced891d9da65.
This patch just adds latency and thus isn't a real solution
diff --git a/src/radeon.h b/src/radeon.h
index 633385f..66b2330 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -893,7 +893,6 @@ extern void RADEONEngineFlush(ScrnInfoPtr pScrn);
extern void RADEONEngineInit(ScrnInfoPtr pScrn);
extern void RADEONEngineReset(ScrnInfoPtr pScrn);
extern void RADEONEngineRestore(ScrnInfoPtr pScrn);
-extern Bool RADEONWaitforIdlePoll(ScrnInfoPtr pScrn);
extern uint8_t *RADEONHostDataBlit(ScrnInfoPtr pScrn, unsigned int cpp,
unsigned int w, uint32_t dstPitchOff,
uint32_t *bufPitch, int x, int *y,
diff --git a/src/radeon_accel.c b/src/radeon_accel.c
index d2ae2e6..96570e8 100644
--- a/src/radeon_accel.c
+++ b/src/radeon_accel.c
@@ -472,23 +472,6 @@ void RADEONEngineInit(ScrnInfoPtr pScrn)
RADEONEngineRestore(pScrn);
}
-/* really would be better to wait on a timestamp shadowed in memory,
- * but this will do for now.
- */
-Bool
-RADEONWaitforIdlePoll(ScrnInfoPtr pScrn)
-{
- RADEONInfoPtr info = RADEONPTR(pScrn);
- unsigned char *RADEONMMIO = info->MMIO;
- uint32_t i;
-
- for (i = 0; i < 1000000; i++) {
- if ((INREG(RADEON_RBBM_STATUS) & RADEON_RBBM_ACTIVE) == 0)
- return TRUE;
- }
- return FALSE;
-}
-
#define ACCEL_MMIO
#define ACCEL_PREAMBLE() unsigned char *RADEONMMIO = info->MMIO
@@ -889,8 +872,6 @@ RADEONHostDataBlitCopyPass(
/* RADEONHostDataBlitCopy can return NULL ! */
if( (dst==NULL) || (src==NULL)) return;
- RADEONWaitforIdlePoll(pScrn);
-
if ( dstPitch == srcPitch )
{
#if X_BYTE_ORDER == X_BIG_ENDIAN
diff --git a/src/radeon_exa.c b/src/radeon_exa.c
index ebe65d1..c4bc1bb 100644
--- a/src/radeon_exa.c
+++ b/src/radeon_exa.c
@@ -220,22 +220,17 @@ int RADEONBiggerCrtcArea(PixmapPtr pPix)
}
#if X_BYTE_ORDER == X_BIG_ENDIAN
+
static unsigned long swapper_surfaces[3];
-#endif /* X_BYTE_ORDER == X_BIG_ENDIAN */
static Bool RADEONPrepareAccess(PixmapPtr pPix, int index)
{
RINFO_FROM_SCREEN(pPix->drawable.pScreen);
-#if X_BYTE_ORDER == X_BIG_ENDIAN
unsigned char *RADEONMMIO = info->MMIO;
uint32_t offset = exaGetPixmapOffset(pPix);
int bpp, soff;
uint32_t size, flags;
-#endif /* X_BYTE_ORDER == X_BIG_ENDIAN */
-
- RADEONWaitforIdlePoll(pScrn);
-#if X_BYTE_ORDER == X_BIG_ENDIAN
/* Front buffer is always set with proper swappers */
if (offset == 0)
return TRUE;
@@ -291,13 +286,11 @@ static Bool RADEONPrepareAccess(PixmapPtr pPix, int index)
OUTREG(RADEON_SURFACE0_LOWER_BOUND + soff, offset);
OUTREG(RADEON_SURFACE0_UPPER_BOUND + soff, offset + size - 1);
swapper_surfaces[index] = offset;
-#endif /* X_BYTE_ORDER == X_BIG_ENDIAN */
return TRUE;
}
static void RADEONFinishAccess(PixmapPtr pPix, int index)
{
-#if X_BYTE_ORDER == X_BIG_ENDIAN
RINFO_FROM_SCREEN(pPix->drawable.pScreen);
unsigned char *RADEONMMIO = info->MMIO;
uint32_t offset = exaGetPixmapOffset(pPix);
@@ -325,9 +318,9 @@ static void RADEONFinishAccess(PixmapPtr pPix, int index)
OUTREG(RADEON_SURFACE0_LOWER_BOUND + soff, 0);
OUTREG(RADEON_SURFACE0_UPPER_BOUND + soff, 0);
swapper_surfaces[index] = 0;
-#endif /* X_BYTE_ORDER == X_BIG_ENDIAN */
}
+#endif /* X_BYTE_ORDER == X_BIG_ENDIAN */
#define ENTER_DRAW(x) TRACE
#define LEAVE_DRAW(x) TRACE
diff --git a/src/radeon_exa_funcs.c b/src/radeon_exa_funcs.c
index eb714ab..cd97cc6 100644
--- a/src/radeon_exa_funcs.c
+++ b/src/radeon_exa_funcs.c
@@ -408,8 +408,6 @@ RADEONDownloadFromScreenCP(PixmapPtr pSrc, int x, int y, int w, int h,
while ((drmCommandNone(info->dri->drmFD, DRM_RADEON_CP_IDLE) == -EBUSY)
&& (i++ < RADEON_TIMEOUT))
;
- /* make sure the engine is idle */
- RADEONWaitforIdlePoll(pScrn);
/* Kick next blit */
if (hpass)
@@ -472,8 +470,10 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen)
info->accel_state->exa->DownloadFromScreen = RADEONDownloadFromScreenCP;
#endif
+#if X_BYTE_ORDER == X_BIG_ENDIAN
info->accel_state->exa->PrepareAccess = RADEONPrepareAccess;
info->accel_state->exa->FinishAccess = RADEONFinishAccess;
+#endif /* X_BYTE_ORDER == X_BIG_ENDIAN */
info->accel_state->exa->flags = EXA_OFFSCREEN_PIXMAPS;
info->accel_state->exa->pixmapOffsetAlign = RADEON_BUFFER_ALIGN + 1;
commit 0c4694c58f2ec152b19023626bc7ced891d9da65
Author: Alex Deucher <alexdeucher@gmail.com>
Date: Tue Feb 10 17:08:37 2009 -0500
Radeon EXA: wait for the engine to be idle before sw access
Really we need proper fencing with timestamps but this should
help in the short term.
This should help with minor corruption issues and possibly
lockups.
diff --git a/src/radeon.h b/src/radeon.h
index 66b2330..633385f 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -893,6 +893,7 @@ extern void RADEONEngineFlush(ScrnInfoPtr pScrn);
extern void RADEONEngineInit(ScrnInfoPtr pScrn);
extern void RADEONEngineReset(ScrnInfoPtr pScrn);
extern void RADEONEngineRestore(ScrnInfoPtr pScrn);
+extern Bool RADEONWaitforIdlePoll(ScrnInfoPtr pScrn);
extern uint8_t *RADEONHostDataBlit(ScrnInfoPtr pScrn, unsigned int cpp,
unsigned int w, uint32_t dstPitchOff,
uint32_t *bufPitch, int x, int *y,
diff --git a/src/radeon_accel.c b/src/radeon_accel.c
index 96570e8..d2ae2e6 100644
--- a/src/radeon_accel.c
+++ b/src/radeon_accel.c
@@ -472,6 +472,23 @@ void RADEONEngineInit(ScrnInfoPtr pScrn)
RADEONEngineRestore(pScrn);
}
+/* really would be better to wait on a timestamp shadowed in memory,
+ * but this will do for now.
+ */
+Bool
+RADEONWaitforIdlePoll(ScrnInfoPtr pScrn)
+{
+ RADEONInfoPtr info = RADEONPTR(pScrn);
+ unsigned char *RADEONMMIO = info->MMIO;
+ uint32_t i;
+
+ for (i = 0; i < 1000000; i++) {
+ if ((INREG(RADEON_RBBM_STATUS) & RADEON_RBBM_ACTIVE) == 0)
+ return TRUE;
+ }
+ return FALSE;
+}
+
#define ACCEL_MMIO
#define ACCEL_PREAMBLE() unsigned char *RADEONMMIO = info->MMIO
@@ -872,6 +889,8 @@ RADEONHostDataBlitCopyPass(
/* RADEONHostDataBlitCopy can return NULL ! */
if( (dst==NULL) || (src==NULL)) return;
+ RADEONWaitforIdlePoll(pScrn);
+
if ( dstPitch == srcPitch )
{
#if X_BYTE_ORDER == X_BIG_ENDIAN
diff --git a/src/radeon_exa.c b/src/radeon_exa.c
index c4bc1bb..ebe65d1 100644
--- a/src/radeon_exa.c
+++ b/src/radeon_exa.c
@@ -220,17 +220,22 @@ int RADEONBiggerCrtcArea(PixmapPtr pPix)
}
#if X_BYTE_ORDER == X_BIG_ENDIAN
-
static unsigned long swapper_surfaces[3];
+#endif /* X_BYTE_ORDER == X_BIG_ENDIAN */
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