xserver-xorg-video-nv: Changes to 'upstream-experimental'
Rebased ref, commits from common ancestor:
commit 27e2a98531e8b190a73d126508400283e0fb02df
Author: Aaron Plattner <aplattner@nvidia.com>
Date: Thu Aug 28 11:19:04 2008 -0700
Bump to 2.1.12.
diff --git a/configure.ac b/configure.ac
index 5ca7478..c87b553 100644
--- a/configure.ac
+++ b/configure.ac
@@ -22,7 +22,7 @@
AC_PREREQ(2.57)
AC_INIT([xf86-video-nv],
- 2.1.11,
+ 2.1.12,
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg],
xf86-video-nv)
commit 75bcdc7ab1f3a4b715aad96e9739bedf4bc33321
Author: Aaron Plattner <aplattner@nvidia.com>
Date: Thu Aug 28 11:18:29 2008 -0700
G80: Fix a CPUToScreenColorExpandFill bug introduced by commit 2e0416c.
diff --git a/src/g80_xaa.c b/src/g80_xaa.c
index 0a3c1b3..ce21899 100644
--- a/src/g80_xaa.c
+++ b/src/g80_xaa.c
@@ -275,7 +275,7 @@ G80SetupForScanlineCPUToScreenColorExpandFill(
planemask |= mask;
G80DmaStart(pNv, 0x2ac, 1);
- G80DmaNext (pNv, 4);
+ G80DmaNext (pNv, 1);
G80SetRopSolid(pNv, rop, planemask);
G80DmaStart(pNv, 0x800, 1);
G80DmaNext (pNv, 1);
commit c3aa93fa478d78f8d57c5dbfc871eec84f7f7bd2
Author: Aaron Plattner <aplattner@nvidia.com>
Date: Tue Aug 26 22:27:46 2008 -0700
Bump to 2.1.11.
diff --git a/configure.ac b/configure.ac
index 6514aed..5ca7478 100644
--- a/configure.ac
+++ b/configure.ac
@@ -22,7 +22,7 @@
AC_PREREQ(2.57)
AC_INIT([xf86-video-nv],
- 2.1.10,
+ 2.1.11,
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg],
xf86-video-nv)
commit 36af14dfdb1feb4d5d47b1542803f1d292585fdf
Author: Aaron Plattner <aplattner@nvidia.com>
Date: Tue Aug 26 13:47:04 2008 -0700
One more missing GPU name.
diff --git a/src/nv_driver.c b/src/nv_driver.c
index df199bc..831e90b 100644
--- a/src/nv_driver.c
+++ b/src/nv_driver.c
@@ -113,7 +113,7 @@ _X_EXPORT DriverRec NV = {
#endif
};
-/* Known cards as of 2008/08/25 */
+/* Known cards as of 2008/08/26 */
static SymTabRec NVKnownChipsets[] =
{
@@ -412,6 +412,7 @@ static SymTabRec NVKnownChipsets[] =
{ 0x10DE0628, "GeForce 9800M GTS" },
{ 0x10DE062A, "GeForce 9700M GTS" },
{ 0x10DE062C, "GeForce 9800M GTS" },
+ { 0x10DE0640, "GeForce 9500 GT" },
{ 0x10DE0647, "GeForce 9600M GT" },
{ 0x10DE0648, "GeForce 9600M GS" },
{ 0x10DE0649, "GeForce 9600M GT" },
commit 02001d2298dc61dcd904bc149a64147b2dadba9f
Author: Aaron Plattner <aplattner@nvidia.com>
Date: Mon Aug 25 10:31:01 2008 -0700
More chips names.
diff --git a/src/nv_driver.c b/src/nv_driver.c
index b6c7209..df199bc 100644
--- a/src/nv_driver.c
+++ b/src/nv_driver.c
@@ -113,7 +113,7 @@ _X_EXPORT DriverRec NV = {
#endif
};
-/* Known cards as of 2008/06/16 */
+/* Known cards as of 2008/08/25 */
static SymTabRec NVKnownChipsets[] =
{
@@ -363,6 +363,7 @@ static SymTabRec NVKnownChipsets[] =
{ 0x10DE0400, "GeForce 8600 GTS" },
{ 0x10DE0401, "GeForce 8600 GT" },
{ 0x10DE0402, "GeForce 8600 GT" },
+ { 0x10DE0403, "GeForce 8600 GS" },
{ 0x10DE0404, "GeForce 8400 GS" },
{ 0x10DE0405, "GeForce 9500M GS" },
{ 0x10DE0407, "GeForce 8600M GT" },
@@ -386,6 +387,7 @@ static SymTabRec NVKnownChipsets[] =
{ 0x10DE0429, "Quadro NVS 140M" },
{ 0x10DE042A, "Quadro NVS 130M" },
{ 0x10DE042B, "Quadro NVS 135M" },
+ { 0x10DE042C, "GeForce 9400 GT" },
{ 0x10DE042D, "Quadro FX 360M" },
{ 0x10DE042E, "GeForce 9300M G" },
{ 0x10DE042F, "Quadro NVS 290" },
@@ -401,17 +403,26 @@ static SymTabRec NVKnownChipsets[] =
{ 0x10DE0610, "GeForce 9600 GSO" },
{ 0x10DE0611, "GeForce 8800 GT" },
{ 0x10DE0612, "GeForce 9800 GTX" },
+ { 0x10DE0613, "GeForce 9800 GTK+" },
+ { 0x10DE0614, "GeForce 9800 GT" },
{ 0x10DE061A, "Quadro FX 3700" },
{ 0x10DE061C, "Quadro FX 3600M" },
{ 0x10DE0622, "GeForce 9600 GT" },
+ { 0x10DE0623, "GeForce 9600 GS" },
+ { 0x10DE0628, "GeForce 9800M GTS" },
+ { 0x10DE062A, "GeForce 9700M GTS" },
+ { 0x10DE062C, "GeForce 9800M GTS" },
{ 0x10DE0647, "GeForce 9600M GT" },
{ 0x10DE0648, "GeForce 9600M GS" },
{ 0x10DE0649, "GeForce 9600M GT" },
{ 0x10DE064B, "GeForce 9500M G" },
+ { 0x10DE06E1, "GeForce 9300 GS" },
{ 0x10DE06E4, "GeForce 8400 GS" },
{ 0x10DE06E5, "GeForce 9300M GS" },
{ 0x10DE06E8, "GeForce 9200M GS" },
{ 0x10DE06E9, "GeForce 9300M GS" },
+ { 0x10DE06EA, "Quadro NVS 150M" },
+ { 0x10DE06EB, "Quadro NVS 160M" },
{-1, NULL}
};
commit 7884f5918715a8df35cd0d7601cb50c7c5b56e70
Author: Aaron Plattner <aplattner@nvidia.com>
Date: Sun Aug 24 00:23:54 2008 -0700
Bug #15309: Set the pixel clock even if the hardware doesn't think it needs it.
Fixes a problem where switching from DVI to VGA hangs.
diff --git a/src/g80_display.c b/src/g80_display.c
index 8b97b8a..cf4631d 100644
--- a/src/g80_display.c
+++ b/src/g80_display.c
@@ -191,15 +191,14 @@ G80DispCommand(ScrnInfoPtr pScrn, CARD32 addr, CARD32 data)
if(super) {
if(super == 2) {
xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
- const CARD32 r = pNv->reg[0x00610030/4];
int i;
for(i = 0; i < xf86_config->num_crtc; i++)
{
xf86CrtcPtr crtc = xf86_config->crtc[i];
- G80CrtcPrivPtr pPriv = crtc->driver_private;
+ const int headOff = 0x800 * G80CrtcGetHead(crtc);
- if(r & (0x200 << pPriv->head))
+ if((pNv->reg[(0x00614200+headOff)/4] & 0xc0) == 0x80)
G80CrtcSetPClk(crtc);
}
}
commit ff32eb25f8edde7343da3d4782f0f59896515ebd
Author: Aaron Plattner <aplattner@nvidia.com>
Date: Sat Aug 23 10:41:00 2008 -0700
Fix warnings.
diff --git a/src/g80_output.c b/src/g80_output.c
index 140f3c8..e906fbb 100644
--- a/src/g80_output.c
+++ b/src/g80_output.c
@@ -451,7 +451,6 @@ G80CreateOutputs(ScrnInfoPtr pScrn)
pPriv->scale = G80_SCALE_ASPECT;
if(pNv->lvds.i2cPort != -1) {
- I2CBusPtr i2c;
char i2cName[16];
snprintf(i2cName, sizeof(i2cName), "I2C%i (LVDS)", pNv->lvds.i2cPort);
diff --git a/src/g80_xaa.c b/src/g80_xaa.c
index bcacbb4..0a3c1b3 100644
--- a/src/g80_xaa.c
+++ b/src/g80_xaa.c
@@ -95,7 +95,7 @@ G80SetRopSolid(G80Ptr pNv, CARD32 rop, CARD32 planemask)
}
}
-void inline
+inline void
G80SetClip(G80Ptr pNv, int x, int y, int w, int h)
{
G80DmaStart(pNv, 0x280, 4);
commit c2128e5a8682e407b37f88c67a1709309247fc5d
Author: Aaron Plattner <aplattner@nvidia.com>
Date: Sat Aug 23 10:36:37 2008 -0700
G80: Log the i2c port number for LVDS, when there is one.
diff --git a/src/g80_output.c b/src/g80_output.c
index 4c8448f..140f3c8 100644
--- a/src/g80_output.c
+++ b/src/g80_output.c
@@ -191,8 +191,12 @@ static Bool G80ReadPortMapping(int scrnIndex, G80Ptr pNv)
}
xf86DrvMsg(scrnIndex, X_PROBED, "Connector map:\n");
- if(pNv->lvds.present)
- xf86DrvMsg(scrnIndex, X_PROBED, " [N/A] -> SOR%i (LVDS)\n", pNv->lvds.or);
+ if(pNv->lvds.present) {
+ if (pNv->lvds.i2cPort != -1)
+ xf86DrvMsg(scrnIndex, X_PROBED, " Bus %i -> SOR%i (LVDS)\n", pNv->lvds.i2cPort, pNv->lvds.or);
+ else
+ xf86DrvMsg(scrnIndex, X_PROBED, " [N/A] -> SOR%i (LVDS)\n", pNv->lvds.or);
+ }
for(i = 0; i < G80_NUM_I2C_PORTS; i++) {
if(pNv->i2cMap[i].dac != -1)
xf86DrvMsg(scrnIndex, X_PROBED, " Bus %i -> DAC%i\n", i, pNv->i2cMap[i].dac);
commit f485c553c23c67fd060fdea82f57128fd4a1749e
Author: Alan Coopersmith <alan.coopersmith@sun.com>
Date: Fri May 9 15:23:49 2008 -0700
Print error message when pci_device_map_range fails
diff --git a/src/nv_setup.c b/src/nv_setup.c
index b057da1..bea0050 100644
--- a/src/nv_setup.c
+++ b/src/nv_setup.c
@@ -341,7 +341,10 @@ NVCommonSetup(ScrnInfoPtr pScrn)
int FlatPanel = -1; /* really means the CRTC is slaved */
Bool Television = FALSE;
void *tmp;
-
+#if XSERVER_LIBPCIACCESS
+ int err;
+#endif
+
/*
* Override VGA I/O routines.
*/
@@ -371,8 +374,12 @@ NVCommonSetup(ScrnInfoPtr pScrn)
pVga->MMIOOffset = 0;
#if XSERVER_LIBPCIACCESS
- pci_device_map_range(pNv->PciInfo, pNv->IOAddress, 0x01000000,
- PCI_DEV_MAP_FLAG_WRITABLE, &tmp);
+ err = pci_device_map_range(pNv->PciInfo, pNv->IOAddress, 0x01000000,
+ PCI_DEV_MAP_FLAG_WRITABLE, &tmp);
+ if (err != 0) {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+ "pci_device_map_range failed: %s\n", strerror(err));
+ }
#else
tmp = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_MMIO | VIDMEM_READSIDEEFFECT,
pNv->PciTag, pNv->IOAddress, 0x01000000);
commit 319ee20c9bd4f764297cf252723a23bb6a95051a
Author: Alan Coopersmith <alan.coopersmith@sun.com>
Date: Fri May 9 15:23:14 2008 -0700
Fix pciaccess READ_LONG to work with Sun compilers
Sun compilers don't allow nesting {} inside () apparently
diff --git a/src/nv_hw.c b/src/nv_hw.c
index ecac28f..83eeab2 100644
--- a/src/nv_hw.c
+++ b/src/nv_hw.c
@@ -653,6 +653,15 @@ static void nv30UpdateArbitrationSettings (
*lwm = graphics_lwm >> 3;
}
+#if XSERVER_LIBPCIACCESS
+static inline uint32_t
+pciaccessReadLong(struct pci_device *const dev, pciaddr_t offset) {
+ uint32_t tmp;
+ pci_device_cfg_read_u32(dev, &tmp, offset);
+ return tmp;
+}
+#endif
+
static void nForceUpdateArbitrationSettings (
unsigned VClk,
unsigned pixelDepth,
@@ -666,8 +675,7 @@ static void nForceUpdateArbitrationSettings (
struct pci_device *const dev2 = pci_device_find_by_slot(0, 0, 0, 2);
struct pci_device *const dev3 = pci_device_find_by_slot(0, 0, 0, 3);
struct pci_device *const dev5 = pci_device_find_by_slot(0, 0, 0, 5);
- uint32_t tmp;
- #define READ_LONG(num, offset) ({ pci_device_cfg_read_u32(dev##num, &tmp, (offset)); tmp; })
+# define READ_LONG(num, offset) pciaccessReadLong(dev##num, (offset))
#else
#define READ_LONG(num, offset) pciReadLong(pciTag(0, 0, num), (offset))
#endif
commit 2e0416cf8970ab4e3065a0109129b2121982c031
Author: Aaron Plattner <aplattner@nvidia.com>
Date: Sun Aug 3 19:29:34 2008 -0700
G80: Fix some ROP bugs.
diff --git a/src/g80_exa.c b/src/g80_exa.c
index 96dbc21..a327c51 100644
--- a/src/g80_exa.c
+++ b/src/g80_exa.c
@@ -109,7 +109,7 @@ prepareSolid(PixmapPtr pPixmap,
if(pPixmap->drawable.depth > 24) return FALSE;
if(!setDst(pNv, pPixmap)) return FALSE;
G80DmaStart(pNv, 0x2ac, 1);
- G80DmaNext (pNv, 1);
+ G80DmaNext (pNv, 4);
G80SetRopSolid(pNv, alu, planemask);
G80DmaStart(pNv, 0x580, 1);
G80DmaNext (pNv, 4);
@@ -160,7 +160,7 @@ prepareCopy(PixmapPtr pSrcPixmap,
if(alu == GXcopy && planemask == ~0) {
G80DmaNext (pNv, 3);
} else {
- G80DmaNext (pNv, 1);
+ G80DmaNext (pNv, 4);
G80SetRopSolid(pNv, alu, planemask);
}
pNv->DMAKickoffCallback = G80DMAKickoffCallback;
diff --git a/src/g80_xaa.c b/src/g80_xaa.c
index 0859623..bcacbb4 100644
--- a/src/g80_xaa.c
+++ b/src/g80_xaa.c
@@ -125,7 +125,7 @@ G80SetupForScreenToScreenCopy(
if(rop == GXcopy && planemask == ~0) {
G80DmaNext (pNv, 3);
} else {
- G80DmaNext (pNv, 1);
+ G80DmaNext (pNv, 4);
G80SetRopSolid(pNv, rop, planemask);
}
pNv->DMAKickoffCallback = G80DMAKickoffCallback;
@@ -177,7 +177,7 @@ G80SetupForSolidFill(
G80SetClip(pNv, 0, 0, 0x7fff, 0x7fff);
G80DmaStart(pNv, 0x2ac, 1);
- G80DmaNext (pNv, 1);
+ G80DmaNext (pNv, 4);
G80SetRopSolid(pNv, rop, planemask);
G80DmaStart(pNv, 0x580, 1);
G80DmaNext (pNv, 4);
@@ -235,7 +235,7 @@ G80SetupForMono8x8PatternFill(
G80SetPattern(pNv, bg, fg, patternx, patterny);
G80DmaStart(pNv, 0x2ac, 1);
- G80DmaNext (pNv, 1);
+ G80DmaNext (pNv, 4);
G80DmaStart(pNv, 0x580, 1);
G80DmaNext (pNv, 4);
G80DmaStart(pNv, 0x588, 1);
@@ -275,7 +275,7 @@ G80SetupForScanlineCPUToScreenColorExpandFill(
planemask |= mask;
G80DmaStart(pNv, 0x2ac, 1);
- G80DmaNext (pNv, 1);
+ G80DmaNext (pNv, 4);
G80SetRopSolid(pNv, rop, planemask);
G80DmaStart(pNv, 0x800, 1);
G80DmaNext (pNv, 1);
@@ -353,7 +353,7 @@ G80SetupForScanlineImageWrite(
if(rop == GXcopy && planemask == ~0) {
G80DmaNext (pNv, 3);
} else {
- G80DmaNext (pNv, 1);
+ G80DmaNext (pNv, 4);
G80SetRopSolid(pNv, rop, planemask);
}
@@ -420,7 +420,7 @@ G80SetupForSolidLine(ScrnInfoPtr pScrn, int color, int rop, unsigned planemask)
G80SetClip(pNv, 0, 0, 0x7fff, 0x7fff);
G80DmaStart(pNv, 0x2ac, 1);
- G80DmaNext (pNv, 1);
+ G80DmaNext (pNv, 4);
G80SetRopSolid(pNv, rop, planemask);
G80DmaStart(pNv, 0x580, 1);
G80DmaNext (pNv, 1);
commit 9b727b8384d51e3657bb50efa090adde91c17a73
Author: Aaron Plattner <aplattner@nvidia.com>
Date: Thu Jul 24 18:03:31 2008 -0700
Move hardware cursor initialization to after AcquireDisplay.
The original order works fine when the server starts, but on the second server
generation the server tries to call G80CrtcHideCursor before the display engine
has been initialized, causing a hang.
diff --git a/src/g80_driver.c b/src/g80_driver.c
index a0182a1..50d55a0 100644
--- a/src/g80_driver.c
+++ b/src/g80_driver.c
@@ -914,13 +914,6 @@ G80ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
Must precede creation of the default colormap */
miDCInitialize(pScreen, xf86GetPointerScreenFuncs());
- /* Initialize hardware cursor. Must follow software cursor initialization. */
- if(pNv->HWCursor && !G80CursorInit(pScreen)) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Hardware cursor initialization failed\n");
- pNv->HWCursor = FALSE;
- }
-
/* Initialize default colormap */
if(!miCreateDefColormap(pScreen))
return FALSE;
@@ -949,6 +942,13 @@ G80ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
if(!AcquireDisplay(pScrn))
return FALSE;
+ /* Initialize hardware cursor. Must follow software cursor initialization. */
+ if(pNv->HWCursor && !G80CursorInit(pScreen)) {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+ "Hardware cursor initialization failed\n");
+ pNv->HWCursor = FALSE;
+ }
+
pScreen->SaveScreen = G80SaveScreen;
pNv->CloseScreen = pScreen->CloseScreen;
commit 6cd80057fadbb8d63d3e1a623515206800fefc8e
Author: Aaron Plattner <aplattner@nvidia.com>
Date: Mon Jun 30 16:26:09 2008 -0700
Bump to 2.1.10.
diff --git a/configure.ac b/configure.ac
index d20a2f1..6514aed 100644
--- a/configure.ac
+++ b/configure.ac
@@ -22,7 +22,7 @@
AC_PREREQ(2.57)
AC_INIT([xf86-video-nv],
- 2.1.9,
+ 2.1.10,
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg],
xf86-video-nv)
commit 3f43093cf0c0338a1a479ed4ba2fad3f5f04ad69
Author: Aaron Plattner <aplattner@nvidia.com>
Date: Mon Jun 30 16:25:54 2008 -0700
More G8x chips.
diff --git a/src/nv_driver.c b/src/nv_driver.c
index d710d06..b6c7209 100644
--- a/src/nv_driver.c
+++ b/src/nv_driver.c
@@ -785,6 +785,7 @@ NVIsG80(int chipType)
case 0x0630:
case 0x0640:
case 0x06e0:
+ case 0x06f0:
return TRUE;
}
commit 69aa963d7ab8256d0e932e1a5a98599f168b8836
Author: Aaron Plattner <aplattner@nvidia.com>
Date: Mon Jun 30 13:30:07 2008 -0700
Fix build by using CARD32 instead of uint32_t, like we do everywhere else.
diff --git a/src/g80_output.c b/src/g80_output.c
index e28b584..4c8448f 100644
--- a/src/g80_output.c
+++ b/src/g80_output.c
@@ -211,9 +211,9 @@ fail:
return FALSE;
}
-static uint32_t i2cAddr(const int port)
+static CARD32 i2cAddr(const int port)
{
- const uint32_t base = (port > 3) ? 0x0000E1E0 : 0x0000E138;
+ const CARD32 base = (port > 3) ? 0x0000E1E0 : 0x0000E138;
return base + port * 0x18;
}
@@ -297,7 +297,7 @@ ProbeDDC(I2CBusPtr i2c)
G80Ptr pNv = G80PTR(pScrn);
xf86MonPtr monInfo = NULL;
const int bus = i2c->DriverPrivate.val;
- const uint32_t addr = i2cAddr(bus);
+ const CARD32 addr = i2cAddr(bus);
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Probing for EDID on I2C bus %i...\n", bus);
commit 91d8778176f1db54c8222a95315610a043198648
Author: Aaron Plattner <aplattner@nvidia.com>
Date: Sun Jun 29 21:26:57 2008 -0700
G80: Handle extended I2C ports and LVDS panels with DDC-based EDIDs.
diff --git a/src/g80_output.c b/src/g80_output.c
index 1cf4669..e28b584 100644
--- a/src/g80_output.c
+++ b/src/g80_output.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2007 NVIDIA, Corporation
+ * Copyright (c) 2007-2008 NVIDIA, Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
@@ -76,7 +76,7 @@ static Bool G80ReadPortMapping(int scrnIndex, G80Ptr pNv)
CARD32 b;
/* Clear the i2c map to invalid */
- for(i = 0; i < 4; i++)
+ for(i = 0; i < G80_NUM_I2C_PORTS; i++)
pNv->i2cMap[i].dac = pNv->i2cMap[i].sor = -1;
if(*(CARD16*)pNv->table1 != 0xaa55) goto fail;
@@ -162,6 +162,27 @@ static Bool G80ReadPortMapping(int scrnIndex, G80Ptr pNv)
case 3: /* LVDS */
pNv->lvds.present = TRUE;
pNv->lvds.or = or;
+ pNv->lvds.i2cPort = -1;
+
+ if(port == 15) {
+ xf86DrvMsg(scrnIndex, X_INFO, "LVDS has no I2C port\n");
+ break;
+ }
+ if(port >= table3Entries) {
+ xf86DrvMsg(scrnIndex, X_WARNING,
+ "LVDS: invalid port %d\n", port);
+ break;
+ }
+ b = *(CARD32*)&table3[table3EntSize * port];
+ port = b & 0xff;
+ portType = b >> 24;
+ if(portType != 5) {
+ xf86DrvMsg(scrnIndex, X_WARNING,
+ "LVDS: invalid port type %d\n", portType);
+ break;
+ }
+ pNv->lvds.i2cPort = port;
+
break;
default:
@@ -172,7 +193,7 @@ static Bool G80ReadPortMapping(int scrnIndex, G80Ptr pNv)
xf86DrvMsg(scrnIndex, X_PROBED, "Connector map:\n");
if(pNv->lvds.present)
xf86DrvMsg(scrnIndex, X_PROBED, " [N/A] -> SOR%i (LVDS)\n", pNv->lvds.or);
- for(i = 0; i < 4; i++) {
+ for(i = 0; i < G80_NUM_I2C_PORTS; i++) {
if(pNv->i2cMap[i].dac != -1)
xf86DrvMsg(scrnIndex, X_PROBED, " Bus %i -> DAC%i\n", i, pNv->i2cMap[i].dac);
if(pNv->i2cMap[i].sor != -1)
@@ -190,21 +211,24 @@ fail:
return FALSE;
}
+static uint32_t i2cAddr(const int port)
+{
+ const uint32_t base = (port > 3) ? 0x0000E1E0 : 0x0000E138;
+ return base + port * 0x18;
+}
+
static void G80_I2CPutBits(I2CBusPtr b, int clock, int data)
{
G80Ptr pNv = G80PTR(xf86Screens[b->scrnIndex]);
- const int off = b->DriverPrivate.val * 0x18;
-
- pNv->reg[(0x0000E138+off)/4] = 4 | clock | data << 1;
+ pNv->reg[i2cAddr(b->DriverPrivate.val)/4] = 4 | clock | data << 1;
}
static void G80_I2CGetBits(I2CBusPtr b, int *clock, int *data)
{
G80Ptr pNv = G80PTR(xf86Screens[b->scrnIndex]);
- const int off = b->DriverPrivate.val * 0x18;
unsigned char val;
- val = pNv->reg[(0x0000E138+off)/4];
+ val = pNv->reg[i2cAddr(b->DriverPrivate.val)/4];
*clock = !!(val & 1);
*data = !!(val & 2);
}
@@ -272,14 +296,15 @@ ProbeDDC(I2CBusPtr i2c)
ScrnInfoPtr pScrn = xf86Screens[i2c->scrnIndex];
G80Ptr pNv = G80PTR(pScrn);
xf86MonPtr monInfo = NULL;
- const int bus = i2c->DriverPrivate.val, off = bus * 0x18;
+ const int bus = i2c->DriverPrivate.val;
+ const uint32_t addr = i2cAddr(bus);
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Probing for EDID on I2C bus %i...\n", bus);
- pNv->reg[(0x0000E138+off)/4] = 7;
+ pNv->reg[addr/4] = 7;
/* Should probably use xf86OutputGetEDID here */
monInfo = xf86DoEDID_DDC2(pScrn->scrnIndex, i2c);
- pNv->reg[(0x0000E138+off)/4] = 3;
+ pNv->reg[addr/4] = 3;
if(monInfo) {
xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
@@ -376,7 +401,7 @@ G80CreateOutputs(ScrnInfoPtr pScrn)
return FALSE;
/* For each DDC port, create an output for the attached ORs */
- for(i = 0; i < 4; i++) {
+ for(i = 0; i < G80_NUM_I2C_PORTS; i++) {
xf86OutputPtr dac = NULL, sor = NULL;
I2CBusPtr i2c;
char i2cName[16];
@@ -420,6 +445,19 @@ G80CreateOutputs(ScrnInfoPtr pScrn)
G80OutputPrivPtr pPriv = lvds->driver_private;
pPriv->scale = G80_SCALE_ASPECT;
+
+ if(pNv->lvds.i2cPort != -1) {
+ I2CBusPtr i2c;
+ char i2cName[16];
+
+ snprintf(i2cName, sizeof(i2cName), "I2C%i (LVDS)", pNv->lvds.i2cPort);
+ pPriv->i2c = G80I2CInit(pScrn, i2cName, pNv->lvds.i2cPort);
+ if(!pPriv->i2c) {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+ "Failed to initialize I2C for port %i (LVDS)!\n",
+ pNv->lvds.i2cPort);
+ }
+ }
}
/* For each output, set the crtc and clone masks */
diff --git a/src/g80_sor.c b/src/g80_sor.c
index 202e838..c1ef42d 100644
--- a/src/g80_sor.c
+++ b/src/g80_sor.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2007 NVIDIA, Corporation
+ * Copyright (c) 2007-2008 NVIDIA, Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
@@ -143,7 +143,15 @@ G80SorDetect(xf86OutputPtr output)
static xf86OutputStatus
G80SorLVDSDetect(xf86OutputPtr output)
{
- /* Assume LVDS is always connected */
+ G80OutputPrivPtr pPriv = output->driver_private;
+
+ if(pPriv->i2c) {
+ /* If LVDS has an I2C port, use the normal probe routine to get the
+ * EDID, if possible. */
+ G80SorDetect(output);
+ }
+
+ /* Ignore G80SorDetect and assume LVDS is always connected */
return XF86OutputStatusConnected;
}
@@ -242,6 +250,13 @@ static DisplayModePtr
G80SorGetLVDSModes(xf86OutputPtr output)
{
G80OutputPrivPtr pPriv = output->driver_private;
+
+ /* If an EDID was read during detection, use the modes from that. */
+ DisplayModePtr modes = G80OutputGetDDCModes(output);
+ if(modes)
+ return modes;
+
+ /* Otherwise, feed in the mode we read during initialization. */
return xf86DuplicateMode(pPriv->nativeMode);
}
diff --git a/src/g80_type.h b/src/g80_type.h
index 30ef3fe..0cebae7 100644
--- a/src/g80_type.h
+++ b/src/g80_type.h
@@ -7,6 +7,8 @@
#include <xf86Crtc.h>
#include <xf86int10.h>
+#define G80_NUM_I2C_PORTS 6
+
typedef enum Head {
HEAD0 = 0,
HEAD1
@@ -51,10 +53,11 @@ typedef struct G80Rec {
struct {
ORNum dac;
ORNum sor;
- } i2cMap[4];
+ } i2cMap[G80_NUM_I2C_PORTS];
struct {
Bool present;
ORNum or;
+ int i2cPort;
} lvds;
unsigned loadVal;
commit db768cf105956fbea39383a2214227782bf827b0
Author: Aaron Plattner <aplattner@nvidia.com>
Date: Sun Jun 22 13:01:21 2008 -0700
Add a note that MODE_PANEL really means "larger than BIOS-programmed panel size".
Bug #16085.
diff --git a/src/nv_setup.c b/src/nv_setup.c
index 606696d..b057da1 100644
--- a/src/nv_setup.c
+++ b/src/nv_setup.c
@@ -698,6 +698,10 @@ NVCommonSetup(ScrnInfoPtr pScrn)
pNv->fpSyncs = pNv->PRAMDAC[0x0848/4] & 0x30000033;
xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Panel size is %i x %i\n",
pNv->fpWidth, pNv->fpHeight);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NOTE: This driver cannot "
+ "reconfigure the BIOS-programmed size.\n");
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "These dimensions will be used as "
+ "the panel size for mode validation.\n");
}
if(monitorA)
commit fb10793d2607d30077a9861b575c108b6c4101ca
Author: Aaron Plattner <aplattner@nvidia.com>
Date: Sun Jun 22 12:55:10 2008 -0700
Add new chips to the man page and fix capitalization of "Quadro".
diff --git a/man/nv.man b/man/nv.man
index ee0d45b..2d559e6 100644
--- a/man/nv.man
+++ b/man/nv.man
@@ -35,22 +35,22 @@ NV4
.B RIVA TNT2
NV5
.TP 22
-.B GeForce 256, QUADRO
+.B GeForce 256, Quadro
NV10
.TP 22
-.B GeForce2, QUADRO2
+.B GeForce2, Quadro2
NV11 & NV15
.TP 22
-.B GeForce3, QUADRO DCC
+.B GeForce3, Quadro DCC
NV20
.TP 22
.B nForce, nForce2
NV1A, NV1F
.TP 22
-.B GeForce4, QUADRO4
+.B GeForce4, Quadro4
NV17, NV18, NV25, NV28
.TP 22
-.B GeForce FX, QUADRO FX
+.B GeForce FX, Quadro FX
NV30, NV31, NV34, NV35, NV36, NV37, NV38
.TP 22
.B GeForce 6XXX
@@ -59,9 +59,12 @@ NV40, NV41, NV43, NV44, NV45, C51
.B GeForce 7XXX
G70, G71, G72, G73
.TP 22
-.B GeForce 8XXX
-G80, G84, G86, G92
-
+.B GeForce 8XXX, GeForce 9XXX
+G80, G84, G86, G92, G94, G96, G98
+.TP 22
+.B GeForce GTX
+GT200
+.
.SH CONFIGURATION DETAILS
Please refer to __xconfigfile__(__filemansuffix__) for general configuration
details. This section only covers configuration details specific to this
commit 2fdcda8ea62eba1b7885f0a75249884715936247
Author: Aaron Plattner <aplattner@nvidia.com>
Date: Sun Jun 22 12:45:31 2008 -0700
Replace copyright notices with stock MIT X11 boilerplate.
diff --git a/man/nv.man b/man/nv.man
index 19816bd..ee0d45b 100644
--- a/man/nv.man
+++ b/man/nv.man
@@ -194,7 +194,7 @@ Authors include: David McKay, Jarno Paananen, Chas Inman, Dave Schmenk,
Mark Vojkovich, Aaron Plattner
.SH COPYRIGHT
.LP
-Copyright (c) 2003 - 2007 NVIDIA, Corporation
+Copyright (c) 2003 - 2008 NVIDIA, Corporation
.LP
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the
diff --git a/src/nv_cursor.c b/src/nv_cursor.c
index 73e3fc6..bf5adc0 100644
--- a/src/nv_cursor.c
+++ b/src/nv_cursor.c
@@ -1,41 +1,25 @@
- /***************************************************************************\
-|* *|
-|* Copyright 2003 NVIDIA, Corporation. All rights reserved. *|
-|* *|
-|* NOTICE TO USER: The source code is copyrighted under U.S. and *|
-|* international laws. Users and possessors of this source code are *|
-|* hereby granted a nonexclusive, royalty-free copyright license to *|
-|* use this code in individual and commercial software. *|
-|* *|
-|* Any use of this source code must include, in the user documenta- *|
-|* tion and internal comments to the code, notices to the end user *|
-|* as follows: *|
-|* *|
-|* Copyright 2003 NVIDIA, Corporation. All rights reserved. *|
-|* *|
-|* NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY *|
-|* OF THIS SOURCE CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" *|
-|* WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NVIDIA, CORPOR- *|
-|* ATION DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOURCE CODE, *|
-|* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE- *|
-|* MENT, AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL *|
-|* NVIDIA, CORPORATION BE LIABLE FOR ANY SPECIAL, INDIRECT, INCI- *|
-|* DENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RE- *|
-|* SULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION *|
-|* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF *|
-|* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE. *|
-|* *|
-|* U.S. Government End Users. This source code is a "commercial *|
-|* item," as that term is defined at 48 C.F.R. 2.101 (OCT 1995), *|
-|* consisting of "commercial computer software" and "commercial *|
-|* computer software documentation," as such terms are used in *|
-|* 48 C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Govern- *|
-|* ment only as a commercial end item. Consistent with 48 C.F.R. *|
-|* 12.212 and 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), *|
-|* all U.S. Government End Users acquire the source code with only *|
-|* those rights set forth herein. *|
-|* *|
- \***************************************************************************/
+/*
+ * Copyright (c) 2003 NVIDIA, Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
#ifdef HAVE_CONFIG_H
#include "config.h"
diff --git a/src/nv_dac.c b/src/nv_dac.c
index ec7739b..b1049cc 100644
--- a/src/nv_dac.c
+++ b/src/nv_dac.c
@@ -1,41 +1,25 @@
- /***************************************************************************\
-|* *|
-|* Copyright 2007 NVIDIA, Corporation. All rights reserved. *|
-|* *|
-|* NOTICE TO USER: The source code is copyrighted under U.S. and *|
-|* international laws. Users and possessors of this source code are *|
-|* hereby granted a nonexclusive, royalty-free copyright license to *|
-|* use this code in individual and commercial software. *|
-|* *|
-|* Any use of this source code must include, in the user documenta- *|
-|* tion and internal comments to the code, notices to the end user *|
-|* as follows: *|
-|* *|
-|* Copyright 2003 NVIDIA, Corporation. All rights reserved. *|
-|* *|
-|* NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY *|
-|* OF THIS SOURCE CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" *|
-|* WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NVIDIA, CORPOR- *|
-|* ATION DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOURCE CODE, *|
-|* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE- *|
-|* MENT, AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL *|
-|* NVIDIA, CORPORATION BE LIABLE FOR ANY SPECIAL, INDIRECT, INCI- *|
-|* DENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RE- *|
-|* SULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION *|
-|* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF *|
-|* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE. *|
-|* *|
-|* U.S. Government End Users. This source code is a "commercial *|
-|* item," as that term is defined at 48 C.F.R. 2.101 (OCT 1995), *|
-|* consisting of "commercial computer software" and "commercial *|
-|* computer software documentation," as such terms are used in *|
-|* 48 C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Govern- *|
-|* ment only as a commercial end item. Consistent with 48 C.F.R. *|
-|* 12.212 and 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), *|
-|* all U.S. Government End Users acquire the source code with only *|
-|* those rights set forth herein. *|
-|* *|
- \***************************************************************************/
+/*
+ * Copyright (c) 2007 NVIDIA, Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
#ifdef HAVE_CONFIG_H
#include "config.h"
diff --git a/src/nv_dma.h b/src/nv_dma.h
index 150918a..fbd72e1 100644
--- a/src/nv_dma.h
+++ b/src/nv_dma.h
@@ -1,42 +1,25 @@
-
- /***************************************************************************\
-|* *|
-|* Copyright 2003 NVIDIA, Corporation. All rights reserved. *|
-|* *|
-|* NOTICE TO USER: The source code is copyrighted under U.S. and *|
-|* international laws. Users and possessors of this source code are *|
-|* hereby granted a nonexclusive, royalty-free copyright license to *|
-|* use this code in individual and commercial software. *|
-|* *|
-|* Any use of this source code must include, in the user documenta- *|
-|* tion and internal comments to the code, notices to the end user *|
-|* as follows: *|
-|* *|
-|* Copyright 2003 NVIDIA, Corporation. All rights reserved. *|
-|* *|
-|* NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY *|
-|* OF THIS SOURCE CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" *|
-|* WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NVIDIA, CORPOR- *|
-|* ATION DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOURCE CODE, *|
-|* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE- *|
-|* MENT, AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL *|
-|* NVIDIA, CORPORATION BE LIABLE FOR ANY SPECIAL, INDIRECT, INCI- *|
-|* DENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RE- *|
-|* SULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION *|
-|* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF *|
-|* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE. *|
-|* *|
-|* U.S. Government End Users. This source code is a "commercial *|
-|* item," as that term is defined at 48 C.F.R. 2.101 (OCT 1995), *|
-|* consisting of "commercial computer software" and "commercial *|
-|* computer software documentation," as such terms are used in *|
Reply to: