On Wed, Mar 5, 2008 at 11:26 AM, Jiří Paleček <jpalecek@web.de> wrote:Hello,sorry that I mystified you in the last email, it seems that I've done thetest with a different version if the driver (not 6.8.0). The correct results are: 82 Hz works, 84 and 86 not.The base problem here is that the pll algorithm is not able to find clock as close as it would like to the desired frequency so it fails and you end up with an invalid divders programmed to the hw which causes the hang. I guess there are two options: widen the error range or try a slightly different clock if it fails to find valid dividers.
Ahuh, so you say that the frequencies in the range 175 MHz - 200 MHz are impossible to create on my card, so 184 MHz fails. Well, it really seems so. But why not choose the 175 MHz then, and do it like that (see patch).
You may wanna optimize it a bit, but it starts on my machine so it may be unnecessary.
Regards
Jiri Palecek
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