xserver-xorg-video-intel: Changes to 'upstream-experimental'
Rebased ref, commits from common ancestor:
commit 0d2bf2742eca175a9c92fe939ddb202f63594af1
Author: Jesse Barnes <jbarnes@virtuousgeek.org>
Date: Thu Nov 13 12:35:02 2008 -0800
Make sure DRM library paths are included
We need @DRM_LIBS@ in order to find drm_intel if installed in a
non-standard path.
diff --git a/src/Makefile.am b/src/Makefile.am
index 9b32215..232ac53 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -37,12 +37,12 @@ AM_CFLAGS = @WARN_CFLAGS@ @XORG_CFLAGS@ @DRM_CFLAGS@ @DRI_CFLAGS@ \
intel_drv_la_LTLIBRARIES = intel_drv.la
intel_drv_la_LDFLAGS = -module -avoid-version
intel_drv_ladir = @moduledir@/drivers
-intel_drv_la_LIBADD = -lm -ldrm_intel
+intel_drv_la_LIBADD = -lm @DRM_LIBS@ -ldrm_intel
if BUILD_UXA
intel_drv_la_LIBADD += ../uxa/libuxa.la
endif
if XSERVER_LIBPCIACCESS
-intel_drv_la_LIBADD += @PCIACCESS_LIBS@ @DRM_LIBS@
+intel_drv_la_LIBADD += @PCIACCESS_LIBS@
endif
XMODE_SRCS=\
commit 76e71ddfd4f4b9fb240458ea4c9183b139d50b88
Author: Jesse Barnes <jbarnes@virtuousgeek.org>
Date: Tue Nov 11 11:50:50 2008 -0800
Update version to 2.5.1 in preparation for release
diff --git a/configure.ac b/configure.ac
index a53b225..2c956ff 100644
--- a/configure.ac
+++ b/configure.ac
@@ -22,7 +22,7 @@
AC_PREREQ(2.57)
AC_INIT([xf86-video-intel],
- 2.5.0,
+ 2.5.1,
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg],
xf86-video-intel)
commit a580641cb3fa04c7bbd15f5bc0011cec314375e9
Author: Zhenyu Wang <zhenyu.z.wang@intel.com>
Date: Fri Nov 7 16:06:26 2008 +0800
quirk LVDS on Asus Eee box
Reported by Yang Sheng <sheng.yang@intel.com>
diff --git a/src/i830_quirks.c b/src/i830_quirks.c
index 8dae235..155cb44 100644
--- a/src/i830_quirks.c
+++ b/src/i830_quirks.c
@@ -335,6 +335,9 @@ static i830_quirk i830_quirk_list[] = {
{ PCI_CHIP_I855_GM, SUBSYS_ANY, SUBSYS_ANY, quirk_pipea_force },
{ PCI_CHIP_845_G, SUBSYS_ANY, SUBSYS_ANY, quirk_pipea_force },
+ /* Asus Eee Box has no LVDS */
+ { PCI_CHIP_I945_GME, 0x1043, 0x1252, quirk_ignore_lvds },
+
{ 0, 0, 0, NULL },
};
commit 98c9a08257386fa97720f51bc82822b764d5f6bc
Author: Keith Packard <keithp@keithp.com>
Date: Thu Nov 6 15:04:27 2008 -0800
Use long crt hotplug activation time on GM45.
The GM45 b-spec requires the use of the longer hotplug activation period,
but does not require looping twice over the detection logic. With this
patch, CRT detection appears solid on my GM45.
Signed-off-by: Keith Packard <keithp@keithp.com>
diff --git a/src/i810_reg.h b/src/i810_reg.h
index e9c03e5..b391d55 100644
--- a/src/i810_reg.h
+++ b/src/i810_reg.h
@@ -1242,7 +1242,22 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
# define SDVOC_HOTPLUG_INT_EN (1 << 25)
# define TV_HOTPLUG_INT_EN (1 << 18)
# define CRT_HOTPLUG_INT_EN (1 << 9)
+# define CRT_HOTPLUG_ACTIVATION_PERIOD_32 (0 << 8)
+/* must use period 64 on GM45 according to docs */
+# define CRT_HOTPLUG_ACTIVATION_PERIOD_64 (1 << 8)
+# define CRT_HOTPLUG_DAC_ON_TIME_2M (0 << 7)
+# define CRT_HOTPLUG_DAC_ON_TIME_4M (1 << 7)
+# define CRT_HOTPLUG_VOLTAGE_COMPARE_40 (0 << 5)
+# define CRT_HOTPLUG_VOLTAGE_COMPARE_50 (1 << 5)
+# define CRT_HOTPLUG_VOLTAGE_COMPARE_60 (2 << 5)
+# define CRT_HOTPLUG_VOLTAGE_COMPARE_70 (3 << 5)
+# define CRT_HOTPLUG_VOLTAGE_COMPARE_MASK (3 << 5)
+# define CRT_HOTPLUG_DETECT_DELAY_1G (0 << 4)
+# define CRT_HOTPLUG_DETECT_DELAY_2G (1 << 4)
# define CRT_HOTPLUG_FORCE_DETECT (1 << 3)
+# define CRT_HOTPLUG_DETECT_VOLTAGE_325MV (0 << 2)
+# define CRT_HOTPLUG_DETECT_VOLTAGE_475MV (1 << 2)
+# define CRT_HOTPLUG_MASK (0x3fc) /* Bits 9-2 */
#define PORT_HOTPLUG_STAT 0x61114
# define HDMIB_HOTPLUG_INT_STATUS (1 << 29)
diff --git a/src/i830_crt.c b/src/i830_crt.c
index 479fbe5..ad81fbb 100644
--- a/src/i830_crt.c
+++ b/src/i830_crt.c
@@ -158,39 +158,55 @@ i830_crt_detect_hotplug(xf86OutputPtr output)
{
ScrnInfoPtr pScrn = output->scrn;
I830Ptr pI830 = I830PTR(pScrn);
- uint32_t temp;
+ uint32_t hotplug_en, temp;
const int timeout_ms = 1000;
int starttime, curtime;
int tries = 1;
+ int try;
- /* On 4 series, CRT detect sequence need to be done twice for safe. */
- if (IS_G4X(pI830))
+ /* On 4 series desktop, CRT detect sequence need to be done twice
+ * to get a reliable result. */
+ if (IS_G4X(pI830) && !IS_GM45(pI830))
tries = 2;
+ else
+ tries = 1;
-retry:
- tries--;
+ hotplug_en = INREG(PORT_HOTPLUG_EN);
- temp = INREG(PORT_HOTPLUG_EN);
+ hotplug_en &= ~CRT_HOTPLUG_MASK;
- OUTREG(PORT_HOTPLUG_EN, temp | CRT_HOTPLUG_FORCE_DETECT | (1 << 5));
+ /* This starts the detection sequence */
+ hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
- for (curtime = starttime = GetTimeInMillis();
- (curtime - starttime) < timeout_ms; curtime = GetTimeInMillis())
- {
- if ((INREG(PORT_HOTPLUG_EN) & CRT_HOTPLUG_FORCE_DETECT) == 0)
- break;
- }
+ /* GM45 requires a longer activation period to reliably
+ * detect CRT
+ */
+ if (IS_GM45(pI830))
+ hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64;
- if (tries > 0)
- goto retry;
+ /* Use the default voltage value */
+ hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50;
- if ((INREG(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) ==
- CRT_HOTPLUG_MONITOR_COLOR)
- {
- return TRUE;
- } else {
- return FALSE;
+ for (try = 0; try < tries; try++) {
+ /* turn FORCE_DETECT on */
+ OUTREG(PORT_HOTPLUG_EN, hotplug_en);
+
+ /* wait for FORCE_DETECT to go off */
+ for (curtime = starttime = GetTimeInMillis();
+ (curtime - starttime) < timeout_ms;
+ curtime = GetTimeInMillis())
+ {
+ temp = INREG(PORT_HOTPLUG_EN);
+
+ if ((temp & CRT_HOTPLUG_FORCE_DETECT) == 0)
+ break;
+ }
}
+
+ /* Check the status to see if both blue and green are on now */
+ temp = INREG(PORT_HOTPLUG_STAT);
+ return ((temp & CRT_HOTPLUG_MONITOR_MASK) ==
+ CRT_HOTPLUG_MONITOR_COLOR);
}
/**
commit d8e59840201f7c869a5c267dad22f3babc414926
Author: Zhenyu Wang <zhenyu.z.wang@intel.com>
Date: Wed Oct 29 20:41:46 2008 +0800
TV: fix timing parameters for PAL, 480p, 1080i
diff --git a/src/i830_tv.c b/src/i830_tv.c
index d02bc11..112c588 100644
--- a/src/i830_tv.c
+++ b/src/i830_tv.c
@@ -487,7 +487,7 @@ const static tv_mode_t tv_modes[] = {
.oversample = TV_OVERSAMPLE_8X,
.component_only = 0,
- .hsync_end = 64, .hblank_end = 128,
+ .hsync_end = 64, .hblank_end = 142,
.hblank_start = 844, .htotal = 863,
.progressive = FALSE, .trilevel_sync = FALSE,
@@ -548,7 +548,7 @@ const static tv_mode_t tv_modes[] = {
.veq_ena = FALSE,
.vi_end_f1 = 44, .vi_end_f2 = 44,
- .nbr_end = 496,
+ .nbr_end = 479,
.burst_ena = FALSE,
@@ -572,7 +572,7 @@ const static tv_mode_t tv_modes[] = {
.veq_ena = FALSE,
.vi_end_f1 = 44, .vi_end_f2 = 44,
- .nbr_end = 496,
+ .nbr_end = 479,
.burst_ena = FALSE,
@@ -733,7 +733,7 @@ const static tv_mode_t tv_modes[] = {
.component_only = 1,
.hsync_end = 88, .hblank_end = 235,
- .hblank_start = 2155, .htotal = 2200,
+ .hblank_start = 2155, .htotal = 2201,
.progressive = FALSE, .trilevel_sync = TRUE,
commit 5a42dd3bda2a4620be7192cab0f1e68d22267f0f
Author: Zhenyu Wang <zhenyu.z.wang@intel.com>
Date: Wed Oct 29 20:32:18 2008 +0800
TV: save serveral TV_CTL register fields in mode set
Driver should keep those fields according with spec.
diff --git a/src/i810_reg.h b/src/i810_reg.h
index 6458008..e9c03e5 100644
--- a/src/i810_reg.h
+++ b/src/i810_reg.h
@@ -1577,7 +1577,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
# define TV_ENC_C0_FIX (1 << 10)
/** Bits that must be preserved by software */
-# define TV_CTL_SAVE ((3 << 8) | (3 << 6))
+# define TV_CTL_SAVE ((1 << 11) | (3 << 9) | (7 << 6) | 0xf)
# define TV_FUSE_STATE_MASK (3 << 4)
/** Read-only state that reports all features enabled */
# define TV_FUSE_STATE_ENABLED (0 << 4)
diff --git a/src/i830_tv.c b/src/i830_tv.c
index 4063588..d02bc11 100644
--- a/src/i830_tv.c
+++ b/src/i830_tv.c
@@ -1042,7 +1042,8 @@ i830_tv_mode_set(xf86OutputPtr output, DisplayModePtr mode,
if (!tv_mode)
return; /* can't happen (mode_prepare prevents this) */
- tv_ctl = 0;
+ tv_ctl = INREG(TV_CTL);
+ tv_ctl &= TV_CTL_SAVE;
switch (dev_priv->type) {
default:
commit 558eaa44fbe3b1301757bcdb13137d38d06832b4
Author: Zhenyu Wang <zhenyu.z.wang@intel.com>
Date: Wed Oct 29 20:26:44 2008 +0800
TV: fix default contrast and saturation modifier
Color knobs was set with higher modifier which caused strong color
on TV screen. Setting fixed point modifier to default 1.0 makes picture
on TV look nicer.
diff --git a/src/i830_tv.c b/src/i830_tv.c
index de0e15d..4063588 100644
--- a/src/i830_tv.c
+++ b/src/i830_tv.c
@@ -1179,7 +1179,9 @@ i830_tv_mode_set(xf86OutputPtr output, DisplayModePtr mode,
(i830_float_to_csc(color_conversion->bv) << 16) |
(i830_float_to_luma(color_conversion->av)));
- OUTREG(TV_CLR_KNOBS, 0x00606000);
+ /* 2.6 fixed point value for contrast and saturation modifier,
+ use 1 as default */
+ OUTREG(TV_CLR_KNOBS, 0x00404000);
OUTREG(TV_CLR_LEVEL, ((video_levels->black << TV_BLACK_LEVEL_SHIFT) |
(video_levels->blank << TV_BLANK_LEVEL_SHIFT)));
{
commit feeef621d1e3eec7012238d4db47c00c19abbaac
Author: Zhenyu Wang <zhenyu.z.wang@intel.com>
Date: Wed Oct 29 20:26:03 2008 +0800
TV: white space cleanup
diff --git a/src/i830_tv.c b/src/i830_tv.c
index 0a33357..de0e15d 100644
--- a/src/i830_tv.c
+++ b/src/i830_tv.c
@@ -144,7 +144,7 @@ static const uint32_t filter_table[] = {
0x2EC03C80, 0x320029C0, 0x3D403080, 0x29402F00,
0x308031C0, 0x2F203DC0, 0x31802900, 0x3E8030C0,
0x28802F40, 0x30C03140, 0x2F203F40, 0x31402840,
- 0x28003100, 0x28002F00, 0x00003100, 0x36403000,
+ 0x28003100, 0x28002F00, 0x00003100, 0x36403000,
0x2D002CC0, 0x30003640, 0x2D0036C0,
0x35C02CC0, 0x37403000, 0x2C802D40, 0x30003540,
0x2D8037C0, 0x34C02C40, 0x38403000, 0x2BC02E00,
@@ -215,7 +215,7 @@ typedef struct {
*
* The constants below were all computed using a 107.520MHz clock
*/
-
+
/**
* Register programming values for TV modes.
*
@@ -225,7 +225,7 @@ typedef struct {
const static tv_mode_t tv_modes[] = {
{
.name = "NTSC-M",
- .clock = 107520,
+ .clock = 107520,
.refresh = 29.97,
.oversample = TV_OVERSAMPLE_8X,
.component_only = 0,
@@ -239,7 +239,7 @@ const static tv_mode_t tv_modes[] = {
.vsync_start_f1 = 6, .vsync_start_f2 = 7,
.vsync_len = 6,
- .veq_ena = TRUE, .veq_start_f1 = 0,
+ .veq_ena = TRUE, .veq_start_f1 = 0,
.veq_start_f2 = 1, .veq_len = 18,
.vi_end_f1 = 20, .vi_end_f2 = 21,
@@ -249,7 +249,7 @@ const static tv_mode_t tv_modes[] = {
.hburst_start = 72, .hburst_len = 34,
.vburst_start_f1 = 9, .vburst_end_f1 = 240,
.vburst_start_f2 = 10, .vburst_end_f2 = 240,
- .vburst_start_f3 = 9, .vburst_end_f3 = 240,
+ .vburst_start_f3 = 9, .vburst_end_f3 = 240,
.vburst_start_f4 = 10, .vburst_end_f4 = 240,
/* desired 3.5800000 actual 3.5800000 clock 107.52 */
@@ -276,7 +276,7 @@ const static tv_mode_t tv_modes[] = {
},
{
.name = "NTSC-443",
- .clock = 107520,
+ .clock = 107520,
.refresh = 29.97,
.oversample = TV_OVERSAMPLE_8X,
.component_only = 0,
@@ -289,7 +289,7 @@ const static tv_mode_t tv_modes[] = {
.vsync_start_f1 = 6, .vsync_start_f2 = 7,
.vsync_len = 6,
- .veq_ena = TRUE, .veq_start_f1 = 0,
+ .veq_ena = TRUE, .veq_start_f1 = 0,
.veq_start_f2 = 1, .veq_len = 18,
.vi_end_f1 = 20, .vi_end_f2 = 21,
@@ -299,7 +299,7 @@ const static tv_mode_t tv_modes[] = {
.hburst_start = 72, .hburst_len = 34,
.vburst_start_f1 = 9, .vburst_end_f1 = 240,
.vburst_start_f2 = 10, .vburst_end_f2 = 240,
- .vburst_start_f3 = 9, .vburst_end_f3 = 240,
+ .vburst_start_f3 = 9, .vburst_end_f3 = 240,
.vburst_start_f4 = 10, .vburst_end_f4 = 240,
/* desired 4.4336180 actual 4.4336180 clock 107.52 */
@@ -326,7 +326,7 @@ const static tv_mode_t tv_modes[] = {
},
{
.name = "NTSC-J",
- .clock = 107520,
+ .clock = 107520,
.refresh = 29.97,
.oversample = TV_OVERSAMPLE_8X,
.component_only = 0,
@@ -340,7 +340,7 @@ const static tv_mode_t tv_modes[] = {
.vsync_start_f1 = 6, .vsync_start_f2 = 7,
.vsync_len = 6,
- .veq_ena = TRUE, .veq_start_f1 = 0,
+ .veq_ena = TRUE, .veq_start_f1 = 0,
.veq_start_f2 = 1, .veq_len = 18,
.vi_end_f1 = 20, .vi_end_f2 = 21,
@@ -350,7 +350,7 @@ const static tv_mode_t tv_modes[] = {
.hburst_start = 72, .hburst_len = 34,
.vburst_start_f1 = 9, .vburst_end_f1 = 240,
.vburst_start_f2 = 10, .vburst_end_f2 = 240,
- .vburst_start_f3 = 9, .vburst_end_f3 = 240,
+ .vburst_start_f3 = 9, .vburst_end_f3 = 240,
.vburst_start_f4 = 10, .vburst_end_f4 = 240,
/* desired 3.5800000 actual 3.5800000 clock 107.52 */
@@ -377,7 +377,7 @@ const static tv_mode_t tv_modes[] = {
},
{
.name = "PAL-M",
- .clock = 107520,
+ .clock = 107520,
.refresh = 29.97,
.oversample = TV_OVERSAMPLE_8X,
.component_only = 0,
@@ -391,7 +391,7 @@ const static tv_mode_t tv_modes[] = {
.vsync_start_f1 = 6, .vsync_start_f2 = 7,
.vsync_len = 6,
- .veq_ena = TRUE, .veq_start_f1 = 0,
+ .veq_ena = TRUE, .veq_start_f1 = 0,
.veq_start_f2 = 1, .veq_len = 18,
.vi_end_f1 = 20, .vi_end_f2 = 21,
@@ -401,7 +401,7 @@ const static tv_mode_t tv_modes[] = {
.hburst_start = 72, .hburst_len = 34,
.vburst_start_f1 = 9, .vburst_end_f1 = 240,
.vburst_start_f2 = 10, .vburst_end_f2 = 240,
- .vburst_start_f3 = 9, .vburst_end_f3 = 240,
+ .vburst_start_f3 = 9, .vburst_end_f3 = 240,
.vburst_start_f4 = 10, .vburst_end_f4 = 240,
/* desired 3.5800000 actual 3.5800000 clock 107.52 */
@@ -429,7 +429,7 @@ const static tv_mode_t tv_modes[] = {
{
/* 625 Lines, 50 Fields, 15.625KHz line, Sub-Carrier 4.434MHz */
.name = "PAL-N",
- .clock = 107520,
+ .clock = 107520,
.refresh = 25.0,
.oversample = TV_OVERSAMPLE_8X,
.component_only = 0,
@@ -443,17 +443,17 @@ const static tv_mode_t tv_modes[] = {
.vsync_start_f1 = 6, .vsync_start_f2 = 7,
.vsync_len = 6,
- .veq_ena = TRUE, .veq_start_f1 = 0,
+ .veq_ena = TRUE, .veq_start_f1 = 0,
.veq_start_f2 = 1, .veq_len = 18,
.vi_end_f1 = 24, .vi_end_f2 = 25,
.nbr_end = 286,
.burst_ena = TRUE,
- .hburst_start = 73, .hburst_len = 34,
+ .hburst_start = 73, .hburst_len = 34,
.vburst_start_f1 = 8, .vburst_end_f1 = 285,
.vburst_start_f2 = 8, .vburst_end_f2 = 286,
- .vburst_start_f3 = 9, .vburst_end_f3 = 286,
+ .vburst_start_f3 = 9, .vburst_end_f3 = 286,
.vburst_start_f4 = 9, .vburst_end_f4 = 285,
@@ -482,7 +482,7 @@ const static tv_mode_t tv_modes[] = {
{
/* 625 Lines, 50 Fields, 15.625KHz line, Sub-Carrier 4.434MHz */
.name = "PAL",
- .clock = 107520,
+ .clock = 107520,
.refresh = 25.0,
.oversample = TV_OVERSAMPLE_8X,
.component_only = 0,
@@ -495,7 +495,7 @@ const static tv_mode_t tv_modes[] = {
.vsync_start_f1 = 5, .vsync_start_f2 = 6,
.vsync_len = 5,
- .veq_ena = TRUE, .veq_start_f1 = 0,
+ .veq_ena = TRUE, .veq_start_f1 = 0,
.veq_start_f2 = 1, .veq_len = 15,
.vi_end_f1 = 24, .vi_end_f2 = 25,
@@ -505,7 +505,7 @@ const static tv_mode_t tv_modes[] = {
.hburst_start = 73, .hburst_len = 32,
.vburst_start_f1 = 8, .vburst_end_f1 = 285,
.vburst_start_f2 = 8, .vburst_end_f2 = 286,
- .vburst_start_f3 = 9, .vburst_end_f3 = 286,
+ .vburst_start_f3 = 9, .vburst_end_f3 = 286,
.vburst_start_f4 = 9, .vburst_end_f4 = 285,
/* desired 4.4336180 actual 4.4336180 clock 107.52 */
@@ -532,7 +532,7 @@ const static tv_mode_t tv_modes[] = {
},
{
.name = "480p@59.94Hz",
- .clock = 107520,
+ .clock = 107520,
.refresh = 59.94,
.oversample = TV_OVERSAMPLE_4X,
.component_only = 1,
@@ -540,7 +540,7 @@ const static tv_mode_t tv_modes[] = {
.hsync_end = 64, .hblank_end = 122,
.hblank_start = 842, .htotal = 857,
- .progressive = TRUE,.trilevel_sync = FALSE,
+ .progressive = TRUE, .trilevel_sync = FALSE,
.vsync_start_f1 = 12, .vsync_start_f2 = 12,
.vsync_len = 12,
@@ -556,7 +556,7 @@ const static tv_mode_t tv_modes[] = {
},
{
.name = "480p@60Hz",
- .clock = 107520,
+ .clock = 107520,
.refresh = 60.0,
.oversample = TV_OVERSAMPLE_4X,
.component_only = 1,
@@ -564,7 +564,7 @@ const static tv_mode_t tv_modes[] = {
.hsync_end = 64, .hblank_end = 122,
.hblank_start = 842, .htotal = 856,
- .progressive = TRUE,.trilevel_sync = FALSE,
+ .progressive = TRUE, .trilevel_sync = FALSE,
.vsync_start_f1 = 12, .vsync_start_f2 = 12,
.vsync_len = 12,
@@ -580,7 +580,7 @@ const static tv_mode_t tv_modes[] = {
},
{
.name = "576p",
- .clock = 107520,
+ .clock = 107520,
.refresh = 50.0,
.oversample = TV_OVERSAMPLE_4X,
.component_only = 1,
@@ -588,7 +588,7 @@ const static tv_mode_t tv_modes[] = {
.hsync_end = 64, .hblank_end = 139,
.hblank_start = 859, .htotal = 863,
- .progressive = TRUE, .trilevel_sync = FALSE,
+ .progressive = TRUE, .trilevel_sync = FALSE,
.vsync_start_f1 = 10, .vsync_start_f2 = 10,
.vsync_len = 10,
@@ -604,7 +604,7 @@ const static tv_mode_t tv_modes[] = {
},
{
.name = "720p@60Hz",
- .clock = 148800,
+ .clock = 148800,
.refresh = 60.0,
.oversample = TV_OVERSAMPLE_2X,
.component_only = 1,
@@ -612,7 +612,7 @@ const static tv_mode_t tv_modes[] = {
.hsync_end = 80, .hblank_end = 300,
.hblank_start = 1580, .htotal = 1649,
- .progressive = TRUE, .trilevel_sync = TRUE,
+ .progressive = TRUE, .trilevel_sync = TRUE,
.vsync_start_f1 = 10, .vsync_start_f2 = 10,
.vsync_len = 10,
@@ -628,7 +628,7 @@ const static tv_mode_t tv_modes[] = {
},
{
.name = "720p@59.94Hz",
- .clock = 148800,
+ .clock = 148800,
.refresh = 59.94,
.oversample = TV_OVERSAMPLE_2X,
.component_only = 1,
@@ -636,7 +636,7 @@ const static tv_mode_t tv_modes[] = {
.hsync_end = 80, .hblank_end = 300,
.hblank_start = 1580, .htotal = 1651,
- .progressive = TRUE, .trilevel_sync = TRUE,
+ .progressive = TRUE, .trilevel_sync = TRUE,
.vsync_start_f1 = 10, .vsync_start_f2 = 10,
.vsync_len = 10,
@@ -652,7 +652,7 @@ const static tv_mode_t tv_modes[] = {
},
{
.name = "720p@50Hz",
- .clock = 148800,
+ .clock = 148800,
.refresh = 50.0,
.oversample = TV_OVERSAMPLE_2X,
.component_only = 1,
@@ -660,7 +660,7 @@ const static tv_mode_t tv_modes[] = {
.hsync_end = 80, .hblank_end = 300,
.hblank_start = 1580, .htotal = 1979,
- .progressive = TRUE, .trilevel_sync = TRUE,
+ .progressive = TRUE, .trilevel_sync = TRUE,
.vsync_start_f1 = 10, .vsync_start_f2 = 10,
.vsync_len = 10,
@@ -677,7 +677,7 @@ const static tv_mode_t tv_modes[] = {
},
{
.name = "1080i@50Hz",
- .clock = 148800,
+ .clock = 148800,
.refresh = 25.0,
.oversample = TV_OVERSAMPLE_2X,
.component_only = 1,
@@ -685,14 +685,13 @@ const static tv_mode_t tv_modes[] = {
.hsync_end = 88, .hblank_end = 235,
.hblank_start = 2155, .htotal = 2639,
- .progressive = FALSE, .trilevel_sync = TRUE,
+ .progressive = FALSE, .trilevel_sync = TRUE,
- .vsync_start_f1 = 4, .vsync_start_f2 = 5,
+ .vsync_start_f1 = 4, .vsync_start_f2 = 5,
.vsync_len = 10,
- .veq_ena = TRUE, .veq_start_f1 = 4,
- .veq_start_f2 = 4, .veq_len = 10,
-
+ .veq_ena = TRUE, .veq_start_f1 = 4,
+ .veq_start_f2 = 4, .veq_len = 10,
.vi_end_f1 = 21, .vi_end_f2 = 22,
.nbr_end = 539,
@@ -703,7 +702,7 @@ const static tv_mode_t tv_modes[] = {
},
{
.name = "1080i@60Hz",
- .clock = 148800,
+ .clock = 148800,
.refresh = 30.0,
.oversample = TV_OVERSAMPLE_2X,
.component_only = 1,
@@ -711,15 +710,14 @@ const static tv_mode_t tv_modes[] = {
.hsync_end = 88, .hblank_end = 235,
.hblank_start = 2155, .htotal = 2199,
- .progressive = FALSE, .trilevel_sync = TRUE,
+ .progressive = FALSE, .trilevel_sync = TRUE,
- .vsync_start_f1 = 4, .vsync_start_f2 = 5,
+ .vsync_start_f1 = 4, .vsync_start_f2 = 5,
.vsync_len = 10,
- .veq_ena = TRUE, .veq_start_f1 = 4,
+ .veq_ena = TRUE, .veq_start_f1 = 4,
.veq_start_f2 = 4, .veq_len = 10,
-
.vi_end_f1 = 21, .vi_end_f2 = 22,
.nbr_end = 539,
@@ -729,7 +727,7 @@ const static tv_mode_t tv_modes[] = {
},
{
.name = "1080i@59.94Hz",
- .clock = 148800,
+ .clock = 148800,
.refresh = 29.97,
.oversample = TV_OVERSAMPLE_2X,
.component_only = 1,
@@ -737,16 +735,16 @@ const static tv_mode_t tv_modes[] = {
.hsync_end = 88, .hblank_end = 235,
.hblank_start = 2155, .htotal = 2200,
- .progressive = FALSE, .trilevel_sync = TRUE,
+ .progressive = FALSE, .trilevel_sync = TRUE,
- .vsync_start_f1 = 4, .vsync_start_f2 = 5,
+ .vsync_start_f1 = 4, .vsync_start_f2 = 5,
.vsync_len = 10,
.veq_ena = TRUE, .veq_start_f1 = 4,
- .veq_start_f2 = 4, .veq_len = 10,
+ .veq_start_f2 = 4, .veq_len = 10,
- .vi_end_f1 = 21, .vi_end_f2 = 22,
+ .vi_end_f1 = 21, .vi_end_f2 = 22,
.nbr_end = 539,
.burst_ena = FALSE,
@@ -758,7 +756,7 @@ const static tv_mode_t tv_modes[] = {
#define NUM_TV_MODES sizeof(tv_modes) / sizeof (tv_modes[0])
static const video_levels_t component_level = {
- .blank = 279, .black = 279
+ .blank = 279, .black = 279, .burst = 0,
};
static const color_conversion_t sdtv_component_color = {
@@ -929,8 +927,8 @@ static const tv_mode_t *
i830_tv_mode_lookup (char *tv_format)
{
int i;
-
- for (i = 0; i < sizeof(tv_modes) / sizeof (tv_modes[0]); i++)
+
+ for (i = 0; i < sizeof(tv_modes) / sizeof (tv_modes[0]); i++)
{
const tv_mode_t *tv_mode = &tv_modes[i];
@@ -953,7 +951,7 @@ static int
i830_tv_mode_valid(xf86OutputPtr output, DisplayModePtr mode)
{
const tv_mode_t *tv_mode = i830_tv_mode_find (output);
-
+
if (tv_mode && fabs (tv_mode->refresh - xf86ModeVRefresh (mode)) < 1.0)
return MODE_OK;
return MODE_CLOCK_RANGE;
@@ -971,8 +969,8 @@ i830_tv_mode_fixup(xf86OutputPtr output, DisplayModePtr mode,
if (!tv_mode)
return FALSE;
-
- for (i = 0; i < xf86_config->num_output; i++)
+
+ for (i = 0; i < xf86_config->num_output; i++)
{
xf86OutputPtr other_output = xf86_config->output[i];
@@ -1040,10 +1038,10 @@ i830_tv_mode_set(xf86OutputPtr output, DisplayModePtr mode,
const video_levels_t *video_levels;
const color_conversion_t *color_conversion;
Bool burst_ena;
-
+
if (!tv_mode)
return; /* can't happen (mode_prepare prevents this) */
-
+
tv_ctl = 0;
switch (dev_priv->type) {
@@ -1207,7 +1205,7 @@ i830_tv_mode_set(xf86OutputPtr output, DisplayModePtr mode,
i830WaitForVblank(pScrn);
/* Filter ctl must be set before TV_WIN_SIZE */
- OUTREG(TV_FILTER_CTL_1, TV_AUTO_SCALE);
+ OUTREG(TV_FILTER_CTL_1, TV_AUTO_SCALE);
xsize = tv_mode->hblank_start - tv_mode->hblank_end;
if (tv_mode->progressive)
ysize = tv_mode->nbr_end + 1;
@@ -1216,9 +1214,9 @@ i830_tv_mode_set(xf86OutputPtr output, DisplayModePtr mode,
xpos += dev_priv->margin[TV_MARGIN_LEFT];
ypos += dev_priv->margin[TV_MARGIN_TOP];
- xsize -= (dev_priv->margin[TV_MARGIN_LEFT] +
+ xsize -= (dev_priv->margin[TV_MARGIN_LEFT] +
dev_priv->margin[TV_MARGIN_RIGHT]);
- ysize -= (dev_priv->margin[TV_MARGIN_TOP] +
+ ysize -= (dev_priv->margin[TV_MARGIN_TOP] +
dev_priv->margin[TV_MARGIN_BOTTOM]);
OUTREG(TV_WIN_POS, (xpos<<16)|ypos);
OUTREG(TV_WIN_SIZE, (xsize<<16)|ysize);
@@ -1227,7 +1225,7 @@ i830_tv_mode_set(xf86OutputPtr output, DisplayModePtr mode,
OUTREG(dspcntr_reg, dspcntr);
/* Flush the plane changes */
OUTREG(dspbase_reg, INREG(dspbase_reg));
- }
+ }
j = 0;
for (i = 0; i < 60; i++)
@@ -1381,7 +1379,7 @@ i830_tv_detect(xf86OutputPtr output)
i830_tv_format_configure_property (output);
#endif
}
-
+
switch (type) {
case TV_TYPE_NONE:
return XF86OutputStatusDisconnected;
@@ -1394,8 +1392,8 @@ i830_tv_detect(xf86OutputPtr output)
static struct input_res {
char *name;
- int w, h;
-} input_res_table[] =
+ int w, h;
+} input_res_table[] =
{
{"640x480", 640, 480},
{"800x600", 800, 600},
@@ -1425,16 +1423,16 @@ i830_tv_get_modes(xf86OutputPtr output)
struct input_res *input = &input_res_table[j];
unsigned int hactive_s = input->w;
unsigned int vactive_s = input->h;
-
+
if (tv_mode->max_srcw && input->w > tv_mode->max_srcw)
continue;
- if (input->w > 1024 && (!tv_mode->progressive
+ if (input->w > 1024 && (!tv_mode->progressive
&& !tv_mode->component_only))
continue;
mode_ptr = xnfcalloc(1, sizeof(DisplayModeRec));
- mode_ptr->name = xnfalloc(strlen(input->name) + 1);
+ mode_ptr->name = xnfalloc(strlen(input->name) + 1);
strcpy (mode_ptr->name, input->name);
mode_ptr->HDisplay = hactive_s;
@@ -1451,17 +1449,17 @@ i830_tv_get_modes(xf86OutputPtr output)
mode_ptr->VSyncEnd = mode_ptr->VSyncStart + 1;
mode_ptr->VTotal = vactive_s + 33;
- mode_ptr->Clock = (int) (tv_mode->refresh *
- mode_ptr->VTotal *
+ mode_ptr->Clock = (int) (tv_mode->refresh *
+ mode_ptr->VTotal *
mode_ptr->HTotal / 1000.0);
-
+
mode_ptr->type = M_T_DRIVER;
mode_ptr->next = ret;
mode_ptr->prev = NULL;
if (ret != NULL)
ret->prev = mode_ptr;
ret = mode_ptr;
- }
+ }
return ret;
}
@@ -1499,7 +1497,6 @@ i830_tv_format_set_property (xf86OutputPtr output)
return err == Success;
}
-
/**
* Configure the TV_FORMAT property to list only supported formats
*
@@ -1515,16 +1512,16 @@ i830_tv_format_configure_property (xf86OutputPtr output)
Atom current_atoms[NUM_TV_MODES];
int num_atoms = 0;
int i;
-
+
if (!output->randr_output)
return Success;
for (i = 0; i < NUM_TV_MODES; i++)
if (!tv_modes[i].component_only || dev_priv->type == TV_TYPE_COMPONENT)
current_atoms[num_atoms++] = tv_format_name_atoms[i];
-
+
return RRConfigureOutputProperty(output->randr_output, tv_format_atom,
- TRUE, FALSE, FALSE,
+ TRUE, FALSE, FALSE,
num_atoms, (INT32 *) current_atoms);
}
@@ -1573,7 +1570,7 @@ i830_tv_create_resources(xf86OutputPtr output)
range[1] = 100;
err = RRConfigureOutputProperty(output->randr_output, margin_atoms[i],
TRUE, TRUE, FALSE, 2, range);
-
+
if (err != 0)
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"RRConfigureOutputProperty error, %d\n", err);
@@ -1595,8 +1592,8 @@ i830_tv_set_property(xf86OutputPtr output, Atom property,
RRPropertyValuePtr value)
{
int i;
-
- if (property == tv_format_atom)
+
+ if (property == tv_format_atom)
{
I830OutputPrivatePtr intel_output = output->driver_private;
struct i830_tv_priv *dev_priv = intel_output->dev_priv;
@@ -1609,7 +1606,7 @@ i830_tv_set_property(xf86OutputPtr output, Atom property,
memcpy (&atom, value->data, 4);
name = NameForAtom (atom);
-
+
val = xalloc (strlen (name) + 1);
if (!val)
return FALSE;
@@ -1652,7 +1649,7 @@ i830_tv_get_crtc(xf86OutputPtr output)
ScrnInfoPtr pScrn = output->scrn;
I830Ptr pI830 = I830PTR(pScrn);
int pipe = !!(INREG(TV_CTL) & TV_ENC_PIPEB_SELECT);
-
+
return i830_pipe_to_crtc(pScrn, pipe);
}
#endif
@@ -1712,7 +1709,7 @@ i830_tv_init(ScrnInfoPtr pScrn)
* bit, (either as a 0 or a 1), assume it doesn't really
* exist
*/
- if ((tv_dac_on & TVDAC_STATE_CHG_EN) == 0 ||
+ if ((tv_dac_on & TVDAC_STATE_CHG_EN) == 0 ||
(tv_dac_off & TVDAC_STATE_CHG_EN) != 0)
return;
@@ -1739,24 +1736,24 @@ i830_tv_init(ScrnInfoPtr pScrn)
dev_priv->type = TV_TYPE_UNKNOWN;
dev_priv->tv_format = NULL;
-
+
/* BIOS margin values */
dev_priv->margin[TV_MARGIN_LEFT] = 54;
dev_priv->margin[TV_MARGIN_TOP] = 36;
dev_priv->margin[TV_MARGIN_RIGHT] = 46;
dev_priv->margin[TV_MARGIN_BOTTOM] = 37;
-
+
if (output->conf_monitor)
{
char *tv_format;
-
+
tv_format = xf86findOptionValue (output->conf_monitor->mon_option_lst, "TV Format");
if (tv_format)
dev_priv->tv_format = xstrdup (tv_format);
}
if (!dev_priv->tv_format)
dev_priv->tv_format = xstrdup (tv_modes[0].name);
-
+
output->driver_private = intel_output;
output->interlaceAllowed = FALSE;
output->doubleScanAllowed = FALSE;
commit d24fcca4e3251098119ca2a50dc73ab3ad2bd6b6
Author: Zhenyu Wang <zhenyu.z.wang@intel.com>
Date: Thu Nov 6 10:14:00 2008 +0800
SDVO: fix more command definition errors
diff --git a/src/i830_sdvo_regs.h b/src/i830_sdvo_regs.h
index 11e49c8..5d5bf98 100644
--- a/src/i830_sdvo_regs.h
+++ b/src/i830_sdvo_regs.h
@@ -566,7 +566,7 @@ struct i830_sdvo_enhancements_reply {
#define SDVO_CMD_GET_MAX_2D_FLICKER_FITER 0x52
#define SDVO_CMD_GET_MAX_SATURATION 0x55
#define SDVO_CMD_GET_MAX_HUE 0x58
-#define SDVO_CMD_GET_MAX_BRIGHTNESS 0x5c
+#define SDVO_CMD_GET_MAX_BRIGHTNESS 0x5b
#define SDVO_CMD_GET_MAX_CONTRAST 0x5e
#define SDVO_CMD_GET_MAX_OVERSCAN_H 0x61
#define SDVO_CMD_GET_MAX_OVERSCAN_V 0x64
@@ -580,8 +580,8 @@ struct i830_sdvo_enhancement_limits_reply {
uint16_t default_value;
} __attribute__((packed));
-#define SDVO_CMD_GET_FLICKER_FITER 0x4d
-#define SDVO_CMD_SET_FLICKER_FITER 0x4e
+#define SDVO_CMD_GET_FLICKER_FILTER 0x4e
+#define SDVO_CMD_SET_FLICKER_FILTER 0x4f
#define SDVO_CMD_GET_ADAPTIVE_FLICKER_FITER 0x50
#define SDVO_CMD_SET_ADAPTIVE_FLICKER_FITER 0x51
#define SDVO_CMD_GET_2D_FLICKER_FITER 0x53
commit 7938adce1c848beb83db59eb5fa95bf77c41269c
Author: Zhenyu Wang <zhenyu.z.wang@intel.com>
Date: Mon Nov 3 16:05:28 2008 +0800
SDVO: add command for set monitor power state
SDVO encoder power state must be higher than monitor's state.
This only adds command and doesn't enable monitor power state
setting yet.
diff --git a/src/i830_sdvo.c b/src/i830_sdvo.c
index 75a8d02..4a424de 100644
--- a/src/i830_sdvo.c
+++ b/src/i830_sdvo.c
@@ -231,8 +231,9 @@ const static struct _sdvo_cmd_name {
SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
- SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODER_POWER_STATE),
+ SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
+ SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
diff --git a/src/i830_sdvo_regs.h b/src/i830_sdvo_regs.h
index 5ec22d4..11e49c8 100644
--- a/src/i830_sdvo_regs.h
+++ b/src/i830_sdvo_regs.h
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