xserver-xorg-video-nouveau: Changes to 'debian-experimental'
debian/changelog | 47 +++
debian/control | 2
src/Makefile.am | 7
src/drmmode_display.c | 183 ++++++++++++
src/nouveau_bo.c | 2
src/nouveau_bo.h | 1
src/nouveau_class.h | 465 +++++++++++++++++++-----------
src/nouveau_local.h | 92 +++---
src/nouveau_output.h | 1
src/nouveau_xv.c | 221 +++++++++++---
src/nv04_xv_blit.c | 69 ++--
src/nv10_exa.c | 541 ++++++++++++++++++-----------------
src/nv30_exa.c | 452 +++++++++++++++---------------
src/nv30_shaders.c | 64 ++--
src/nv30_xv_tex.c | 153 +++++-----
src/nv40_exa.c | 423 ++++++++++++++--------------
src/nv40_xv_tex.c | 157 +++++-----
src/nv50_accel.c | 342 ++++++++++++++++++++++
src/nv50_accel.h | 52 +++
src/nv50_dac.c | 1
src/nv50_exa.c | 752 ++++++++++++++++++++++++++++++++++++++++----------
src/nv50_output.c | 2
src/nv50_randr.c | 36 --
src/nv50_sor.c | 10
src/nv50_texture.h | 124 ++++++++
src/nv50_xv.c | 262 +++++++++++++++++
src/nv_accel_common.c | 301 ++++++++++----------
src/nv_bios.c | 37 ++
src/nv_dma.c | 25 -
src/nv_dri.c | 2
src/nv_driver.c | 2
src/nv_exa.c | 437 +++++++++++++++++------------
src/nv_output.c | 8
src/nv_proto.h | 14
src/nv_type.h | 2
src/vl_hwmc.c | 148 +++++++++
src/vl_hwmc.h | 11
37 files changed, 3762 insertions(+), 1686 deletions(-)
New commits:
commit 1d2329e553dd8322b4a32e4af6590aa9afc50874
Author: Chris Lamb <chris@chris-lamb.co.uk>
Date: Sun Aug 3 17:39:38 2008 +0100
Update dependency on libdrm-dev. Move to ">=" relation.
Signed-off-by: Chris Lamb <chris@chris-lamb.co.uk>
diff --git a/debian/changelog b/debian/changelog
index a950405..2e1413d 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -40,6 +40,8 @@ xserver-xorg-video-nouveau (1:0.0.10~git+20080803+30f54f2-1) experimental; urgen
- ad56c5e... nv50: exa composite
- 33fad27... nv50: tile offscreen pixmaps
- 5c1deac... exa: pass window coords to m2mf-based UTS/DFS
+ * Update dependency on libdrm-dev. Move to ">=" relation to make package
+ binNMU safe.
-- Chris Lamb <chris@chris-lamb.co.uk> Sun, 03 Aug 2008 17:34:24 +0100
diff --git a/debian/control b/debian/control
index bc30c41..454dfe3 100644
--- a/debian/control
+++ b/debian/control
@@ -3,7 +3,7 @@ Section: x11
Priority: optional
Maintainer: Debian X Strike Force <debian-x@lists.debian.org>
Uploaders: Chris Lamb <chris@chris-lamb.co.uk>, Matthew Johnson <mjj29@debian.org>
-Build-Depends: debhelper (>= 5), pkg-config, xserver-xorg-dev (>= 2:1.2.99.902), x11proto-video-dev, x11proto-core-dev, x11proto-fonts-dev, x11proto-randr-dev (>= 1.2), x11proto-render-dev, x11proto-xext-dev, libdrm-dev (= 2.3.1+git+20080706+401f77a-1), x11proto-xf86dri-dev, x11proto-gl-dev, mesa-common-dev, git-core, automake, libtool, xutils-dev, xserver-xorg-dev
+Build-Depends: debhelper (>= 5), pkg-config, xserver-xorg-dev (>= 2:1.2.99.902), x11proto-video-dev, x11proto-core-dev, x11proto-fonts-dev, x11proto-randr-dev (>= 1.2), x11proto-render-dev, x11proto-xext-dev, libdrm-dev (>= 2.3.1+git+20080803+4585787), x11proto-xf86dri-dev, x11proto-gl-dev, mesa-common-dev, git-core, automake, libtool, xutils-dev, xserver-xorg-dev
Standards-Version: 3.8.0
Homepage: http://nouveau.freedesktop.org/wiki/
Vcs-Git: git://git.debian.org/git/pkg-xorg/driver/xserver-xorg-video-nouveau
commit 28443fad95ce9cbd6ed28639020c6810b950a026
Author: Chris Lamb <chris@chris-lamb.co.uk>
Date: Sun Aug 3 17:36:06 2008 +0100
New upstream snapshot.
Signed-off-by: Chris Lamb <chris@chris-lamb.co.uk>
diff --git a/debian/changelog b/debian/changelog
index 0de6cd2..a950405 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,3 +1,48 @@
+xserver-xorg-video-nouveau (1:0.0.10~git+20080803+30f54f2-1) experimental; urgency=low
+
+ * New upstream snapshot:
+ - 89d7864... nv50: fix mystery typo
+ - c0b67f3... remove use of implicit variables from pushbuf macros
+ - 80278c9... g3dvl: Basic XvMC initialization.
+ - 1f8e27f... NV50: I was proven wrong quicker than i thought, reinstate a
+ slightly prettier hack.
+ - 41d46f5... NV50: forgot something
+ - 1b90524... NV50: my best guess at the lvds bios table, time will tell
+ if it's correct for more than a few cases
+ - f3ec6e0... nouveau: fix macro as pointed out my moondrake on irc
+ - 6652e9c... nv50: support YUY2 in textured video adaptor
+ - 3534f40... nv50: remove 32bpp solid fill fallback
+ - 87f7d1f... Revert "NV50EXA: read the notes + cleanup + enabled 32bpp
+ solid fill"
+ - ba7c239... NV50EXA: serious brain fart of my part, sorry
+ - 0b6249f... NV50EXA: read the notes + cleanup + enabled 32bpp solid fill
+ - edbfbd0... EXA: put NOUVEAU_FALLBACK in a do { } while (0), fixed opera
+ corruption for me.
+ - 36d1308... NV50_KMS: some basic scaling and dithering output property
+ support
+ - 022a9ed... nv50: no more sync in composite() :)
+ - 6d8096c... nv50: sync after composite for the moment
+ - c68d880... nv50: punt vertex emission macro out to header
+ - 4ad74cb... exa: missed a reloc delta
+ - 98a9056... nv50: remove acquire/release surface stuff
+ - f0305a2... exa: rename m2mf locals to prevent some confusion
+ - 140c36e... randr12: fix dithering output property endian issue (#16624)
+ - b36802f... Fix for #14858 - freebsd compile. Someone still needs to fix
+ the kernel part though.
+ - 6f5e90a... nv30: more header name changes...
+ - 4b8427a... nv30: more bustage from header update
+ - 1672a78... nv30: un-change something that somehow changed in an earlier
+ commit. oops!
+ - dae5958... nv50: exa/xv share some stuff, punt it out to nv50_accel.[ch]
+ - 17fbd81... nv50: Xv support
+ - ec45278... nv50: de-magic things before someone accuses me of being an
+ NVIDIA employee
+ - ad56c5e... nv50: exa composite
+ - 33fad27... nv50: tile offscreen pixmaps
+ - 5c1deac... exa: pass window coords to m2mf-based UTS/DFS
+
+ -- Chris Lamb <chris@chris-lamb.co.uk> Sun, 03 Aug 2008 17:34:24 +0100
+
xserver-xorg-video-nouveau (1:0.0.10~git+20080706+b1f3169-1) experimental; urgency=low
* New upstream snapshot:
commit 89d786435267af58bcecaff206a09b035e666df5
Author: Ben Skeggs <skeggsb@gmail.com>
Date: Tue Jul 29 23:38:45 2008 +1000
nv50: fix mystery typo
diff --git a/src/nv_accel_common.c b/src/nv_accel_common.c
index 9b0a2ab..4e82c4e 100644
--- a/src/nv_accel_common.c
+++ b/src/nv_accel_common.c
@@ -466,7 +466,7 @@ NVAccelInit2D_NV50(ScrnInfoPtr pScrn)
if (nouveau_grobj_alloc(chan, Nv2D, 0x502d, &pNv->Nv2D))
return FALSE;
}
- eng2d = pNv->Nv3D;
+ eng2d = pNv->Nv2D;
BEGIN_RING(chan, eng2d, 0x180, 3);
OUT_RING (chan, pNv->notify0->handle);
commit c0b67f3f3490e826c86eedb32bbcf327592aaaf5
Author: Ben Skeggs <skeggsb@gmail.com>
Date: Tue Jul 29 01:26:20 2008 +1000
remove use of implicit variables from pushbuf macros
This matches the gallium winsys now. At some point the ddx will get updates
so the "common" code is once again in sync to make it easier to do mm
changes to both the ddx and dri simultaneously.
But, I want to get this part out of the way first as the changes might take
a bit of work - and I don't want to have to deal with merge conflicts
everywhere if someone changes the accel code before I'm done :)
diff --git a/src/nouveau_local.h b/src/nouveau_local.h
index 76e0d30..54d62e5 100644
--- a/src/nouveau_local.h
+++ b/src/nouveau_local.h
@@ -64,95 +64,95 @@ struct nouveau_pixmap {
#define NOUVEAU_DMA_TIMEOUT 2000
/* Push buffer access macros */
-#define BEGIN_RING(obj,mthd,size) do { \
- BEGIN_RING_CH(pNv->chan, pNv->obj, (mthd), (size)); \
+#define BEGIN_RING(chan,obj,mthd,size) do { \
+ BEGIN_RING_CH((chan), (obj), (mthd), (size)); \
} while(0)
-#define OUT_RING(data) do { \
- OUT_RING_CH(pNv->chan, (data)); \
+#define OUT_RING(chan,data) do { \
+ OUT_RING_CH((chan), (data)); \
} while(0)
-#define OUT_RINGp(src,size) do { \
- OUT_RINGp_CH(pNv->chan, (src), (size)); \
+#define OUT_RINGp(chan,src,size) do { \
+ OUT_RINGp_CH((chan), (src), (size)); \
} while(0)
-#define OUT_RINGf(data) do { \
+#define OUT_RINGf(chan,data) do { \
union { float v; uint32_t u; } c; \
c.v = (data); \
- OUT_RING(c.u); \
+ OUT_RING((chan), c.u); \
} while(0)
-#define WAIT_RING(size) do { \
- WAIT_RING_CH(pNv->chan, (size)); \
+#define WAIT_RING(chan,size) do { \
+ WAIT_RING_CH((chan), (size)); \
} while(0)
-#define FIRE_RING() do { \
- FIRE_RING_CH(pNv->chan); \
+#define FIRE_RING(chan) do { \
+ FIRE_RING_CH((chan)); \
} while(0)
-#define OUT_RELOC(bo,data,flags,vor,tor) do { \
- struct nouveau_channel_priv *chan = nouveau_channel(pNv->chan); \
- nouveau_bo_emit_reloc(&chan->base, &chan->pushbuf[chan->dma.cur], \
+#define OUT_RELOC(chan,bo,data,flags,vor,tor) do { \
+ struct nouveau_channel_priv *nvchan = nouveau_channel(chan); \
+ nouveau_bo_emit_reloc((chan), &nvchan->pushbuf[nvchan->dma.cur], \
(bo), (data), (flags), (vor), (tor)); \
- OUT_RING(0); \
+ OUT_RING((chan), 0); \
} while(0)
/* Raw data + flags depending on FB/TT buffer */
-#define OUT_RELOCd(bo,data,flags,vor,tor) do { \
- OUT_RELOC((bo), (data), (flags) | NOUVEAU_BO_OR, (vor), (tor)); \
+#define OUT_RELOCd(chan,bo,data,flags,vor,tor) do { \
+ OUT_RELOC((chan), (bo), (data), (flags) | NOUVEAU_BO_OR, (vor), (tor));\
} while(0)
/* FB/TT object handle */
-#define OUT_RELOCo(bo,flags) do { \
- OUT_RELOC((bo), 0, (flags) | NOUVEAU_BO_OR, \
- pNv->chan->vram->handle, pNv->chan->gart->handle); \
+#define OUT_RELOCo(chan,bo,flags) do { \
+ OUT_RELOC((chan), (bo), 0, (flags) | NOUVEAU_BO_OR, \
+ (chan)->vram->handle, (chan)->gart->handle); \
} while(0)
/* Low 32-bits of offset */
-#define OUT_RELOCl(bo,delta,flags) do { \
- OUT_RELOC((bo), (delta), (flags) | NOUVEAU_BO_LOW, 0, 0); \
+#define OUT_RELOCl(chan,bo,delta,flags) do { \
+ OUT_RELOC((chan), (bo), (delta), (flags) | NOUVEAU_BO_LOW, 0, 0); \
} while(0)
/* High 32-bits of offset */
-#define OUT_RELOCh(bo,delta,flags) do { \
- OUT_RELOC((bo), (delta), (flags) | NOUVEAU_BO_HIGH, 0, 0); \
+#define OUT_RELOCh(chan,bo,delta,flags) do { \
+ OUT_RELOC((chan), (bo), (delta), (flags) | NOUVEAU_BO_HIGH, 0, 0); \
} while(0)
/* Alternate versions of OUT_RELOCx above, takes pixmaps instead of BOs */
#if NOUVEAU_EXA_PIXMAPS
-#define OUT_PIXMAPd(pm,data,flags,vor,tor) do { \
+#define OUT_PIXMAPd(chan,pm,data,flags,vor,tor) do { \
struct nouveau_pixmap *nvpix = exaGetPixmapDriverPrivate((pm)); \
struct nouveau_bo *pmo = nvpix->bo; \
- OUT_RELOCd(pmo, (data), (flags), (vor), (tor)); \
+ OUT_RELOCd((chan), pmo, (data), (flags), (vor), (tor)); \
} while(0)
-#define OUT_PIXMAPo(pm,flags) do { \
+#define OUT_PIXMAPo(chan,pm,flags) do { \
struct nouveau_pixmap *nvpix = exaGetPixmapDriverPrivate((pm)); \
struct nouveau_bo *pmo = nvpix->bo; \
- OUT_RELOCo(pmo, (flags)); \
+ OUT_RELOCo((chan), pmo, (flags)); \
} while(0)
-#define OUT_PIXMAPl(pm,delta,flags) do { \
+#define OUT_PIXMAPl(chan,pm,delta,flags) do { \
struct nouveau_pixmap *nvpix = exaGetPixmapDriverPrivate((pm)); \
struct nouveau_bo *pmo = nvpix->bo; \
- OUT_RELOCl(pmo, (delta), (flags)); \
+ OUT_RELOCl((chan), pmo, (delta), (flags)); \
} while(0)
-#define OUT_PIXMAPh(pm,delta,flags) do { \
+#define OUT_PIXMAPh(chan,pm,delta,flags) do { \
struct nouveau_pixmap *nvpix = exaGetPixmapDriverPrivate((pm)); \
struct nouveau_bo *pmo = nvpix->bo; \
- OUT_RELOCh(pmo, (delta), (flags)); \
+ OUT_RELOCh((chan), pmo, (delta), (flags)); \
} while(0)
#else
-#define OUT_PIXMAPd(pm,data,flags,vor,tor) do { \
- OUT_RELOCd(pNv->FB, (data), (flags), (vor), (tor)); \
+#define OUT_PIXMAPd(chan,pm,data,flags,vor,tor) do { \
+ OUT_RELOCd((chan), pNv->FB, (data), (flags), (vor), (tor)); \
} while(0)
-#define OUT_PIXMAPo(pm,flags) do { \
- OUT_RELOCo(pNv->FB, (flags)); \
+#define OUT_PIXMAPo(chan,pm,flags) do { \
+ OUT_RELOCo((chan), pNv->FB, (flags)); \
} while(0)
-#define OUT_PIXMAPl(pm,delta,flags) do { \
- OUT_RELOCl(pNv->FB, exaGetPixmapOffset(pm) + (delta), (flags)); \
+#define OUT_PIXMAPl(chan,pm,delta,flags) do { \
+ OUT_RELOCl((chan), pNv->FB, exaGetPixmapOffset(pm) + (delta), (flags));\
} while(0)
-#define OUT_PIXMAPh(pm,delta,flags) do { \
- OUT_RELOCh(pNv->FB, exaGetPixmapOffset(pm) + (delta), (flags)); \
+#define OUT_PIXMAPh(chan,pm,delta,flags) do { \
+ OUT_RELOCh((chan), pNv->FB, exaGetPixmapOffset(pm) + (delta), (flags));\
} while(0)
#endif
diff --git a/src/nouveau_xv.c b/src/nouveau_xv.c
index 2f6e37f..4c7e371 100644
--- a/src/nouveau_xv.c
+++ b/src/nouveau_xv.c
@@ -230,15 +230,17 @@ void
NVWaitVSync(ScrnInfoPtr pScrn, int crtc)
{
NVPtr pNv = NVPTR(pScrn);
-
- BEGIN_RING(NvImageBlit, 0x0000012C, 1);
- OUT_RING (0);
- BEGIN_RING(NvImageBlit, 0x00000134, 1);
- OUT_RING (crtc);
- BEGIN_RING(NvImageBlit, 0x00000100, 1);
- OUT_RING (0);
- BEGIN_RING(NvImageBlit, 0x00000130, 1);
- OUT_RING (0);
+ struct nouveau_channel *chan = pNv->chan;
+ struct nouveau_grobj *blit = pNv->NvImageBlit;
+
+ BEGIN_RING(chan, blit, 0x0000012C, 1);
+ OUT_RING (chan, 0);
+ BEGIN_RING(chan, blit, 0x00000134, 1);
+ OUT_RING (chan, crtc);
+ BEGIN_RING(chan, blit, 0x00000100, 1);
+ OUT_RING (chan, 0);
+ BEGIN_RING(chan, blit, 0x00000130, 1);
+ OUT_RING (chan, 0);
}
/**
@@ -1035,6 +1037,8 @@ NVPutImage(ScrnInfoPtr pScrn, short src_x, short src_y, short drw_x,
* and lines we are interested in
*/
int top = 0, left = 0, right = 0, bottom = 0, npixels = 0, nlines = 0;
+ struct nouveau_channel *chan = pNv->chan;
+ struct nouveau_grobj *m2mf = pNv->NvMemFormat;
Bool skip = FALSE;
BoxRec dstBox;
CARD32 tmp = 0;
@@ -1229,23 +1233,23 @@ NVPutImage(ScrnInfoPtr pScrn, short src_x, short src_y, short drw_x,
}
}
- BEGIN_RING(NvMemFormat,
+ BEGIN_RING(chan, m2mf,
NV04_MEMORY_TO_MEMORY_FORMAT_DMA_BUFFER_IN, 2);
- OUT_RING (pNv->chan->gart->handle);
- OUT_RING (pNv->chan->vram->handle);
+ OUT_RING (chan, pNv->chan->gart->handle);
+ OUT_RING (chan, pNv->chan->vram->handle);
if (pNv->Architecture >= NV_ARCH_50) {
- BEGIN_RING(NvMemFormat, 0x0200, 1);
- OUT_RING (1);
-
- BEGIN_RING(NvMemFormat, 0x021c, 7);
- OUT_RING (0);
- OUT_RING (0);
- OUT_RING (dstPitch);
- OUT_RING (nlines);
- OUT_RING (1);
- OUT_RING (0);
- OUT_RING (0);
+ BEGIN_RING(chan, m2mf, 0x0200, 1);
+ OUT_RING (chan, 1);
+
+ BEGIN_RING(chan, m2mf, 0x021c, 7);
+ OUT_RING (chan, 0);
+ OUT_RING (chan, 0);
+ OUT_RING (chan, dstPitch);
+ OUT_RING (chan, nlines);
+ OUT_RING (chan, 1);
+ OUT_RING (chan, 0);
+ OUT_RING (chan, 0);
}
/* DMA to VRAM */
@@ -1253,32 +1257,33 @@ NVPutImage(ScrnInfoPtr pScrn, short src_x, short src_y, short drw_x,
!(action_flags & CONVERT_TO_YUY2)) {
/* we start the color plane transfer separately */
- BEGIN_RING(NvMemFormat,
+ BEGIN_RING(chan, m2mf,
NV04_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
- OUT_RELOCl(destination_buffer, line_len * nlines,
+ OUT_RELOCl(chan, destination_buffer, line_len * nlines,
NOUVEAU_BO_GART | NOUVEAU_BO_RD);
- OUT_RELOCl(pPriv->video_mem, offset + dstPitch * nlines,
+ OUT_RELOCl(chan, pPriv->video_mem,
+ offset + dstPitch * nlines,
NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
- OUT_RING (line_len);
- OUT_RING (dstPitch);
- OUT_RING (line_len);
- OUT_RING ((nlines >> 1));
- OUT_RING ((1<<8)|1);
- OUT_RING (0);
+ OUT_RING (chan, line_len);
+ OUT_RING (chan, dstPitch);
+ OUT_RING (chan, line_len);
+ OUT_RING (chan, (nlines >> 1));
+ OUT_RING (chan, (1<<8)|1);
+ OUT_RING (chan, 0);
}
- BEGIN_RING(NvMemFormat,
+ BEGIN_RING(chan, m2mf,
NV04_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
- OUT_RELOCl(destination_buffer, 0,
+ OUT_RELOCl(chan, destination_buffer, 0,
NOUVEAU_BO_GART | NOUVEAU_BO_RD);
- OUT_RELOCl(pPriv->video_mem, offset,
+ OUT_RELOCl(chan, pPriv->video_mem, offset,
NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
- OUT_RING (line_len);
- OUT_RING (dstPitch);
- OUT_RING (line_len);
- OUT_RING (nlines);
- OUT_RING ((1<<8)|1);
- OUT_RING (0);
+ OUT_RING (chan, line_len);
+ OUT_RING (chan, dstPitch);
+ OUT_RING (chan, line_len);
+ OUT_RING (chan, nlines);
+ OUT_RING (chan, (1<<8)|1);
+ OUT_RING (chan, 0);
if (destination_buffer == pNv->GART) {
nouveau_notifier_reset(pNv->notify0, 0);
@@ -1288,23 +1293,23 @@ NVPutImage(ScrnInfoPtr pScrn, short src_x, short src_y, short drw_x,
nouveau_notifier_reset(n, 0);
- BEGIN_RING(NvMemFormat,
+ BEGIN_RING(chan, m2mf,
NV04_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY, 1);
- OUT_RING (n->handle);
+ OUT_RING (chan, n->handle);
}
- BEGIN_RING(NvMemFormat, NV04_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1);
- OUT_RING (0);
- BEGIN_RING(NvMemFormat, 0x100, 1);
- OUT_RING (0);
+ BEGIN_RING(chan, m2mf, NV04_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1);
+ OUT_RING (chan, 0);
+ BEGIN_RING(chan, m2mf, 0x100, 1);
+ OUT_RING (chan, 0);
/* Put back NvDmaNotifier0 for EXA */
- BEGIN_RING(NvMemFormat,
+ BEGIN_RING(chan, m2mf,
NV04_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY, 1);
- OUT_RING (pNv->notify0->handle);
+ OUT_RING (chan, pNv->notify0->handle);
- FIRE_RING();
+ FIRE_RING (chan);
if (destination_buffer == pNv->GART) {
if (nouveau_notifier_wait_status(pNv->notify0, 0, 0, 0))
diff --git a/src/nv04_xv_blit.c b/src/nv04_xv_blit.c
index 73c98ce..ac1000b 100644
--- a/src/nv04_xv_blit.c
+++ b/src/nv04_xv_blit.c
@@ -75,15 +75,19 @@ NVPutBlitImage(ScrnInfoPtr pScrn, struct nouveau_bo *src, int src_offset,
CARD32 dsdx, dtdy;
CARD32 dst_size, dst_point;
CARD32 src_point, src_format;
+ struct nouveau_channel *chan = pNv->chan;
+ struct nouveau_grobj *surf2d = pNv->NvContextSurfaces;
+ struct nouveau_grobj *rect = pNv->NvRectangle;
+ struct nouveau_grobj *sifm = pNv->NvScaledImage;
unsigned int crtcs;
int dst_format;
NVAccelGetCtxSurf2DFormatFromPixmap(ppix, &dst_format);
- BEGIN_RING(NvContextSurfaces, NV04_CONTEXT_SURFACES_2D_FORMAT, 4);
- OUT_RING (dst_format);
- OUT_RING ((exaGetPixmapPitch(ppix) << 16) | exaGetPixmapPitch(ppix));
- OUT_PIXMAPl(ppix, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
- OUT_PIXMAPl(ppix, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
+ BEGIN_RING(chan, surf2d, NV04_CONTEXT_SURFACES_2D_FORMAT, 4);
+ OUT_RING (chan, dst_format);
+ OUT_RING (chan, (exaGetPixmapPitch(ppix) << 16) | exaGetPixmapPitch(ppix));
+ OUT_PIXMAPl(chan, ppix, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
+ OUT_PIXMAPl(chan, ppix, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
pbox = REGION_RECTS(clipBoxes);
nbox = REGION_NUM_RECTS(clipBoxes);
@@ -118,7 +122,7 @@ NVPutBlitImage(ScrnInfoPtr pScrn, struct nouveau_bo *src, int src_offset,
crtcs = nv_window_belongs_to_crtc(pScrn, dstBox->x1, dstBox->y1,
dstBox->x2, dstBox->y2);
- FIRE_RING();
+ FIRE_RING (chan);
if (crtcs & 0x1)
NVWaitVSync(pScrn, 0);
else if (crtcs & 0x2)
@@ -126,41 +130,40 @@ NVPutBlitImage(ScrnInfoPtr pScrn, struct nouveau_bo *src, int src_offset,
}
if(pNv->BlendingPossible) {
- BEGIN_RING(NvScaledImage,
- NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT, 2);
- OUT_RING (src_format);
- OUT_RING (NV04_SCALED_IMAGE_FROM_MEMORY_OPERATION_SRCCOPY);
+ BEGIN_RING(chan, sifm,
+ NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT, 2);
+ OUT_RING (chan, src_format);
+ OUT_RING (chan, NV04_SCALED_IMAGE_FROM_MEMORY_OPERATION_SRCCOPY);
} else {
- BEGIN_RING(NvScaledImage,
- NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT, 2);
- OUT_RING (src_format);
+ BEGIN_RING(chan, sifm,
+ NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT, 2);
+ OUT_RING (chan, src_format);
}
while(nbox--) {
- BEGIN_RING(NvRectangle,
- NV04_GDI_RECTANGLE_TEXT_COLOR1_A, 1);
- OUT_RING (0);
-
- BEGIN_RING(NvScaledImage,
- NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT, 6);
- OUT_RING ((pbox->y1 << 16) | pbox->x1);
- OUT_RING (((pbox->y2 - pbox->y1) << 16) |
+ BEGIN_RING(chan, rect, NV04_GDI_RECTANGLE_TEXT_COLOR1_A, 1);
+ OUT_RING (chan, 0);
+
+ BEGIN_RING(chan, sifm,
+ NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT, 6);
+ OUT_RING (chan, (pbox->y1 << 16) | pbox->x1);
+ OUT_RING (chan, ((pbox->y2 - pbox->y1) << 16) |
(pbox->x2 - pbox->x1));
- OUT_RING (dst_point);
- OUT_RING (dst_size);
- OUT_RING (dsdx);
- OUT_RING (dtdy);
-
- BEGIN_RING(NvScaledImage,
- NV04_SCALED_IMAGE_FROM_MEMORY_SIZE, 4);
- OUT_RING ((height << 16) | width);
- OUT_RING (src_pitch);
- OUT_RELOCl(src, src_offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
- OUT_RING (src_point);
+ OUT_RING (chan, dst_point);
+ OUT_RING (chan, dst_size);
+ OUT_RING (chan, dsdx);
+ OUT_RING (chan, dtdy);
+
+ BEGIN_RING(chan, sifm, NV04_SCALED_IMAGE_FROM_MEMORY_SIZE, 4);
+ OUT_RING (chan, (height << 16) | width);
+ OUT_RING (chan, src_pitch);
+ OUT_RELOCl(chan, src, src_offset,
+ NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
+ OUT_RING (chan, src_point);
pbox++;
}
- FIRE_RING();
+ FIRE_RING (chan);
exaMarkSync(pScrn->pScreen);
diff --git a/src/nv10_exa.c b/src/nv10_exa.c
index 7803b3b..70b2200 100644
--- a/src/nv10_exa.c
+++ b/src/nv10_exa.c
@@ -316,8 +316,8 @@ Bool NV10CheckComposite(int op,
static void NV10SetTexture(NVPtr pNv,int unit,PicturePtr Pict,PixmapPtr pixmap)
{
- BEGIN_RING(Nv3D, NV10TCL_TX_OFFSET(unit), 1 );
- OUT_PIXMAPl(pixmap, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
+ struct nouveau_channel *chan = pNv->chan;
+ struct nouveau_grobj *celcius = pNv->Nv3D;
int log2w = log2i(Pict->pDrawable->width);
int log2h = log2i(Pict->pDrawable->height);
int w;
@@ -329,6 +329,9 @@ static void NV10SetTexture(NVPtr pNv,int unit,PicturePtr Pict,PixmapPtr pixmap)
(1<<12) | /* lod == 1 */
0x51 /* UNK */;
+ BEGIN_RING(chan, celcius, NV10TCL_TX_OFFSET(unit), 1 );
+ OUT_PIXMAPl(chan, pixmap, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
+
/* if repeat is set we're always handling a 1x1 texture with ARGB/XRGB destination,
in that case we change the format to use the POT (swizzled) matching format */
if (Pict->repeat != RepeatNone)
@@ -353,25 +356,25 @@ static void NV10SetTexture(NVPtr pNv,int unit,PicturePtr Pict,PixmapPtr pixmap)
*/
w = (w + 1) &~ 1;
- BEGIN_RING(Nv3D, NV10TCL_TX_NPOT_PITCH(unit), 1);
- OUT_RING (exaGetPixmapPitch(pixmap) << 16);
+ BEGIN_RING(chan, celcius, NV10TCL_TX_NPOT_PITCH(unit), 1);
+ OUT_RING (chan, exaGetPixmapPitch(pixmap) << 16);
- BEGIN_RING(Nv3D, NV10TCL_TX_NPOT_SIZE(unit), 1);
- OUT_RING ((w<<16) | Pict->pDrawable->height);
+ BEGIN_RING(chan, celcius, NV10TCL_TX_NPOT_SIZE(unit), 1);
+ OUT_RING (chan, (w<<16) | Pict->pDrawable->height);
}
- BEGIN_RING(Nv3D, NV10TCL_TX_FORMAT(unit), 1 );
- OUT_RING (txfmt);
+ BEGIN_RING(chan, celcius, NV10TCL_TX_FORMAT(unit), 1 );
+ OUT_RING (chan, txfmt);
- BEGIN_RING(Nv3D, NV10TCL_TX_ENABLE(unit), 1 );
- OUT_RING (NV10TCL_TX_ENABLE_ENABLE);
+ BEGIN_RING(chan, celcius, NV10TCL_TX_ENABLE(unit), 1 );
+ OUT_RING (chan, NV10TCL_TX_ENABLE_ENABLE);
- BEGIN_RING(Nv3D, NV10TCL_TX_FILTER(unit), 1);
+ BEGIN_RING(chan, celcius, NV10TCL_TX_FILTER(unit), 1);
if (Pict->filter == PictFilterNearest)
- OUT_RING ((NV10TCL_TX_FILTER_MAGNIFY_NEAREST) |
+ OUT_RING (chan, (NV10TCL_TX_FILTER_MAGNIFY_NEAREST) |
(NV10TCL_TX_FILTER_MINIFY_NEAREST));
else
- OUT_RING ((NV10TCL_TX_FILTER_MAGNIFY_LINEAR) |
+ OUT_RING (chan, (NV10TCL_TX_FILTER_MAGNIFY_LINEAR) |
(NV10TCL_TX_FILTER_MINIFY_LINEAR));
state.unit[unit].width = (float)pixmap->drawable.width;
@@ -381,58 +384,63 @@ static void NV10SetTexture(NVPtr pNv,int unit,PicturePtr Pict,PixmapPtr pixmap)
static void NV10SetBuffer(NVPtr pNv,PicturePtr Pict,PixmapPtr pixmap)
{
+ struct nouveau_channel *chan = pNv->chan;
+ struct nouveau_grobj *celcius = pNv->Nv3D;
int i;
int x = 0;
int y = 0;
int w = 2048;
int h = 2048;
- BEGIN_RING(Nv3D, NV10TCL_RT_FORMAT, 4);
+ BEGIN_RING(chan, celcius, NV10TCL_RT_FORMAT, 4);
if ( state.is_a8_plus_a8 )
{ /*A8 + A8 hack*/
- OUT_RING (NV10DstFormat(PICT_a8r8g8b8));
+ OUT_RING (chan, NV10DstFormat(PICT_a8r8g8b8));
}
else {
- OUT_RING (NV10DstFormat(Pict->format));
+ OUT_RING (chan, NV10DstFormat(Pict->format));
}
- OUT_RING (((uint32_t)exaGetPixmapPitch(pixmap) << 16) |(uint32_t)exaGetPixmapPitch(pixmap));
- OUT_PIXMAPl(pixmap, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
- OUT_RING (0);
+ OUT_RING (chan, ((uint32_t)exaGetPixmapPitch(pixmap) << 16) |(uint32_t)exaGetPixmapPitch(pixmap));
+ OUT_PIXMAPl(chan, pixmap, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
+ OUT_RING (chan, 0);
- BEGIN_RING(Nv3D, NV10TCL_RT_HORIZ, 2);
- OUT_RING ((w<<16)|x);
- OUT_RING ((h<<16)|y);
- BEGIN_RING(Nv3D, NV10TCL_VIEWPORT_CLIP_MODE, 1); /* clip_mode */
- OUT_RING (0);
- BEGIN_RING(Nv3D, NV10TCL_VIEWPORT_CLIP_HORIZ(0), 1);
- OUT_RING (((w-1+x)<<16)|x|0x08000800);
- BEGIN_RING(Nv3D, NV10TCL_VIEWPORT_CLIP_VERT(0), 1);
- OUT_RING (((h-1+y)<<16)|y|0x08000800);
-
- BEGIN_RING(Nv3D, NV10TCL_PROJECTION_MATRIX(0), 16);
+ BEGIN_RING(chan, celcius, NV10TCL_RT_HORIZ, 2);
+ OUT_RING (chan, (w<<16)|x);
+ OUT_RING (chan, (h<<16)|y);
+ BEGIN_RING(chan, celcius, NV10TCL_VIEWPORT_CLIP_MODE, 1); /* clip_mode */
+ OUT_RING (chan, 0);
+ BEGIN_RING(chan, celcius, NV10TCL_VIEWPORT_CLIP_HORIZ(0), 1);
+ OUT_RING (chan, ((w-1+x)<<16)|x|0x08000800);
+ BEGIN_RING(chan, celcius, NV10TCL_VIEWPORT_CLIP_VERT(0), 1);
+ OUT_RING (chan, ((h-1+y)<<16)|y|0x08000800);
+
+ BEGIN_RING(chan, celcius, NV10TCL_PROJECTION_MATRIX(0), 16);
for(i=0;i<16;i++)
if (i/4==i%4)
- OUT_RINGf (1.0f);
+ OUT_RINGf (chan, 1.0f);
else
- OUT_RINGf (0.0f);
+ OUT_RINGf (chan, 0.0f);
- BEGIN_RING(Nv3D, NV10TCL_DEPTH_RANGE_NEAR, 2);
- OUT_RING (0);
+ BEGIN_RING(chan, celcius, NV10TCL_DEPTH_RANGE_NEAR, 2);
+ OUT_RING (chan, 0);
#if SCREEN_BPP == 32
- OUT_RINGf (16777216.0);
+ OUT_RINGf (chan, 16777216.0);
#else
- OUT_RINGf (65536.0);
+ OUT_RINGf (chan, 65536.0);
#endif
- BEGIN_RING(Nv3D, NV10TCL_VIEWPORT_SCALE_X, 4);
- OUT_RINGf (-2048.0);
- OUT_RINGf (-2048.0);
- OUT_RINGf (0);
- OUT_RING (0);
+ BEGIN_RING(chan, celcius, NV10TCL_VIEWPORT_SCALE_X, 4);
+ OUT_RINGf (chan, -2048.0);
+ OUT_RINGf (chan, -2048.0);
+ OUT_RINGf (chan, 0);
+ OUT_RING (chan, 0);
}
static void NV10SetRegCombs(NVPtr pNv, PicturePtr src, PicturePtr mask)
{
+ struct nouveau_channel *chan = pNv->chan;
+ struct nouveau_grobj *celcius = pNv->Nv3D;
+
/*This can be a bit difficult to understand at first glance.
Reg combiners are described here:
http://icps.u-strasbg.fr/~marchesin/perso/extensions/NV/register_combiners.html
@@ -504,17 +512,19 @@ unsigned int color0 = 0, color1 = 0;
else
rc0_in_rgb |= 0x00190000; /*B = a_1*/
- BEGIN_RING(Nv3D, NV10TCL_RC_IN_ALPHA(0), 6);
- OUT_RING(rc0_in_alpha);
- OUT_RING (rc1_in_alpha);
- OUT_RING (rc0_in_rgb);
- OUT_RING (rc1_in_rgb);
- OUT_RING (color0); /*COLOR 0*/
- OUT_RING (color1); /*COLOR 1*/
+ BEGIN_RING(chan, celcius, NV10TCL_RC_IN_ALPHA(0), 6);
+ OUT_RING (chan, rc0_in_alpha);
+ OUT_RING (chan, rc1_in_alpha);
+ OUT_RING (chan, rc0_in_rgb);
+ OUT_RING (chan, rc1_in_rgb);
+ OUT_RING (chan, color0); /*COLOR 0*/
+ OUT_RING (chan, color1); /*COLOR 1*/
}
static void NV10SetRegCombs_A8plusA8(NVPtr pNv, int pass, int mask_out_bytes)
{
+ struct nouveau_channel *chan = pNv->chan;
+ struct nouveau_grobj *celcius = pNv->Nv3D;
unsigned int rc0_in_alpha = 0, rc0_in_rgb = 0;
unsigned int rc1_in_alpha = 0, rc1_in_rgb = 0;
unsigned int color0 = 0, color1 = 0;
@@ -553,17 +563,19 @@ static void NV10SetRegCombs_A8plusA8(NVPtr pNv, int pass, int mask_out_bytes)
color1 = 0x0000ff00; /*R = 0, G = 1, B = 0*/
}
- BEGIN_RING(Nv3D, NV10TCL_RC_IN_ALPHA(0), 6);
- OUT_RING(rc0_in_alpha);
- OUT_RING (rc1_in_alpha);
- OUT_RING (rc0_in_rgb);
- OUT_RING (rc1_in_rgb);
- OUT_RING (color0); /*COLOR 0*/
- OUT_RING (color1); /*COLOR 1*/
+ BEGIN_RING(chan, celcius, NV10TCL_RC_IN_ALPHA(0), 6);
+ OUT_RING (chan, rc0_in_alpha);
+ OUT_RING (chan, rc1_in_alpha);
+ OUT_RING (chan, rc0_in_rgb);
+ OUT_RING (chan, rc1_in_rgb);
+ OUT_RING (chan, color0); /*COLOR 0*/
+ OUT_RING (chan, color1); /*COLOR 1*/
}
static void NV10SetPictOp(NVPtr pNv,int op)
{
+ struct nouveau_channel *chan = pNv->chan;
+ struct nouveau_grobj *celcius = pNv->Nv3D;
struct {int src;int dst;} pictops[] =
{
{0x0000,0x0000}, /* PictOpClear */
@@ -581,11 +593,11 @@ static void NV10SetPictOp(NVPtr pNv,int op)
{0x0001,0x0001}, /* PictOpAdd */
};
- BEGIN_RING(Nv3D, NV10TCL_BLEND_FUNC_SRC, 2);
- OUT_RING (pictops[op].src);
- OUT_RING (pictops[op].dst);
- BEGIN_RING(Nv3D, NV10TCL_BLEND_FUNC_ENABLE, 1);
- OUT_RING (1);
+ BEGIN_RING(chan, celcius, NV10TCL_BLEND_FUNC_SRC, 2);
+ OUT_RING (chan, pictops[op].src);
+ OUT_RING (chan, pictops[op].dst);
+ BEGIN_RING(chan, celcius, NV10TCL_BLEND_FUNC_ENABLE, 1);
+ OUT_RING (chan, 1);
}
Bool NV10PrepareComposite(int op,
@@ -598,6 +610,8 @@ Bool NV10PrepareComposite(int op,
{
ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
NVPtr pNv = NVPTR(pScrn);
+ struct nouveau_channel *chan = pNv->chan;
+ struct nouveau_grobj *celcius = pNv->Nv3D;
if (NV10Check_A8plusA8_Feasability(pSrcPicture,pMaskPicture,pDstPicture,op))
{
@@ -627,8 +641,8 @@ Bool NV10PrepareComposite(int op,
/* Set PictOp */
NV10SetPictOp(pNv, op);
- BEGIN_RING(Nv3D, NV10TCL_VERTEX_BEGIN_END, 1);
- OUT_RING (NV10TCL_VERTEX_BEGIN_END_QUADS);
+ BEGIN_RING(chan, celcius, NV10TCL_VERTEX_BEGIN_END, 1);
+ OUT_RING (chan, NV10TCL_VERTEX_BEGIN_END_QUADS);
state.have_mask=(pMaskPicture!=NULL);
return TRUE;
@@ -636,27 +650,33 @@ Bool NV10PrepareComposite(int op,
static inline void NV10Vertex(NVPtr pNv,float vx,float vy,float tx,float ty)
{
- BEGIN_RING(Nv3D, NV10TCL_VERTEX_TX0_2F_S, 2);
- OUT_RINGf (tx);
- OUT_RINGf (ty);
- BEGIN_RING(Nv3D, NV10TCL_VERTEX_POS_3F_X, 3);
- OUT_RINGf (vx);
- OUT_RINGf (vy);
- OUT_RINGf (0.f);
+ struct nouveau_channel *chan = pNv->chan;
+ struct nouveau_grobj *celcius = pNv->Nv3D;
+
+ BEGIN_RING(chan, celcius, NV10TCL_VERTEX_TX0_2F_S, 2);
+ OUT_RINGf (chan, tx);
+ OUT_RINGf (chan, ty);
+ BEGIN_RING(chan, celcius, NV10TCL_VERTEX_POS_3F_X, 3);
+ OUT_RINGf (chan, vx);
+ OUT_RINGf (chan, vy);
+ OUT_RINGf (chan, 0.f);
}
static inline void NV10MVertex(NVPtr pNv,float vx,float vy,float t0x,float t0y,float t1x,float t1y)
{
- BEGIN_RING(Nv3D, NV10TCL_VERTEX_TX0_2F_S, 2);
- OUT_RINGf (t0x);
- OUT_RINGf (t0y);
- BEGIN_RING(Nv3D, NV10TCL_VERTEX_TX1_2F_S, 2);
- OUT_RINGf (t1x);
- OUT_RINGf (t1y);
- BEGIN_RING(Nv3D, NV10TCL_VERTEX_POS_3F_X, 3);
- OUT_RINGf (vx);
- OUT_RINGf (vy);
- OUT_RINGf (0.f);
+ struct nouveau_channel *chan = pNv->chan;
+ struct nouveau_grobj *celcius = pNv->Nv3D;
+
+ BEGIN_RING(chan, celcius, NV10TCL_VERTEX_TX0_2F_S, 2);
+ OUT_RINGf (chan, t0x);
+ OUT_RINGf (chan, t0y);
+ BEGIN_RING(chan, celcius, NV10TCL_VERTEX_TX1_2F_S, 2);
+ OUT_RINGf (chan, t1x);
+ OUT_RINGf (chan, t1y);
+ BEGIN_RING(chan, celcius, NV10TCL_VERTEX_POS_3F_X, 3);
+ OUT_RINGf (chan, vx);
+ OUT_RINGf (chan, vy);
+ OUT_RINGf (chan, 0.f);
}
#define xFixedToFloat(v) \
@@ -694,6 +714,8 @@ void NV10Composite(PixmapPtr pDst,
{
ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
NVPtr pNv = NVPTR(pScrn);
+ struct nouveau_channel *chan = pNv->chan;
+ struct nouveau_grobj *celcius = pNv->Nv3D;
float sX0, sX1, sX2, sY0, sY1, sY2, sX3, sY3;
float mX0, mX1, mX2, mY0, mY1, mY2, mX3, mY3;
@@ -782,30 +804,30 @@ void NV10Composite(PixmapPtr pDst,
/*Pass number 0*/
NV10SetRegCombs_A8plusA8(pNv, 0, mask_out_bytes);
- BEGIN_RING(Nv3D, NV10TCL_VERTEX_BEGIN_END, 1);
- OUT_RING (NV10TCL_VERTEX_BEGIN_END_QUADS);
+ BEGIN_RING(chan, celcius, NV10TCL_VERTEX_BEGIN_END, 1);
+ OUT_RING (chan, NV10TCL_VERTEX_BEGIN_END_QUADS);
NV10MVertex(pNv , part_pos_dX , dstY , part_pos_sX, sY0, part_pos_sX + 1, sY0);
NV10MVertex(pNv , part_pos_dX + 1, dstY , part_pos_sX, sY0, part_pos_sX + 1, sY0);
NV10MVertex(pNv , part_pos_dX + 1, dstY + height, part_pos_sX, sY2, part_pos_sX + 1, sY2);
NV10MVertex(pNv , part_pos_dX , dstY + height, part_pos_sX, sY2, part_pos_sX + 1, sY2);
- BEGIN_RING(Nv3D, NV10TCL_VERTEX_BEGIN_END, 1);
- OUT_RING (NV10TCL_VERTEX_BEGIN_END_STOP);
+ BEGIN_RING(chan, celcius, NV10TCL_VERTEX_BEGIN_END, 1);
+ OUT_RING (chan, NV10TCL_VERTEX_BEGIN_END_STOP);
/*Pass number 1*/
NV10SetRegCombs_A8plusA8(pNv, 1, mask_out_bytes);
- BEGIN_RING(Nv3D, NV10TCL_VERTEX_BEGIN_END, 1);
- OUT_RING (NV10TCL_VERTEX_BEGIN_END_QUADS);
+ BEGIN_RING(chan, celcius, NV10TCL_VERTEX_BEGIN_END, 1);
+ OUT_RING (chan, NV10TCL_VERTEX_BEGIN_END_QUADS);
NV10MVertex(pNv , part_pos_dX, dstY , part_pos_sX + 2, sY0, part_pos_sX + 3, sY0);
NV10MVertex(pNv , part_pos_dX + 1 , dstY , part_pos_sX + 2, sY0, part_pos_sX + 3, sY0);
NV10MVertex(pNv , part_pos_dX + 1 , dstY + height, part_pos_sX + 2, sY2, part_pos_sX + 3, sY2);
NV10MVertex(pNv , part_pos_dX, dstY + height, part_pos_sX + 2, sY2, part_pos_sX + 3, sY2);
- BEGIN_RING(Nv3D, NV10TCL_VERTEX_BEGIN_END, 1);
- OUT_RING (NV10TCL_VERTEX_BEGIN_END_STOP);
+ BEGIN_RING(chan, celcius, NV10TCL_VERTEX_BEGIN_END, 1);
+ OUT_RING (chan, NV10TCL_VERTEX_BEGIN_END_STOP);
}
}
@@ -835,17 +857,17 @@ void NV10Composite(PixmapPtr pDst,
NV10Vertex(pNv , dstX + width , dstY + height , sX2 , sY2);
NV10Vertex(pNv , dstX , dstY + height , sX3 , sY3);
}
-
- FIRE_RING();
}
void NV10DoneComposite (PixmapPtr pDst)
{
ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
NVPtr pNv = NVPTR(pScrn);
+ struct nouveau_channel *chan = pNv->chan;
+ struct nouveau_grobj *celcius = pNv->Nv3D;
- BEGIN_RING(Nv3D, NV10TCL_VERTEX_BEGIN_END, 1);
- OUT_RING (NV10TCL_VERTEX_BEGIN_END_STOP);
+ BEGIN_RING(chan, celcius, NV10TCL_VERTEX_BEGIN_END, 1);
+ OUT_RING (chan, NV10TCL_VERTEX_BEGIN_END_STOP);
exaMarkSync(pDst->drawable.pScreen);
}
@@ -855,6 +877,8 @@ Bool
NVAccelInitNV10TCL(ScrnInfoPtr pScrn)
{
NVPtr pNv = NVPTR(pScrn);
+ struct nouveau_channel *chan = pNv->chan;
+ struct nouveau_grobj *celcius;
uint32_t class = 0, chipset;
int i;
@@ -876,200 +900,201 @@ NVAccelInitNV10TCL(ScrnInfoPtr pScrn)
if (nouveau_grobj_alloc(pNv->chan, Nv3D, class, &pNv->Nv3D))
return FALSE;
}
+ celcius = pNv->Nv3D;
- BEGIN_RING(Nv3D, NV10TCL_DMA_NOTIFY, 1);
- OUT_RING (pNv->NvNull->handle);
+ BEGIN_RING(chan, celcius, NV10TCL_DMA_NOTIFY, 1);
+ OUT_RING (chan, pNv->NvNull->handle);
- BEGIN_RING(Nv3D, NV10TCL_DMA_IN_MEMORY0, 2);
- OUT_RING (pNv->chan->vram->handle);
- OUT_RING (pNv->chan->gart->handle);
+ BEGIN_RING(chan, celcius, NV10TCL_DMA_IN_MEMORY0, 2);
+ OUT_RING (chan, pNv->chan->vram->handle);
+ OUT_RING (chan, pNv->chan->gart->handle);
- BEGIN_RING(Nv3D, NV10TCL_DMA_IN_MEMORY2, 2);
- OUT_RING (pNv->chan->vram->handle);
- OUT_RING (pNv->chan->vram->handle);
+ BEGIN_RING(chan, celcius, NV10TCL_DMA_IN_MEMORY2, 2);
+ OUT_RING (chan, pNv->chan->vram->handle);
+ OUT_RING (chan, pNv->chan->vram->handle);
- BEGIN_RING(Nv3D, NV10TCL_NOP, 1);
- OUT_RING (0);
+ BEGIN_RING(chan, celcius, NV10TCL_NOP, 1);
+ OUT_RING (chan, 0);
- BEGIN_RING(Nv3D, NV10TCL_RT_HORIZ, 2);
- OUT_RING (0);
- OUT_RING (0);
+ BEGIN_RING(chan, celcius, NV10TCL_RT_HORIZ, 2);
+ OUT_RING (chan, 0);
+ OUT_RING (chan, 0);
- BEGIN_RING(Nv3D, NV10TCL_VIEWPORT_CLIP_HORIZ(0), 1);
- OUT_RING ((0x7ff<<16)|0x800);
- BEGIN_RING(Nv3D, NV10TCL_VIEWPORT_CLIP_VERT(0), 1);
- OUT_RING ((0x7ff<<16)|0x800);
+ BEGIN_RING(chan, celcius, NV10TCL_VIEWPORT_CLIP_HORIZ(0), 1);
+ OUT_RING (chan, (0x7ff<<16)|0x800);
+ BEGIN_RING(chan, celcius, NV10TCL_VIEWPORT_CLIP_VERT(0), 1);
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