xserver-xorg-video-ati: Changes to 'upstream-unstable'
configure.ac | 62 ++++++++++++++++++++++++++++++++++++++-
src/radeon_accel.c | 6 +--
src/radeon_accelfuncs.c | 40 +++++++++++++++++++++++++
src/radeon_atombios.c | 7 ++++
src/radeon_exa.c | 2 -
src/radeon_exa_funcs.c | 25 ++++++++++++++-
src/radeon_exa_render.c | 23 +++++---------
src/radeon_macros.h | 16 ++++++++++
src/radeon_reg.h | 1
src/radeon_textured_videofuncs.c | 13 +++++++-
10 files changed, 173 insertions(+), 22 deletions(-)
New commits:
commit c83fbdfa076c107012b7dfbbfbbb2feede00542b
Author: Alex Deucher <alex@botchco.com>
Date: Thu Jun 26 19:48:45 2008 -0400
Bump for 6.9.0 release
diff --git a/configure.ac b/configure.ac
index 4bf7487..b8c18a6 100644
--- a/configure.ac
+++ b/configure.ac
@@ -22,7 +22,7 @@
AC_PREREQ(2.57)
AC_INIT([xf86-video-ati],
- 6.8.192,
+ 6.9.0,
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg],
xf86-video-ati)
commit 32e1d1daf4f68ea37624afaa2bc1ea7742e1163b
Author: Brad Smith <brad@comstyle.com>
Date: Thu Jun 26 10:22:03 2008 -0400
RADEON: sys/endian.h needs sys/types.h on BSDs
See bug 16512
diff --git a/configure.ac b/configure.ac
index 9ac46f7..4bf7487 100644
--- a/configure.ac
+++ b/configure.ac
@@ -260,6 +260,7 @@ AC_CHECK_HEADER([sys/endian.h], [HAVE_SYS_ENDIAN_H="yes"], [HAVE_SYS_ENDIAN_H="n
if test "x$HAVE_SYS_ENDIAN_H" = "xyes" ; then
AC_MSG_CHECKING([for __swap16 variant of <sys/endian.h> byteswapping macros])
AC_LINK_IFELSE([AC_LANG_PROGRAM([
+#include <sys/types.h>
#include <sys/endian.h>
], [
int a = 1, b;
@@ -270,6 +271,7 @@ b = __swap16(a);
AC_MSG_CHECKING([for bswap16 variant of <sys/endian.h> byteswapping macros])
AC_LINK_IFELSE([AC_LANG_PROGRAM([
+#include <sys/types.h>
#include <sys/endian.h>
], [
int a = 1, b;
commit dca522355a9039eca6efaba3b36397b246800f94
Author: Brad Smith <brad@comstyle.com>
Date: Thu Jun 26 10:13:59 2008 -0400
RADEON: fix copy/paste error in accel code
diff --git a/src/radeon_accel.c b/src/radeon_accel.c
index d45e932..65ad33d 100644
--- a/src/radeon_accel.c
+++ b/src/radeon_accel.c
@@ -371,7 +371,7 @@ void RADEONEngineInit(ScrnInfoPtr pScrn)
info->CurrentLayout.bitsPerPixel);
#ifdef XF86DRI
- if (info->directRenderingEnabled && (IS_R300_3D | IS_R500_3D)) {
+ if (info->directRenderingEnabled && (IS_R300_3D || IS_R500_3D)) {
drmRadeonGetParam np;
int num_pipes;
@@ -419,11 +419,11 @@ void RADEONEngineInit(ScrnInfoPtr pScrn)
}
}
- if (IS_R300_3D | IS_R500_3D)
+ if (IS_R300_3D || IS_R500_3D)
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"num pipes is %d\n", info->num_gb_pipes);
- if (IS_R300_3D | IS_R500_3D) {
+ if (IS_R300_3D || IS_R500_3D) {
uint32_t gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16 | R300_SUBPIXEL_1_16);
switch(info->num_gb_pipes) {
diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c
index 8a1849c..4736e4f 100644
--- a/src/radeon_exa_render.c
+++ b/src/radeon_exa_render.c
@@ -1978,7 +1978,7 @@ static void FUNC_NAME(RadeonCompositeTile)(PixmapPtr pDst,
RADEON_CP_VC_CNTL_VTX_FMT_RADEON_MODE |
(4 << RADEON_CP_VC_CNTL_NUM_SHIFT));
} else {
- if (IS_R300_3D | IS_R500_3D)
+ if (IS_R300_3D || IS_R500_3D)
BEGIN_RING(4 * vtx_count + 4);
else
BEGIN_RING(4 * vtx_count + 2);
@@ -1991,7 +1991,7 @@ static void FUNC_NAME(RadeonCompositeTile)(PixmapPtr pDst,
}
#else /* ACCEL_CP */
- if (IS_R300_3D | IS_R500_3D)
+ if (IS_R300_3D || IS_R500_3D)
BEGIN_ACCEL(2 + vtx_count * 4);
else
BEGIN_ACCEL(1 + vtx_count * 4);
@@ -2032,7 +2032,7 @@ static void FUNC_NAME(RadeonCompositeTile)(PixmapPtr pDst,
xFixedToFloat(srcTopRight.x) / info->texW[0], xFixedToFloat(srcTopRight.y) / info->texH[0]);
}
- if (IS_R300_3D | IS_R500_3D)
+ if (IS_R300_3D || IS_R500_3D)
/* flushing is pipelined, free/finish is not */
OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_DC_FLUSH_3D);
@@ -2114,7 +2114,7 @@ static void FUNC_NAME(RadeonDoneComposite)(PixmapPtr pDst)
ENTER_DRAW(0);
- if (IS_R300_3D | IS_R500_3D) {
+ if (IS_R300_3D || IS_R500_3D) {
BEGIN_ACCEL(2);
OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_RB3D_DC_FLUSH_ALL);
} else
diff --git a/src/radeon_textured_videofuncs.c b/src/radeon_textured_videofuncs.c
index f0dad03..277d9b2 100644
--- a/src/radeon_textured_videofuncs.c
+++ b/src/radeon_textured_videofuncs.c
@@ -643,7 +643,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
pBox++;
}
- if (IS_R300_3D | IS_R500_3D) {
+ if (IS_R300_3D || IS_R500_3D) {
BEGIN_VIDEO(2);
OUT_VIDEO_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_RB3D_DC_FLUSH_ALL);
} else
commit f4292e110105910d0c19bf2db28e2682b27af2c7
Author: Dave Airlie <airlied@redhat.com>
Date: Fri Jun 20 15:31:43 2008 +1000
Revert "Revert "ATOM: disable TV-out for now""
Oops I really didn't mean to do this, I was testing something and it slipped
past.
This reverts commit dd18caa4b2efc430eaae0c4362b65641f9bef440.
diff --git a/src/radeon_atombios.c b/src/radeon_atombios.c
index 900e928..20aa722 100644
--- a/src/radeon_atombios.c
+++ b/src/radeon_atombios.c
@@ -1787,6 +1787,13 @@ RADEONGetATOMConnectorInfoFromBIOSConnectorTable (ScrnInfoPtr pScrn)
continue;
}
#endif
+#if 1
+ if (i == ATOM_DEVICE_TV1_INDEX) {
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Skipping TV-Out\n");
+ info->BiosConnector[i].valid = FALSE;
+ continue;
+ }
+#endif
info->BiosConnector[i].valid = TRUE;
info->BiosConnector[i].output_id = ci.sucI2cId.sbfAccess.bfI2C_LineMux;
commit bb1cfcbfbc1ace1f257fc3bf6401501f1a6da827
Author: Alex Deucher <alex@botch2.com>
Date: Wed Jun 25 15:50:16 2008 -0400
RADEON: adjustments to Jerome's last commit
- Flush caches and wait for idle after drawing
- Make sure 3D is idle too (after composite or textured video)
diff --git a/src/radeon_exa.c b/src/radeon_exa.c
index 0193a28..f461f3c 100644
--- a/src/radeon_exa.c
+++ b/src/radeon_exa.c
@@ -323,7 +323,7 @@ do { \
case EXA_ENGINEMODE_UNKNOWN: \
wait_until |= RADEON_WAIT_HOST_IDLECLEAN | RADEON_WAIT_3D_IDLECLEAN; \
case EXA_ENGINEMODE_2D: \
- wait_until |= RADEON_WAIT_2D_IDLECLEAN; \
+ wait_until |= RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_DMA_GUI_IDLE; \
case EXA_ENGINEMODE_3D: \
break; \
} \
diff --git a/src/radeon_exa_funcs.c b/src/radeon_exa_funcs.c
index 29f7c36..56de23e 100644
--- a/src/radeon_exa_funcs.c
+++ b/src/radeon_exa_funcs.c
@@ -116,11 +116,6 @@ FUNC_NAME(RADEONPrepareSolid)(PixmapPtr pPix, int alu, Pixel pm, Pixel fg)
(RADEON_DST_X_LEFT_TO_RIGHT | RADEON_DST_Y_TOP_TO_BOTTOM));
OUT_ACCEL_REG(RADEON_DST_PITCH_OFFSET, dst_pitch_offset);
FINISH_ACCEL();
- BEGIN_ACCEL(2);
- OUT_ACCEL_REG(RADEON_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL);
- OUT_ACCEL_REG(RADEON_WAIT_UNTIL,
- RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_DMA_GUI_IDLE);
- FINISH_ACCEL();
return TRUE;
}
@@ -129,7 +124,6 @@ FUNC_NAME(RADEONPrepareSolid)(PixmapPtr pPix, int alu, Pixel pm, Pixel fg)
static void
FUNC_NAME(RADEONSolid)(PixmapPtr pPix, int x1, int y1, int x2, int y2)
{
-
RINFO_FROM_SCREEN(pPix->drawable.pScreen);
ACCEL_PREAMBLE();
@@ -144,7 +138,16 @@ FUNC_NAME(RADEONSolid)(PixmapPtr pPix, int x1, int y1, int x2, int y2)
static void
FUNC_NAME(RADEONDoneSolid)(PixmapPtr pPix)
{
+ RINFO_FROM_SCREEN(pPix->drawable.pScreen);
+ ACCEL_PREAMBLE();
+
TRACE;
+
+ BEGIN_ACCEL(2);
+ OUT_ACCEL_REG(RADEON_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL);
+ OUT_ACCEL_REG(RADEON_WAIT_UNTIL,
+ RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_DMA_GUI_IDLE);
+ FINISH_ACCEL();
}
void
@@ -174,11 +177,6 @@ FUNC_NAME(RADEONDoPrepareCopy)(ScrnInfoPtr pScrn, uint32_t src_pitch_offset,
OUT_ACCEL_REG(RADEON_DST_PITCH_OFFSET, dst_pitch_offset);
OUT_ACCEL_REG(RADEON_SRC_PITCH_OFFSET, src_pitch_offset);
FINISH_ACCEL();
- BEGIN_ACCEL(2);
- OUT_ACCEL_REG(RADEON_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL);
- OUT_ACCEL_REG(RADEON_WAIT_UNTIL,
- RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_DMA_GUI_IDLE);
- FINISH_ACCEL();
}
static Bool
@@ -216,7 +214,6 @@ FUNC_NAME(RADEONCopy)(PixmapPtr pDst,
int dstX, int dstY,
int w, int h)
{
-
RINFO_FROM_SCREEN(pDst->drawable.pScreen);
ACCEL_PREAMBLE();
@@ -243,7 +240,16 @@ FUNC_NAME(RADEONCopy)(PixmapPtr pDst,
static void
FUNC_NAME(RADEONDoneCopy)(PixmapPtr pDst)
{
+ RINFO_FROM_SCREEN(pDst->drawable.pScreen);
+ ACCEL_PREAMBLE();
+
TRACE;
+
+ BEGIN_ACCEL(2);
+ OUT_ACCEL_REG(RADEON_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL);
+ OUT_ACCEL_REG(RADEON_WAIT_UNTIL,
+ RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_DMA_GUI_IDLE);
+ FINISH_ACCEL();
}
static Bool
diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c
index 2319e3b..8a1849c 100644
--- a/src/radeon_exa_render.c
+++ b/src/radeon_exa_render.c
@@ -2114,18 +2114,13 @@ static void FUNC_NAME(RadeonDoneComposite)(PixmapPtr pDst)
ENTER_DRAW(0);
- if (IS_R500_3D || ((info->ChipFamily == CHIP_FAMILY_RS400) ||
- (info->ChipFamily == CHIP_FAMILY_RS480) ||
- (info->ChipFamily == CHIP_FAMILY_RS600) ||
- (info->ChipFamily == CHIP_FAMILY_RS690) ||
- (info->ChipFamily == CHIP_FAMILY_RS740))) {
- /* r500 shows corruption on small things like glyphs without a 3D idle
- * IGP shows more substantial corruption
- */
+ if (IS_R300_3D | IS_R500_3D) {
+ BEGIN_ACCEL(2);
+ OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_RB3D_DC_FLUSH_ALL);
+ } else
BEGIN_ACCEL(1);
- OUT_ACCEL_REG(RADEON_WAIT_UNTIL, RADEON_WAIT_3D_IDLECLEAN);
- FINISH_ACCEL();
- }
+ OUT_ACCEL_REG(RADEON_WAIT_UNTIL, RADEON_WAIT_3D_IDLECLEAN);
+ FINISH_ACCEL();
LEAVE_DRAW(0);
}
diff --git a/src/radeon_textured_videofuncs.c b/src/radeon_textured_videofuncs.c
index d5d1b1c..f0dad03 100644
--- a/src/radeon_textured_videofuncs.c
+++ b/src/radeon_textured_videofuncs.c
@@ -117,7 +117,10 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
OUT_VIDEO_REG(RADEON_RB3D_DSTCACHE_CTLSTAT, RADEON_RB3D_DC_FLUSH);
/* We must wait for 3d to idle, in case source was just written as a dest. */
OUT_VIDEO_REG(RADEON_WAIT_UNTIL,
- RADEON_WAIT_HOST_IDLECLEAN | RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_3D_IDLECLEAN);
+ RADEON_WAIT_HOST_IDLECLEAN |
+ RADEON_WAIT_2D_IDLECLEAN |
+ RADEON_WAIT_3D_IDLECLEAN |
+ RADEON_WAIT_DMA_GUI_IDLE);
FINISH_VIDEO();
if (IS_R300_3D || IS_R500_3D) {
@@ -640,6 +643,14 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
pBox++;
}
+ if (IS_R300_3D | IS_R500_3D) {
+ BEGIN_VIDEO(2);
+ OUT_VIDEO_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_RB3D_DC_FLUSH_ALL);
+ } else
+ BEGIN_VIDEO(1);
+ OUT_VIDEO_REG(RADEON_WAIT_UNTIL, RADEON_WAIT_3D_IDLECLEAN);
+ FINISH_VIDEO();
+
DamageDamageRegion(pPriv->pDraw, &pPriv->clip);
}
commit 8c9b8de0373797cba6f0a27e6b6f461e1070fef9
Author: Jerome Glisse <glisse@freedesktop.org>
Date: Wed Jun 25 10:28:26 2008 +0200
radeon: flush & wait for 2d & dma idle after 2d blit
This should help to avoid 2d & 3d engine to step on each
other dma transaction.
diff --git a/src/radeon_accelfuncs.c b/src/radeon_accelfuncs.c
index 3c0b8a0..56793cd 100644
--- a/src/radeon_accelfuncs.c
+++ b/src/radeon_accelfuncs.c
@@ -151,6 +151,11 @@ FUNC_NAME(RADEONSetupForSolidFill)(ScrnInfoPtr pScrn,
| RADEON_DST_Y_TOP_TO_BOTTOM));
FINISH_ACCEL();
+ BEGIN_ACCEL(2);
+ OUT_ACCEL_REG(RADEON_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL);
+ OUT_ACCEL_REG(RADEON_WAIT_UNTIL,
+ RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_DMA_GUI_IDLE);
+ FINISH_ACCEL();
}
/* Subsequent XAA SolidFillRect
@@ -205,6 +210,11 @@ FUNC_NAME(RADEONSetupForSolidLine)(ScrnInfoPtr pScrn,
OUT_ACCEL_REG(RADEON_DP_WRITE_MASK, planemask);
FINISH_ACCEL();
+ BEGIN_ACCEL(2);
+ OUT_ACCEL_REG(RADEON_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL);
+ OUT_ACCEL_REG(RADEON_WAIT_UNTIL,
+ RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_DMA_GUI_IDLE);
+ FINISH_ACCEL();
}
/* Subsequent XAA solid horizontal and vertical lines */
@@ -324,6 +334,11 @@ FUNC_NAME(RADEONSetupForDashedLine)(ScrnInfoPtr pScrn,
OUT_ACCEL_REG(RADEON_BRUSH_DATA0, pat);
FINISH_ACCEL();
+ BEGIN_ACCEL(2);
+ OUT_ACCEL_REG(RADEON_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL);
+ OUT_ACCEL_REG(RADEON_WAIT_UNTIL,
+ RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_DMA_GUI_IDLE);
+ FINISH_ACCEL();
}
/* Helper function to draw last point for dashed lines */
@@ -358,6 +373,11 @@ FUNC_NAME(RADEONDashedLastPel)(ScrnInfoPtr pScrn,
OUT_ACCEL_REG(RADEON_DP_BRUSH_FRGD_CLR, info->dash_fg);
FINISH_ACCEL();
+ BEGIN_ACCEL(2);
+ OUT_ACCEL_REG(RADEON_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL);
+ OUT_ACCEL_REG(RADEON_WAIT_UNTIL,
+ RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_DMA_GUI_IDLE);
+ FINISH_ACCEL();
}
/* Subsequent XAA dashed line */
@@ -461,6 +481,11 @@ FUNC_NAME(RADEONSetupForScreenToScreenCopy)(ScrnInfoPtr pScrn,
(ydir >= 0 ? RADEON_DST_Y_TOP_TO_BOTTOM : 0)));
FINISH_ACCEL();
+ BEGIN_ACCEL(2);
+ OUT_ACCEL_REG(RADEON_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL);
+ OUT_ACCEL_REG(RADEON_WAIT_UNTIL,
+ RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_DMA_GUI_IDLE);
+ FINISH_ACCEL();
info->trans_color = trans_color;
FUNC_NAME(RADEONSetTransparency)(pScrn, trans_color);
@@ -553,6 +578,11 @@ FUNC_NAME(RADEONSetupForMono8x8PatternFill)(ScrnInfoPtr pScrn,
#endif
FINISH_ACCEL();
+ BEGIN_ACCEL(2);
+ OUT_ACCEL_REG(RADEON_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL);
+ OUT_ACCEL_REG(RADEON_WAIT_UNTIL,
+ RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_DMA_GUI_IDLE);
+ FINISH_ACCEL();
}
/* Subsequent XAA 8x8 pattern color expansion. Because they are used in
@@ -1086,6 +1116,11 @@ FUNC_NAME(RADEONSetClippingRectangle)(ScrnInfoPtr pScrn,
OUT_ACCEL_REG(RADEON_SC_BOTTOM_RIGHT, tmp2);
FINISH_ACCEL();
+ BEGIN_ACCEL(2);
+ OUT_ACCEL_REG(RADEON_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL);
+ OUT_ACCEL_REG(RADEON_WAIT_UNTIL,
+ RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_DMA_GUI_IDLE);
+ FINISH_ACCEL();
FUNC_NAME(RADEONSetTransparency)(pScrn, info->trans_color);
}
@@ -1105,6 +1140,11 @@ FUNC_NAME(RADEONDisableClipping)(ScrnInfoPtr pScrn)
RADEON_DEFAULT_SC_BOTTOM_MAX));
FINISH_ACCEL();
+ BEGIN_ACCEL(2);
+ OUT_ACCEL_REG(RADEON_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL);
+ OUT_ACCEL_REG(RADEON_WAIT_UNTIL,
+ RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_DMA_GUI_IDLE);
+ FINISH_ACCEL();
FUNC_NAME(RADEONSetTransparency)(pScrn, info->trans_color);
}
diff --git a/src/radeon_exa_funcs.c b/src/radeon_exa_funcs.c
index 13a7de5..29f7c36 100644
--- a/src/radeon_exa_funcs.c
+++ b/src/radeon_exa_funcs.c
@@ -116,6 +116,11 @@ FUNC_NAME(RADEONPrepareSolid)(PixmapPtr pPix, int alu, Pixel pm, Pixel fg)
(RADEON_DST_X_LEFT_TO_RIGHT | RADEON_DST_Y_TOP_TO_BOTTOM));
OUT_ACCEL_REG(RADEON_DST_PITCH_OFFSET, dst_pitch_offset);
FINISH_ACCEL();
+ BEGIN_ACCEL(2);
+ OUT_ACCEL_REG(RADEON_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL);
+ OUT_ACCEL_REG(RADEON_WAIT_UNTIL,
+ RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_DMA_GUI_IDLE);
+ FINISH_ACCEL();
return TRUE;
}
@@ -169,6 +174,11 @@ FUNC_NAME(RADEONDoPrepareCopy)(ScrnInfoPtr pScrn, uint32_t src_pitch_offset,
OUT_ACCEL_REG(RADEON_DST_PITCH_OFFSET, dst_pitch_offset);
OUT_ACCEL_REG(RADEON_SRC_PITCH_OFFSET, src_pitch_offset);
FINISH_ACCEL();
+ BEGIN_ACCEL(2);
+ OUT_ACCEL_REG(RADEON_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL);
+ OUT_ACCEL_REG(RADEON_WAIT_UNTIL,
+ RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_DMA_GUI_IDLE);
+ FINISH_ACCEL();
}
static Bool
@@ -343,6 +353,11 @@ RADEONBlitChunk(ScrnInfoPtr pScrn, uint32_t datatype, uint32_t src_pitch_offset,
OUT_ACCEL_REG(RADEON_DST_Y_X, (dstY << 16) | dstX);
OUT_ACCEL_REG(RADEON_DST_HEIGHT_WIDTH, (h << 16) | w);
FINISH_ACCEL();
+ BEGIN_ACCEL(2);
+ OUT_ACCEL_REG(RADEON_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL);
+ OUT_ACCEL_REG(RADEON_WAIT_UNTIL,
+ RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_DMA_GUI_IDLE);
+ FINISH_ACCEL();
}
#endif
diff --git a/src/radeon_reg.h b/src/radeon_reg.h
index 52795b1..59e2f12 100644
--- a/src/radeon_reg.h
+++ b/src/radeon_reg.h
@@ -1458,6 +1458,7 @@
# define RADEON_RB2D_DC_FLUSH_ALL 0xf
# define RADEON_RB2D_DC_BUSY (1 << 31)
#define RADEON_RB2D_DSTCACHE_MODE 0x3428
+#define RADEON_DSTCACHE_CTLSTAT 0x1714
#define RADEON_RB3D_ZCACHE_MODE 0x3250
#define RADEON_RB3D_ZCACHE_CTLSTAT 0x3254
commit 52459745ec05de88adbc087e9566fe6d97ef424b
Author: Dave Airlie <airlied@linux.ie>
Date: Wed Jun 25 17:09:11 2008 +1000
ati: hopefully fix byteswap mess for those other OSes.
diff --git a/configure.ac b/configure.ac
index beafb7e..9ac46f7 100644
--- a/configure.ac
+++ b/configure.ac
@@ -244,6 +244,64 @@ if test "x$XSERVER_LIBPCIACCESS" = xyes; then
fi
AM_CONDITIONAL(XSERVER_LIBPCIACCESS, test "x$XSERVER_LIBPCIACCESS" = xyes)
+# Checks for headers/macros for byte swapping
+# Known variants:
+# <byteswap.h> bswap_16, bswap_32, bswap_64 (glibc)
+# <sys/endian.h> __swap16, __swap32, __swap64 (OpenBSD)
+# <sys/endian.h> bswap16, bswap32, bswap64 (other BSD's)
+# and a fallback to local macros if none of the above are found
+
+# if <byteswap.h> is found, assume it's the correct version
+AC_CHECK_HEADERS([byteswap.h])
+
+# if <sys/endian.h> is found, have to check which version
+AC_CHECK_HEADER([sys/endian.h], [HAVE_SYS_ENDIAN_H="yes"], [HAVE_SYS_ENDIAN_H="no"])
+
+if test "x$HAVE_SYS_ENDIAN_H" = "xyes" ; then
+ AC_MSG_CHECKING([for __swap16 variant of <sys/endian.h> byteswapping macros])
+ AC_LINK_IFELSE([AC_LANG_PROGRAM([
+#include <sys/endian.h>
+ ], [
+int a = 1, b;
+b = __swap16(a);
+ ])
+], [SYS_ENDIAN__SWAP='yes'], [SYS_ENDIAN__SWAP='no'])
+ AC_MSG_RESULT([$SYS_ENDIAN__SWAP])
+
+ AC_MSG_CHECKING([for bswap16 variant of <sys/endian.h> byteswapping macros])
+ AC_LINK_IFELSE([AC_LANG_PROGRAM([
+#include <sys/endian.h>
+ ], [
+int a = 1, b;
+b = bswap16(a);
+ ])
+], [SYS_ENDIAN_BSWAP='yes'], [SYS_ENDIAN_BSWAP='no'])
+ AC_MSG_RESULT([$SYS_ENDIAN_BSWAP])
+
+ if test "$SYS_ENDIAN_BSWAP" = "yes" ; then
+ USE_SYS_ENDIAN_H=yes
+ BSWAP=bswap
+ else
+ if test "$SYS_ENDIAN__SWAP" = "yes" ; then
+ USE_SYS_ENDIAN_H=yes
+ BSWAP=__swap
+ else
+ USE_SYS_ENDIAN_H=no
+ fi
+ fi
+
+ if test "$USE_SYS_ENDIAN_H" = "yes" ; then
+ AC_DEFINE([USE_SYS_ENDIAN_H], 1,
+ [Define to use byteswap macros from <sys/endian.h>])
+ AC_DEFINE_UNQUOTED([bswap_16], ${BSWAP}16,
+ [Define to 16-bit byteswap macro])
+ AC_DEFINE_UNQUOTED([bswap_32], ${BSWAP}32,
+ [Define to 32-bit byteswap macro])
+ AC_DEFINE_UNQUOTED([bswap_64], ${BSWAP}64,
+ [Define to 64-bit byteswap macro])
+ fi
+fi
+
case $host_os in
*linux*)
AC_DEFINE(FGL_LINUX, 1, [Use linux pragma pack]) ;;
diff --git a/src/radeon_macros.h b/src/radeon_macros.h
index 3675dc5..afe442e 100644
--- a/src/radeon_macros.h
+++ b/src/radeon_macros.h
@@ -51,7 +51,23 @@
#include "compiler.h"
+#if HAVE_BYTESWAP_H
#include <byteswap.h>
+#elif defined(USE_SYS_ENDIAN_H)
+#include <sys/endian.h>
+#else
+#define bswap_16(value) \
+ ((((value) & 0xff) << 8) | ((value) >> 8))
+
+#define bswap_32(value) \
+ (((uint32_t)bswap_16((uint16_t)((value) & 0xffff)) << 16) | \
+ (uint32_t)bswap_16((uint16_t)((value) >> 16)))
+
+#define bswap_64(value) \
+ (((uint64_t)bswap_32((uint32_t)((value) & 0xffffffff)) \
+ << 32) | \
+ (uint64_t)bswap_32((uint32_t)((value) >> 32)))
+#endif
#if X_BYTE_ORDER == X_BIG_ENDIAN
#define le32_to_cpu(x) bswap_32(x)
Reply to: