xserver-xorg-video-intel: Changes to 'upstream-unstable'
Rebased ref, commits from common ancestor:
commit f5ad42f0ceef78f6fac490bcc40d56d0ce8c9e2e
Author: Zhenyu Wang <zhenyu.z.wang@intel.com>
Date: Mon May 12 09:01:21 2008 +0800
Bump version 2.3.1
diff --git a/configure.ac b/configure.ac
index 7401451..f8a3824 100644
--- a/configure.ac
+++ b/configure.ac
@@ -22,7 +22,7 @@
AC_PREREQ(2.57)
AC_INIT([xf86-video-intel],
- 2.3.0,
+ 2.3.1,
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg],
xf86-video-intel)
commit 6fd31f94a481c3193a04d9714dfde030a00f1dcc
Author: Zhenyu Wang <zhenyu.z.wang@intel.com>
Date: Mon May 12 08:57:56 2008 +0800
Revert last HP 965GM pipe A quirk
Seems not resolve the issue (fdo bug #15885).
(cherry picked from commit f280c50dd5d29c5717adc6da2368363cb3d0adbb)
diff --git a/src/i830_quirks.c b/src/i830_quirks.c
index 34c49b8..b1c1423 100644
--- a/src/i830_quirks.c
+++ b/src/i830_quirks.c
@@ -265,8 +265,6 @@ static i830_quirk i830_quirk_list[] = {
/* HP Compaq 6730s has no TV output */
{ PCI_CHIP_IGD_GM, 0x103c, 0x30e8, quirk_ignore_tv },
- /* HP Compaq 6710b hangs with lid closed and "Automatic Login"(LP: #228399)*/
- { PCI_CHIP_I965_GM, 0x103c, 0x30c0, quirk_pipea_force },
/* Thinkpad R31 needs pipe A force quirk */
{ PCI_CHIP_I830_M, 0x1014, 0x0505, quirk_pipea_force },
commit 89dc0d922d6ec0035632a70647981636ab6c8d57
Author: Bryce Harrington <bryce@bryceharrington.org>
Date: Sat May 10 07:58:59 2008 +0800
More Pipe A force quirks
(cherry picked from commit d91d9e6a2f2ba18b35cb6fd7bc3fe8bc617eb44f)
diff --git a/src/i830_quirks.c b/src/i830_quirks.c
index 72e735b..34c49b8 100644
--- a/src/i830_quirks.c
+++ b/src/i830_quirks.c
@@ -265,9 +265,13 @@ static i830_quirk i830_quirk_list[] = {
/* HP Compaq 6730s has no TV output */
{ PCI_CHIP_IGD_GM, 0x103c, 0x30e8, quirk_ignore_tv },
+ /* HP Compaq 6710b hangs with lid closed and "Automatic Login"(LP: #228399)*/
+ { PCI_CHIP_I965_GM, 0x103c, 0x30c0, quirk_pipea_force },
/* Thinkpad R31 needs pipe A force quirk */
{ PCI_CHIP_I830_M, 0x1014, 0x0505, quirk_pipea_force },
+ /* Dell Latitude D400 needs pipe A force quirk (LP: #228519) */
+ { PCI_CHIP_I855_GM, 0x1028, 0x0139, quirk_pipea_force },
/* Dell Latitude D500 needs pipe A force quirk */
{ PCI_CHIP_I855_GM, 0x1028, 0x0152, quirk_pipea_force },
/* Dell Latitude X300 needs pipe A force quirk */
commit 7fb914a529b16759f082f068cd0f15099d10167c
Author: Mike Isely <isely@pobox.com>
Date: Thu May 8 10:00:17 2008 +0800
Implement option to ignore external fixed mode settings
The Intel xorg driver tries mightily to determine the native fixed
panel mode settings for the LVDS output. It does this through various
means, including scanning video BIOS tables, and noticing if the pipe
in question has already been set up by somebody else (and adopting
those timings). This strategy works well for say a laptop where the
LCD panel is an integral part of the machine. But for other
applications where the display is unrelated to the system's BIOS or
other software, then the BIOS will likely have no clue how to
configure the LVDS output. Worse still, the BIOS can simply "get it
wrong", leaving the pipe misconfigured. Unfortunately the Intel
driver can potentially notice this, adopt the same settings, leaving a
messed up display.
All of this complexity normally happens independently, behind the
scenes, from the mode timings that might otherwise be specified by the
user. This driver has a concept of fixed, i.e. "native" mode, and
then user-specified mode. If the corresponding resolutions between
those concepts don't match, then the driver in theory will arrange for
scaling to take place while adhering to the actual native mode of the
panel. Said another way, if the user says 800x600 but the driver
mistakenly (see above) thinks the native mode is 640x480, then 640x480
is the mode set with scaling to an 800x600 frame buffer. If the
driver gets the wrong native mode, then the result is a miserable mess
with no way for the user to override what the driver thinks is right.
This patch provides a means to override the driver. This implements a
new driver option, "LVDSFixedMode" which defaults to true (the normal,
probe-what-I-need behavior). However when set to false, then all the
guessing is skipped and the driver will assume no fixed, i.e. "native"
mode for the display device. Instead with this option set to false,
the driver will directly set the timings specified by the user,
providing an escape hatch for situations where the driver can't
correctly figure out the right mode.
Under most scenarios of course, this option should not be needed. But
in situations where the Intel video BIOS is hopelessly fouled up
related to the LVDS output, this option provides the escape hatch for
the user to get a working display in spite of the BIOS situation.
Signed-off-by: Mike Isely <isely@pobox.com>
(cherry picked from commit 9f324860431ff8199a78d19bbaa74046e1476b89)
diff --git a/man/intel.man b/man/intel.man
index 8a8b7a0..aac0efa 100644
--- a/man/intel.man
+++ b/man/intel.man
@@ -200,6 +200,15 @@ LVDS-connected display on the other hand is extremely washed out
(e.g. white on a lighter white), trying this option might clear the
problem.
.TP
+.BI "Option \*qLVDSFixedMode\*q \*q" boolean \*q
+Use a fixed set of timings for the LVDS output, independent of normal
+xorg specified timings. The default value if left unspecified is
+true, which is what you want for a normal LVDS-connected LCD type of
+panel. If you are not sure about this, leave it at its default, which
+allows the driver to automatically figure out the correct fixed panel
+timings. See further in the section about LVDS fixed timing for more
+information.
+.TP
.BI "Option \*qXvMC\*q \*q" boolean \*q
Enable XvMC driver. Current support MPEG2 MC on 915/945 and G33 series.
User should provide absolute path to libIntelXvMC.so in XvMCConfig file.
@@ -295,6 +304,84 @@ sections with these outputs for configuration. Associating Monitor sections
with each output can be helpful if you need to ignore a specific output, for
example, or statically configure an extended desktop monitor layout.
+.SH HARDWARE LVDS FIXED TIMINGS AND SCALING
+
+Following here is a discussion that should shed some light on the
+nature and reasoning behind the LVDSFixedMode option.
+
+Unlike a CRT display, an LCD has a "native" resolution corresponding
+to the actual pixel geometry. A graphics controller under all normal
+circumstances should always output that resolution (and timings) to
+the display. Anything else and the image might not fill the display,
+it might not be centered, or it might have information missing - any
+manner of strange effects can happen if an LCD panel is not fed with
+the expected resolution and timings.
+
+However there are cases where one might want to run an LCD panel at an
+effective resolution other than the native one. And for this reason,
+GPUs which drive LCD panels typically include a hardware scaler to
+match the user-configured frame buffer size to the actual size of the
+panel. Thus when one "sets" his/her 1280x1024 panel to only 1024x768,
+the GPU happily configures a 1024x768 frame buffer, but it scans the
+buffer out in such a way that the image is scaled to 1280x1024 and in
+fact sends 1280x1024 to the panel. This is normally invisible to the
+user; when a "fuzzy" LCD image is seen, scaling like this is why this
+happens.
+
+In order to make this magic work, this driver logically has to be
+configured with two sets of monitor timings - the set specified (or
+otherwise determined) as the normal xorg "mode", and the "fixed"
+timings that are actually sent to the monitor. But with xorg, it's
+only possible to specify the first user-driven set, and not the second
+fixed set. So how does the driver figure out the correct fixed panel
+timings? Normally it will attempt to detect the fixed timings, and it
+uses a number of strategies to figure this out. First it attempts to
+read EDID data from whatever is connected to the LVDS port. Failing
+that, it will check if the LVDS output is already configured (perhaps
+previously by the video BIOS) and will adopt those settings if found.
+Failing that, it will scan the video BIOS ROM, looking for an embedded
+mode table from which it can infer the proper timings. If even that
+fails, then the driver gives up, prints the message "Couldn't detect
+panel mode. Disabling panel" to the X server log, and shuts down the
+LVDS output.
+
+Under most circumstances, the detection scheme works. However there
+are cases when it can go awry. For example, if you have a panel
+without EDID support and it isn't integral to the motherboard
+(i.e. not a laptop), then odds are the driver is either not going to
+find something suitable to use or it is going to find something
+flat-out wrong, leaving a messed up display. Remember that this is
+about the fixed timings being discussed here and not the
+user-specified timings which can always be set in xorg.conf in the
+worst case. So when this process goes awry there seems to be little
+recourse. This sort of scenario can happen in some embedded
+applications.
+
+The LVDSFixedMode option is present to deal with this. This option
+normally enables the above-described detection strategy. And since it
+defaults to true, this is in fact what normally happens. However if
+the detection fails to do the right thing, the LVDSFixedMode option
+can instead be set to false, which disables all the magic. With
+LVDSFixedMode set to false, the detection steps are skipped and the
+driver proceeds without a specified fixed mode timing. This then
+causes the hardware scaler to be disabled, and the actual timings then
+used fall back to those normally configured via the usual xorg
+mechanisms.
+
+Having LVDSFixedMode set to false means that whatever is used for the
+monitor's mode (e.g. a modeline setting) is precisely what is sent to
+the device connected to the LVDS port. This also means that the user
+now has to determine the correct mode to use - but it's really no
+different than the work for correctly configuring an old-school CRT
+anyway, and the alternative if detection fails will be a useless
+display.
+
+In short, leave LVDSFixedMode alone (thus set to true) and normal
+fixed mode detection will take place, which in most cases is exactly
+what is needed. Set LVDSFixedMode to false and then the user has full
+control over the resolution and timings sent to the LVDS-connected
+device, through the usual means in xorg.
+
.SH "SEE ALSO"
__xservername__(__appmansuffix__), __xconfigfile__(__filemansuffix__), xorgconfig(__appmansuffix__), Xserver(__appmansuffix__), X(__miscmansuffix__)
.SH AUTHORS
diff --git a/src/i830.h b/src/i830.h
index 28831e4..0ae8270 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -652,6 +652,7 @@ typedef struct _I830Rec {
/** Enables logging of debug output related to mode switching. */
Bool debug_modes;
+ Bool lvds_fixed_mode;
unsigned int quirk_flag;
} I830Rec;
diff --git a/src/i830_driver.c b/src/i830_driver.c
index ef898dc..0db174b 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -305,6 +305,7 @@ typedef enum {
#ifdef XF86DRI_MM
OPTION_INTELTEXPOOL,
#endif
+ OPTION_LVDSFIXEDMODE,
OPTION_TRIPLEBUFFER,
OPTION_FORCEENABLEPIPEA,
#ifdef INTEL_XVMC
@@ -332,6 +333,7 @@ static OptionInfoRec I830Options[] = {
#ifdef XF86DRI_MM
{OPTION_INTELTEXPOOL,"Legacy3D", OPTV_BOOLEAN, {0}, FALSE},
#endif
+ {OPTION_LVDSFIXEDMODE, "LVDSFixedMode", OPTV_BOOLEAN, {0}, FALSE},
{OPTION_TRIPLEBUFFER, "TripleBuffer", OPTV_BOOLEAN, {0}, FALSE},
{OPTION_FORCEENABLEPIPEA, "ForceEnablePipeA", OPTV_BOOLEAN, {0}, FALSE},
#ifdef INTEL_XVMC
@@ -1416,6 +1418,12 @@ I830PreInit(ScrnInfoPtr pScrn, int flags)
pI830->lvds_24_bit_mode = FALSE;
}
+ if (xf86ReturnOptValBool(pI830->Options, OPTION_LVDSFIXEDMODE, TRUE)) {
+ pI830->lvds_fixed_mode = TRUE;
+ } else {
+ pI830->lvds_fixed_mode = FALSE;
+ }
+
if (xf86ReturnOptValBool(pI830->Options, OPTION_FORCEENABLEPIPEA, FALSE))
pI830->quirk_flag |= QUIRK_PIPEA_FORCE;
diff --git a/src/i830_lvds.c b/src/i830_lvds.c
index 1562c21..48402df 100644
--- a/src/i830_lvds.c
+++ b/src/i830_lvds.c
@@ -1228,6 +1228,14 @@ i830_lvds_init(ScrnInfoPtr pScrn)
*/
I830I2CInit(pScrn, &intel_output->pDDCBus, GPIOC, "LVDSDDC_C");
+ if (!pI830->lvds_fixed_mode) {
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Skipping any attempt to determine panel fixed mode.\n");
+ goto skip_panel_fixed_mode_setup;
+ }
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Attempting to determine panel fixed mode.\n");
+
/* Attempt to get the fixed panel mode from DDC. Assume that the preferred
* mode is the right one.
*/
@@ -1311,6 +1319,8 @@ i830_lvds_init(ScrnInfoPtr pScrn)
goto disable_exit;
}
+ skip_panel_fixed_mode_setup:
+
/* Blacklist machines with BIOSes that list an LVDS panel without actually
* having one.
*/
commit 3b8804d82266ffc01ac1573624387b0d1f9dfb94
Author: Jesse Barnes <jbarnes@hobbes.lan>
Date: Wed May 7 14:46:52 2008 -0700
Save/restore cursor registers
There are lots of good reasons for doing this, one of them is fdo bug #11305.
(cherry picked from commit 33f033cbf346c13a687e469e8879579fcd5bb2fb)
diff --git a/src/i830.h b/src/i830.h
index 431abb5..28831e4 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -621,6 +621,12 @@ typedef struct _I830Rec {
uint32_t saveVCLK_DIVISOR_VGA1;
uint32_t saveVCLK_POST_DIV;
uint32_t saveVGACNTRL;
+ uint32_t saveCURSOR_A_CONTROL;
+ uint32_t saveCURSOR_A_BASE;
+ uint32_t saveCURSOR_A_POSITION;
+ uint32_t saveCURSOR_B_CONTROL;
+ uint32_t saveCURSOR_B_BASE;
+ uint32_t saveCURSOR_B_POSITION;
uint32_t saveADPA;
uint32_t saveLVDS;
uint32_t saveDVOA;
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 0112e1d..ef898dc 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -2033,6 +2033,13 @@ SaveHWState(ScrnInfoPtr pScrn)
pI830->saveVCLK_POST_DIV = INREG(VCLK_POST_DIV);
pI830->saveVGACNTRL = INREG(VGACNTRL);
+ pI830->saveCURSOR_A_CONTROL = INREG(CURSOR_A_CONTROL);
+ pI830->saveCURSOR_A_POSITION = INREG(CURSOR_A_POSITION);
+ pI830->saveCURSOR_A_BASE = INREG(CURSOR_A_BASE);
+ pI830->saveCURSOR_B_CONTROL = INREG(CURSOR_B_CONTROL);
+ pI830->saveCURSOR_B_POSITION = INREG(CURSOR_B_POSITION);
+ pI830->saveCURSOR_B_BASE = INREG(CURSOR_B_BASE);
+
for(i = 0; i < 7; i++) {
pI830->saveSWF[i] = INREG(SWF0 + (i << 2));
pI830->saveSWF[i+7] = INREG(SWF00 + (i << 2));
@@ -2234,6 +2241,20 @@ RestoreHWState(ScrnInfoPtr pScrn)
OUTREG(VGACNTRL, pI830->saveVGACNTRL);
+ /*
+ * Restore cursors
+ * Even though the X cursor is hidden before we restore the hw state,
+ * we probably only disabled one cursor plane. If we're going from
+ * e.g. plane b to plane a here in RestoreHWState, we need to restore
+ * both cursor plane settings.
+ */
+ OUTREG(CURSOR_A_POSITION, pI830->saveCURSOR_A_POSITION);
+ OUTREG(CURSOR_A_BASE, pI830->saveCURSOR_A_BASE);
+ OUTREG(CURSOR_A_CONTROL, pI830->saveCURSOR_A_CONTROL);
+ OUTREG(CURSOR_B_POSITION, pI830->saveCURSOR_B_POSITION);
+ OUTREG(CURSOR_B_BASE, pI830->saveCURSOR_B_BASE);
+ OUTREG(CURSOR_B_CONTROL, pI830->saveCURSOR_B_CONTROL);
+
/* Restore outputs */
for (i = 0; i < xf86_config->num_output; i++) {
xf86OutputPtr output = xf86_config->output[i];
commit 0ab5cbc5310c2a60c10fd611fcf9a4791379f42b
Author: Zhenyu Wang <zhenyu.z.wang@intel.com>
Date: Wed May 7 14:21:59 2008 +0800
Use I830FALLBACK when check pitch for debug
(cherry picked from commit a7188b1f2dd9a69fa7daefe478d283735226f9f3)
diff --git a/src/i830.h b/src/i830.h
index 8508f82..431abb5 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -859,13 +859,13 @@ Bool i830_pixmap_tiled(PixmapPtr p);
#define i830_exa_check_pitch_2d(p) do {\
uint32_t pitch = intel_get_pixmap_pitch(p);\
- if (pitch > KB(32)) return FALSE;\
+ if (pitch > KB(32)) I830FALLBACK("pitch exceeds 2d limit 32K\n");\
} while(0)
/* For pre-965 chip only, as they have 8KB limit for 3D */
#define i830_exa_check_pitch_3d(p) do {\
uint32_t pitch = intel_get_pixmap_pitch(p);\
- if (pitch > KB(8)) return FALSE;\
+ if (pitch > KB(8)) I830FALLBACK("pitch exceeds 3d limit 8K\n");\
} while(0)
/* Batchbuffer compatibility handling */
commit 5749983fc6bae0a845bff0dbdd79c87420dffcf4
Author: Eric Anholt <eric@anholt.net>
Date: Tue May 6 18:48:20 2008 -0700
Bug #15807: Fix use of the ring while VT-switched, hit by fast user switching.
The fix for flushing at blockhandler with no DRI on 965 was broken and would
try to flush the chip even when the driver wasn't in control of the VT.
Hilarity ensued.
(cherry picked from commit 36ec93300926084fb2951d69b001e4c67bc6ff79)
diff --git a/src/i830_driver.c b/src/i830_driver.c
index d31ceb9..0112e1d 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -2407,7 +2407,7 @@ I830BlockHandler(int i,
* after the page flipping updates, so there's no need to duplicate
* the effort here.
*/
- if (!pI830->noAccel && !pI830->directRenderingEnabled)
+ if (pScrn->vtSema && !pI830->noAccel && !pI830->directRenderingEnabled)
I830EmitFlush(pScrn);
I830VideoBlockHandler(i, blockData, pTimeout, pReadmask);
commit ab0aa8e16c6bec2785006cee09dc1ae93a1988da
Author: Jesse Barnes <jbarnes@nietzche.virtuousgeek.org>
Date: Tue May 6 14:38:48 2008 -0700
Add FIFO watermark regs to register dumper
(cherry picked from commit 0c00a638ef57aa9d6a3047176b0bfad733f781f0)
diff --git a/src/i810_reg.h b/src/i810_reg.h
index 834b948..cc4620a 100644
--- a/src/i810_reg.h
+++ b/src/i810_reg.h
@@ -497,6 +497,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#define FWATER_BLC 0x20d8
#define FWATER_BLC2 0x20dc
+#define FWATER_BLC_SELF 0x20e0
#define MM_BURST_LENGTH 0x00700000
#define MM_FIFO_WATERMARK 0x0001F000
#define LM_BURST_LENGTH 0x00000700
diff --git a/src/i830_debug.c b/src/i830_debug.c
index 15b02ce..0eba57f 100644
--- a/src/i830_debug.c
+++ b/src/i830_debug.c
@@ -546,6 +546,10 @@ static struct i830SnapshotRec {
DEFINEREG(FBC_FENCE_OFF),
DEFINEREG(FBC_MOD_NUM),
+ DEFINEREG(FWATER_BLC),
+ DEFINEREG(FWATER_BLC2),
+ DEFINEREG(FWATER_BLC_SELF),
+
DEFINEREG2(FPA0, i830_debug_fp),
DEFINEREG2(FPA1, i830_debug_fp),
DEFINEREG2(DPLL_A, i830_debug_dpll),
commit ad02b795f5aa01d1e5b85f3661ae574e898fe41e
Author: Zhenyu Wang <zhenyu.z.wang@intel.com>
Date: Tue May 6 13:52:22 2008 +0800
Only check xvmc lib when xvmc is enabled.
Don't check xvmc lib if user has already wanted to disable it.
Fix fdo bug #15762.
(cherry picked from commit c81a4687fca80bf7367d7f0e9a00a6a09737c5bb)
diff --git a/configure.ac b/configure.ac
index 23939c9..7401451 100644
--- a/configure.ac
+++ b/configure.ac
@@ -82,7 +82,7 @@ XORG_DRIVER_CHECK_EXT(XF86DRI, xextproto x11)
XORG_DRIVER_CHECK_EXT(DPMSExtension, xextproto)
# Checks for pkg-config packages
-PKG_CHECK_MODULES(XORG, [xorg-server xproto xvmc fontsproto $REQUIRED_MODULES])
+PKG_CHECK_MODULES(XORG, [xorg-server xproto fontsproto $REQUIRED_MODULES])
sdkdir=$(pkg-config --variable=sdkdir xorg-server)
# Checks for libraries.
@@ -225,17 +225,21 @@ if test "$VIDEO_DEBUG" = yes; then
AC_DEFINE(VIDEO_DEBUG,1,[Enable debug support])
fi
-AC_MSG_CHECKING([whether to include XvMC support])
if test "$XVMC" = auto; then
XVMC="$DRI"
fi
if test "$XVMC" = yes && test "$DRI" = no; then
AC_MSG_ERROR([XvMC can't be enabled without DRI])
fi
+if test "$XVMC" = yes; then
+ PKG_CHECK_MODULES(XVMCLIB, [xvmc], [XVMC=yes], [XVMC=no])
+fi
+AC_MSG_CHECKING([whether to include XvMC support])
AC_MSG_RESULT([$XVMC])
AM_CONDITIONAL(XVMC, test x$XVMC = xyes)
if test "$XVMC" = yes; then
AC_DEFINE(ENABLE_XVMC,1,[Enable XvMC support])
+ AC_SUBST([XVMCLIB_CFLAGS])
fi
diff --git a/src/xvmc/Makefile.am b/src/xvmc/Makefile.am
index 7ae429a..f571743 100644
--- a/src/xvmc/Makefile.am
+++ b/src/xvmc/Makefile.am
@@ -22,7 +22,7 @@ libIntelXvMC_la_SOURCES = intel_xvmc.c \
xf86dristr.h \
driDrawable.c \
driDrawable.h
-libIntelXvMC_la_CFLAGS = @XORG_CFLAGS@ @DRI_CFLAGS@ -I$(top_srcdir)/src -DTRUE=1 -DFALSE=0
+libIntelXvMC_la_CFLAGS = @XORG_CFLAGS@ @DRI_CFLAGS@ @XVMCLIB_CFLAGS@ -I$(top_srcdir)/src -DTRUE=1 -DFALSE=0
libIntelXvMC_la_LDFLAGS = -version-number 1:0:0
libIntelXvMC_la_LIBADD = @DRI_LIBS@
endif
commit 8103c3c404500fa21079bd04530fd8ee836474f4
Author: Bryce Harrington <bryce@bryceharrington.org>
Date: Tue May 6 13:51:46 2008 +0800
More quirks from ubuntu/dell
(cherry picked from commit be746a90a87d7a9807fa4243493e7e4d48f7f1c0)
diff --git a/src/i830_quirks.c b/src/i830_quirks.c
index aaff753..72e735b 100644
--- a/src/i830_quirks.c
+++ b/src/i830_quirks.c
@@ -235,6 +235,8 @@ static i830_quirk i830_quirk_list[] = {
{ PCI_CHIP_I965_GM, 0x1028, 0x0254, quirk_ignore_tv },
/* Dell Inspiron 1735 */
{ PCI_CHIP_I965_GM, 0x1028, 0x0256, quirk_ignore_tv },
+ /* Dell Inspiron 1318 */
+ { PCI_CHIP_I965_GM, 0x1028, 0x0286, quirk_ignore_tv },
/* Lenovo Napa TV (use dmi)*/
{ PCI_CHIP_I945_GM, 0x17aa, SUBSYS_ANY, quirk_lenovo_tv_dmi },
@@ -264,9 +266,6 @@ static i830_quirk i830_quirk_list[] = {
/* HP Compaq 6730s has no TV output */
{ PCI_CHIP_IGD_GM, 0x103c, 0x30e8, quirk_ignore_tv },
- /* Dell Inspiron 510m needs pipe A force quirk */
- { PCI_CHIP_I855_GM, 0x1028, 0x0164, quirk_pipea_force },
-
/* Thinkpad R31 needs pipe A force quirk */
{ PCI_CHIP_I830_M, 0x1014, 0x0505, quirk_pipea_force },
/* Dell Latitude D500 needs pipe A force quirk */
@@ -277,19 +276,26 @@ static i830_quirk i830_quirk_list[] = {
{ PCI_CHIP_I855_GM, 0x1028, 0x0164, quirk_pipea_force },
/* Toshiba Protege R-205, S-209 needs pipe A force quirk */
{ PCI_CHIP_I915_GM, 0x1179, 0x0001, quirk_pipea_force },
+ /* Intel 855GM hardware (See LP: #216490) */
+ { PCI_CHIP_I855_GM, 0x1028, 0x00c8, quirk_pipea_force },
/* ThinkPad X40 needs pipe A force quirk */
{ PCI_CHIP_I855_GM, 0x1014, 0x0557, quirk_pipea_force },
/* Sony vaio PCG-r600HFP (fix bug 13722) */
{ PCI_CHIP_I830_M, 0x104d, 0x8100, quirk_ivch_dvob },
+ /* Sony vaio VGN-SZ4MN (See LP: #212163) */
+ { PCI_CHIP_I830_M, 0x104d, 0x81e6, quirk_pipea_force },
- /* Intel 945GM hardware (See LP: #152416) */
+ /* Ordi Enduro UW31 (See LP: #152416) */
{ PCI_CHIP_I945_GM, 0x1584, 0x9900, quirk_ignore_tv },
/* Dell Latitude D500 needs reset modes quirk */
{ PCI_CHIP_I855_GM, 0x1028, 0x0152, quirk_reset_modes },
+ /* Littlebit Sepia X35 (rebranded Asus Z37E) (See LP: #201257) */
+ { PCI_CHIP_I965_GM, 0x1043, 0x8265, quirk_ignore_tv },
+
{ 0, 0, 0, NULL },
};
commit 9c5785c2f4faaac4a0d7dab774123389ed595fc0
Author: Jesse Barnes <jbarnes@hobbes.lan>
Date: Tue Apr 29 13:19:02 2008 -0700
Add a new quirk for BIOSes that reprogram regs at lid close/open time
Dell Latitude D500s seem to have this problem. At lid close/open, the DSPABASE
reg gets reset to 0, so we either need to keep the framebuffer at offset 0 or
make sure we reprogram the CRTCs after the lid opens again. Since we can't
make sure the former is always true (buffer resize, etc.), this patch adds a
quirk to reset the modes at lid open time.
Fixes FDO bug #14890.
(cherry picked from commit a0ced923bb793aa22e6bfbeeec0888d3b42ce176)
diff --git a/src/i830.h b/src/i830.h
index e2c39cc..8508f82 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -896,6 +896,7 @@ extern const int I830CopyROP[16];
#define QUIRK_IGNORE_MACMINI_LVDS 0x00000004
#define QUIRK_PIPEA_FORCE 0x00000008
#define QUIRK_IVCH_NEED_DVOB 0x00000010
+#define QUIRK_RESET_MODES 0x00000020
extern void i830_fixup_devices(ScrnInfoPtr);
#endif /* _I830_H_ */
diff --git a/src/i830_driver.c b/src/i830_driver.c
index cc3d02d..d31ceb9 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -3518,6 +3518,9 @@ I830PMEvent(int scrnIndex, pmEvent event, Bool undo)
I830CheckDevicesTimer(NULL, 0, pScrn);
SaveScreens(SCREEN_SAVER_FORCER, ScreenSaverReset);
+ if (pI830->quirk_flag & QUIRK_RESET_MODES)
+ xf86SetDesiredModes(pScrn);
+
break;
default:
ErrorF("I830PMEvent: received APM event %d\n", event);
diff --git a/src/i830_quirks.c b/src/i830_quirks.c
index 24c9658..aaff753 100644
--- a/src/i830_quirks.c
+++ b/src/i830_quirks.c
@@ -161,6 +161,15 @@ static void i830_dmi_dump(void)
DMIID_DUMP(chassis_asset_tag);
}
+/*
+ * Some machines hose the display regs regardless of the ACPI DOS
+ * setting, so we need to reset modes at ACPI event time.
+ */
+static void quirk_reset_modes (I830Ptr pI830)
+{
+ pI830->quirk_flag |= QUIRK_RESET_MODES;
+}
+
static void quirk_pipea_force (I830Ptr pI830)
{
pI830->quirk_flag |= QUIRK_PIPEA_FORCE;
@@ -278,6 +287,9 @@ static i830_quirk i830_quirk_list[] = {
/* Intel 945GM hardware (See LP: #152416) */
{ PCI_CHIP_I945_GM, 0x1584, 0x9900, quirk_ignore_tv },
+ /* Dell Latitude D500 needs reset modes quirk */
+ { PCI_CHIP_I855_GM, 0x1028, 0x0152, quirk_reset_modes },
+
{ 0, 0, 0, NULL },
};
commit f83960f3edb8a8be12ce9dc46a9b9a292de816d6
Author: Keith Packard <keithp@keithp.com>
Date: Tue Apr 29 10:32:14 2008 -0700
Use new xf86RotateFreeShadow function to clean up shadow buffers.
This simply moves code from the driver up into the X server; use it where
available.
(cherry picked from commit fff17b9d1b58cb53032d153094826dd306836d59)
diff --git a/configure.ac b/configure.ac
index da479dc..23939c9 100644
--- a/configure.ac
+++ b/configure.ac
@@ -173,6 +173,18 @@ fi
AC_SUBST([XMODES_CFLAGS])
+SAVE_CPPFLAGS="$CPPFLAGS"
+CPPFLAGS="$CPPFLAGS $XORG_CFLAGS"
+
+AC_CHECK_DECL(xf86RotateFreeShadow,
+ [AC_DEFINE(HAVE_FREE_SHADOW, 1, [have new FreeShadow API])],
+ [],
+ [#include <xorg-server.h>
+ #include <windowstr.h>
+ #include <xf86Crtc.h>])
+
+CPPFLAGS="$SAVE_CPPFLAGS"
+
dnl Use lots of warning flags with GCC
WARN_CFLAGS=""
diff --git a/src/i830_driver.c b/src/i830_driver.c
index f404677..cc3d02d 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -3132,7 +3132,9 @@ I830LeaveVT(int scrnIndex, int flags)
ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
I830Ptr pI830 = I830PTR(pScrn);
xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(pScrn);
+#ifndef HAVE_FREE_SHADOW
int o;
+#endif
DPRINTF(PFX, "Leave VT\n");
@@ -3160,6 +3162,7 @@ I830LeaveVT(int scrnIndex, int flags)
}
#endif
+#ifndef HAVE_FREE_SHADOW
for (o = 0; o < config->num_crtc; o++) {
xf86CrtcPtr crtc = config->crtc[o];
@@ -3170,6 +3173,9 @@ I830LeaveVT(int scrnIndex, int flags)
crtc->rotatedData = NULL;
}
}
+#else
+ xf86RotateFreeShadow(pScrn);
+#endif
xf86_hide_cursors (pScrn);
commit 1df4fd9f1e7f1c6abea4ea134fbc1b3755988817
Author: Keith Packard <keithp@keithp.com>
Date: Wed Apr 23 11:08:38 2008 -0700
Overlay video doesn't require that the target pixmap be in video memory.
I830PutImage was checking to make sure the target pixmap resided in video
memory, but this isn't necessary when using the overlay. Test
(cherry picked from commit 1d467a8038946a37844795e8860be113d43219ac)
diff --git a/src/i830_video.c b/src/i830_video.c
index 64024d2..67fe291 100644
--- a/src/i830_video.c
+++ b/src/i830_video.c
@@ -2494,13 +2494,13 @@ I830PutImage(ScrnInfoPtr pScrn,
}
#ifdef I830_USE_EXA
- if (pI830->useEXA) {
+ if (pPriv->textured && pI830->useEXA) {
/* Force the pixmap into framebuffer so we can draw to it. */
exaMoveInPixmap(pPixmap);
}
#endif
- if (!pI830->useEXA &&
+ if (pPriv->textured && !pI830->useEXA &&
(((char *)pPixmap->devPrivate.ptr < (char *)pI830->FbBase) ||
((char *)pPixmap->devPrivate.ptr >= (char *)pI830->FbBase +
pI830->FbMapSize))) {
commit 259ad818f2b7ac63fb84516e8a49e264840af107
Author: Zhenyu Wang <zhenyu.z.wang@intel.com>
Date: Wed Apr 23 13:42:24 2008 +0800
Bump version 2.3.0
diff --git a/configure.ac b/configure.ac
index 001e5e1..da479dc 100644
--- a/configure.ac
+++ b/configure.ac
@@ -22,7 +22,7 @@
AC_PREREQ(2.57)
AC_INIT([xf86-video-intel],
- 2.2.99.903,
+ 2.3.0,
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg],
xf86-video-intel)
commit 5214139e30bb51bea8c18f270e060339678c8715
Author: Zhenyu Wang <zhenyu.z.wang@intel.com>
Date: Wed Apr 23 13:39:49 2008 +0800
Fix warning with i830_exa_pixmap_is_offscreen() for exa minor >=2
diff --git a/src/i830_exa.c b/src/i830_exa.c
index 2c807c5..0ebf3df 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -121,6 +121,7 @@ i830_pixmap_tiled(PixmapPtr pPixmap)
return FALSE;
}
+#if EXA_VERSION_MINOR >= 2
static Bool
i830_exa_pixmap_is_offscreen(PixmapPtr pPixmap)
{
@@ -136,6 +137,7 @@ i830_exa_pixmap_is_offscreen(PixmapPtr pPixmap)
return FALSE;
}
}
+#endif
/**
* I830EXASync - wait for a command to finish
commit f08aa4c291e4f5491372434e3ee08dfb15d5aa94
Author: Keith Packard <keithp@keithp.com>
Date: Thu Apr 17 10:04:55 2008 -0700
Add a kludge-around to fix cd/wt bits in fb ptes on linux.
Mmap from /sys/devices/pci* on linux forces the cache-disable and
write-through bits, which turns our write-combining map into an
uncached-map, seriously impacting performance. It turns out that a bug in
mprotect allows us to fix this by disabling access to those pages and then
immediately re-enabling them.
(cherry picked from commit c3fb62df4e60b63295f94c99b3c5de70dbf94e1c)
diff --git a/configure.ac b/configure.ac
index 170d59b..001e5e1 100644
--- a/configure.ac
+++ b/configure.ac
@@ -43,6 +43,9 @@ AM_PROG_CC_C_O
AC_CHECK_PROG(gen4asm, [intel-gen4asm], yes, no)
AM_CONDITIONAL(HAVE_GEN4ASM, test x$gen4asm = xyes)
+AC_CHECK_HEADERS(sys/mman.h)
+AC_CHECK_FUNCS(mprotect)
+
AH_TOP([#include "xorg-server.h"])
AC_ARG_WITH(xorg-module-dir,
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 41c0578..f404677 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -197,6 +197,9 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "i830_debug.h"
#include "i830_bios.h"
#include "i830_video.h"
+#if HAVE_SYS_MMAN_H && HAVE_MPROTECT
+#include <sys/mman.h>
+#endif
#ifdef INTEL_XVMC
#define _INTEL_XVMC_SERVER_
@@ -685,6 +688,13 @@ I830MapMem(ScrnInfoPtr pScrn)
err = pci_device_map_range (device, pI830->LinearAddr, pI830->FbMapSize,
PCI_DEV_MAP_FLAG_WRITABLE | PCI_DEV_MAP_FLAG_WRITE_COMBINE,
(void **) &pI830->FbBase);
+ if (err)
+ return FALSE;
+ /* KLUDGE ALERT -- rewrite the PTEs to turn off the CD and WT bits */
+#if HAVE_MPROTECT
+ mprotect (pI830->FbBase, pI830->FbMapSize, PROT_NONE);
+ mprotect (pI830->FbBase, pI830->FbMapSize, PROT_READ|PROT_WRITE);
+#endif
#else
pI830->FbBase = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER,
pI830->PciTag,
commit 8187a5a16f8bd8f0ba5e7f5357f355928b3b8f07
Author: Zhenyu Wang <zhenyu.z.wang@intel.com>
Date: Sat Apr 19 08:54:38 2008 +0800
Check pitch for EXA operation
2D pitch limit applys to all chips. Pre-965 chip has
8KB pitch limit for 3D. 965 supports max pitch by current
exa (128KB).
diff --git a/src/i830.h b/src/i830.h
index 834e4dc..e2c39cc 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -857,6 +857,17 @@ static inline int i830_fb_compression_supported(I830Ptr pI830)
Bool i830_pixmap_tiled(PixmapPtr p);
+#define i830_exa_check_pitch_2d(p) do {\
+ uint32_t pitch = intel_get_pixmap_pitch(p);\
+ if (pitch > KB(32)) return FALSE;\
+} while(0)
+
+/* For pre-965 chip only, as they have 8KB limit for 3D */
+#define i830_exa_check_pitch_3d(p) do {\
+ uint32_t pitch = intel_get_pixmap_pitch(p);\
+ if (pitch > KB(8)) return FALSE;\
+} while(0)
+
/* Batchbuffer compatibility handling */
#define BEGIN_BATCH(n) BEGIN_LP_RING(n)
#define ENSURE_BATCH(n)
diff --git a/src/i830_exa.c b/src/i830_exa.c
index 9b5bb93..2c807c5 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -170,6 +170,8 @@ I830EXAPrepareSolid(PixmapPtr pPixmap, int alu, Pixel planemask, Pixel fg)
if (pPixmap->drawable.bitsPerPixel == 24)
I830FALLBACK("solid 24bpp unsupported!\n");
+ i830_exa_check_pitch_2d(pPixmap);
+
offset = exaGetPixmapOffset(pPixmap);
pitch = exaGetPixmapPitch(pPixmap);
@@ -255,6 +257,9 @@ I830EXAPrepareCopy(PixmapPtr pSrcPixmap, PixmapPtr pDstPixmap, int xdir,
if (!EXA_PM_IS_SOLID(&pSrcPixmap->drawable, planemask))
I830FALLBACK("planemask is not solid");
+ i830_exa_check_pitch_2d(pSrcPixmap);
+ i830_exa_check_pitch_2d(pDstPixmap);
+
pI830->pSrcPixmap = pSrcPixmap;
pI830->BR[13] = I830CopyROP[alu] << 16;
diff --git a/src/i830_render.c b/src/i830_render.c
index 195e9a8..3a959e8 100644
--- a/src/i830_render.c
+++ b/src/i830_render.c
@@ -398,6 +398,11 @@ i830_prepare_composite(int op, PicturePtr pSrcPicture,
Bool is_affine_src, is_affine_mask;
Bool is_nearest = FALSE;
+ i830_exa_check_pitch_3d(pSrc);
+ if (pMask)
+ i830_exa_check_pitch_3d(pMask);
+ i830_exa_check_pitch_3d(pDst);
+
IntelEmitInvarientState(pScrn);
*pI830->last_3d = LAST_3D_RENDER;
diff --git a/src/i915_render.c b/src/i915_render.c
index 2b9ed04..4a02cf5 100644
--- a/src/i915_render.c
+++ b/src/i915_render.c
@@ -323,6 +323,11 @@ i915_prepare_composite(int op, PicturePtr pSrcPicture,
Bool is_affine_src, is_affine_mask;
Bool is_nearest = FALSE;
+ i830_exa_check_pitch_3d(pSrc);
+ if (pMask)
+ i830_exa_check_pitch_3d(pMask);
+ i830_exa_check_pitch_3d(pDst);
+
IntelEmitInvarientState(pScrn);
*pI830->last_3d = LAST_3D_RENDER;
commit bfcc83ad1a3eb7b2acc44223c86fa007cd34a27c
Author: Zhenyu Wang <zhenyu.z.wang@intel.com>
Date: Fri Apr 18 16:48:38 2008 +0800
Revert "Set EXA pitch limit for pre-965 chipset"
This reverts commit 602613e397bdf0cf701a6a7748f9343875864466.
Pre-965 chipset actually have different pitch limit for 2d and 3d
engine. For 2D blit, it's 32KB max. For 3D, it's 8KB max. Don't
limit it to minimal which fallback 2D operations (noteable copy
slow).
diff --git a/src/i830_exa.c b/src/i830_exa.c
index 9e43bf7..9b5bb93 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -510,17 +510,11 @@ I830EXAInit(ScreenPtr pScreen)
pI830->EXADriverPtr->pixmapPitchAlign = 16;
pI830->EXADriverPtr->maxX = 8192;
pI830->EXADriverPtr->maxY = 8192;
- /* maxPitch setting not necessary on 965, as hw support
- * exa max pitch 128KB. */
} else {
pI830->EXADriverPtr->pixmapOffsetAlign = 4;
pI830->EXADriverPtr->pixmapPitchAlign = 16;
pI830->EXADriverPtr->maxX = 2048;
pI830->EXADriverPtr->maxY = 2048;
-#if EXA_VERSION_MINOR >= 3
- pI830->EXADriverPtr->maxPitchPixels = pI830->EXADriverPtr->maxX;
- pI830->EXADriverPtr->maxPitchBytes = KB(8);
-#endif
}
/* Sync */
commit 602613e397bdf0cf701a6a7748f9343875864466
Author: Zhenyu Wang <zhenyu.z.wang@intel.com>
Date: Thu Apr 17 16:55:47 2008 +0800
Set EXA pitch limit for pre-965 chipset
diff --git a/src/i830_exa.c b/src/i830_exa.c
index 9b5bb93..9e43bf7 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -510,11 +510,17 @@ I830EXAInit(ScreenPtr pScreen)
pI830->EXADriverPtr->pixmapPitchAlign = 16;
pI830->EXADriverPtr->maxX = 8192;
pI830->EXADriverPtr->maxY = 8192;
+ /* maxPitch setting not necessary on 965, as hw support
+ * exa max pitch 128KB. */
} else {
pI830->EXADriverPtr->pixmapOffsetAlign = 4;
pI830->EXADriverPtr->pixmapPitchAlign = 16;
pI830->EXADriverPtr->maxX = 2048;
pI830->EXADriverPtr->maxY = 2048;
+#if EXA_VERSION_MINOR >= 3
+ pI830->EXADriverPtr->maxPitchPixels = pI830->EXADriverPtr->maxX;
+ pI830->EXADriverPtr->maxPitchBytes = KB(8);
+#endif
}
/* Sync */
commit 5a1f7351c5bfa9f12cf718036ccc43f66787ce11
Author: Hong Liu <hong.liu@intel.com>
Date: Thu Apr 17 10:57:34 2008 +0800
fix possible segfault in I830FreeScreen
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