xserver-xorg-video-intel: Changes to 'upstream-experimental'
configure.ac | 5 ++++-
src/i830.h | 11 +++++++++++
src/i830_driver.c | 12 +++++++++++-
src/i830_exa.c | 7 +++++++
src/i830_lvds.c | 5 +++--
src/i830_render.c | 5 +++++
src/i915_render.c | 5 +++++
7 files changed, 46 insertions(+), 4 deletions(-)
New commits:
commit 259ad818f2b7ac63fb84516e8a49e264840af107
Author: Zhenyu Wang <zhenyu.z.wang@intel.com>
Date: Wed Apr 23 13:42:24 2008 +0800
Bump version 2.3.0
diff --git a/configure.ac b/configure.ac
index 001e5e1..da479dc 100644
--- a/configure.ac
+++ b/configure.ac
@@ -22,7 +22,7 @@
AC_PREREQ(2.57)
AC_INIT([xf86-video-intel],
- 2.2.99.903,
+ 2.3.0,
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg],
xf86-video-intel)
commit 5214139e30bb51bea8c18f270e060339678c8715
Author: Zhenyu Wang <zhenyu.z.wang@intel.com>
Date: Wed Apr 23 13:39:49 2008 +0800
Fix warning with i830_exa_pixmap_is_offscreen() for exa minor >=2
diff --git a/src/i830_exa.c b/src/i830_exa.c
index 2c807c5..0ebf3df 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -121,6 +121,7 @@ i830_pixmap_tiled(PixmapPtr pPixmap)
return FALSE;
}
+#if EXA_VERSION_MINOR >= 2
static Bool
i830_exa_pixmap_is_offscreen(PixmapPtr pPixmap)
{
@@ -136,6 +137,7 @@ i830_exa_pixmap_is_offscreen(PixmapPtr pPixmap)
return FALSE;
}
}
+#endif
/**
* I830EXASync - wait for a command to finish
commit f08aa4c291e4f5491372434e3ee08dfb15d5aa94
Author: Keith Packard <keithp@keithp.com>
Date: Thu Apr 17 10:04:55 2008 -0700
Add a kludge-around to fix cd/wt bits in fb ptes on linux.
Mmap from /sys/devices/pci* on linux forces the cache-disable and
write-through bits, which turns our write-combining map into an
uncached-map, seriously impacting performance. It turns out that a bug in
mprotect allows us to fix this by disabling access to those pages and then
immediately re-enabling them.
(cherry picked from commit c3fb62df4e60b63295f94c99b3c5de70dbf94e1c)
diff --git a/configure.ac b/configure.ac
index 170d59b..001e5e1 100644
--- a/configure.ac
+++ b/configure.ac
@@ -43,6 +43,9 @@ AM_PROG_CC_C_O
AC_CHECK_PROG(gen4asm, [intel-gen4asm], yes, no)
AM_CONDITIONAL(HAVE_GEN4ASM, test x$gen4asm = xyes)
+AC_CHECK_HEADERS(sys/mman.h)
+AC_CHECK_FUNCS(mprotect)
+
AH_TOP([#include "xorg-server.h"])
AC_ARG_WITH(xorg-module-dir,
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 41c0578..f404677 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -197,6 +197,9 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "i830_debug.h"
#include "i830_bios.h"
#include "i830_video.h"
+#if HAVE_SYS_MMAN_H && HAVE_MPROTECT
+#include <sys/mman.h>
+#endif
#ifdef INTEL_XVMC
#define _INTEL_XVMC_SERVER_
@@ -685,6 +688,13 @@ I830MapMem(ScrnInfoPtr pScrn)
err = pci_device_map_range (device, pI830->LinearAddr, pI830->FbMapSize,
PCI_DEV_MAP_FLAG_WRITABLE | PCI_DEV_MAP_FLAG_WRITE_COMBINE,
(void **) &pI830->FbBase);
+ if (err)
+ return FALSE;
+ /* KLUDGE ALERT -- rewrite the PTEs to turn off the CD and WT bits */
+#if HAVE_MPROTECT
+ mprotect (pI830->FbBase, pI830->FbMapSize, PROT_NONE);
+ mprotect (pI830->FbBase, pI830->FbMapSize, PROT_READ|PROT_WRITE);
+#endif
#else
pI830->FbBase = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER,
pI830->PciTag,
commit 8187a5a16f8bd8f0ba5e7f5357f355928b3b8f07
Author: Zhenyu Wang <zhenyu.z.wang@intel.com>
Date: Sat Apr 19 08:54:38 2008 +0800
Check pitch for EXA operation
2D pitch limit applys to all chips. Pre-965 chip has
8KB pitch limit for 3D. 965 supports max pitch by current
exa (128KB).
diff --git a/src/i830.h b/src/i830.h
index 834e4dc..e2c39cc 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -857,6 +857,17 @@ static inline int i830_fb_compression_supported(I830Ptr pI830)
Bool i830_pixmap_tiled(PixmapPtr p);
+#define i830_exa_check_pitch_2d(p) do {\
+ uint32_t pitch = intel_get_pixmap_pitch(p);\
+ if (pitch > KB(32)) return FALSE;\
+} while(0)
+
+/* For pre-965 chip only, as they have 8KB limit for 3D */
+#define i830_exa_check_pitch_3d(p) do {\
+ uint32_t pitch = intel_get_pixmap_pitch(p);\
+ if (pitch > KB(8)) return FALSE;\
+} while(0)
+
/* Batchbuffer compatibility handling */
#define BEGIN_BATCH(n) BEGIN_LP_RING(n)
#define ENSURE_BATCH(n)
diff --git a/src/i830_exa.c b/src/i830_exa.c
index 9b5bb93..2c807c5 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -170,6 +170,8 @@ I830EXAPrepareSolid(PixmapPtr pPixmap, int alu, Pixel planemask, Pixel fg)
if (pPixmap->drawable.bitsPerPixel == 24)
I830FALLBACK("solid 24bpp unsupported!\n");
+ i830_exa_check_pitch_2d(pPixmap);
+
offset = exaGetPixmapOffset(pPixmap);
pitch = exaGetPixmapPitch(pPixmap);
@@ -255,6 +257,9 @@ I830EXAPrepareCopy(PixmapPtr pSrcPixmap, PixmapPtr pDstPixmap, int xdir,
if (!EXA_PM_IS_SOLID(&pSrcPixmap->drawable, planemask))
I830FALLBACK("planemask is not solid");
+ i830_exa_check_pitch_2d(pSrcPixmap);
+ i830_exa_check_pitch_2d(pDstPixmap);
+
pI830->pSrcPixmap = pSrcPixmap;
pI830->BR[13] = I830CopyROP[alu] << 16;
diff --git a/src/i830_render.c b/src/i830_render.c
index 195e9a8..3a959e8 100644
--- a/src/i830_render.c
+++ b/src/i830_render.c
@@ -398,6 +398,11 @@ i830_prepare_composite(int op, PicturePtr pSrcPicture,
Bool is_affine_src, is_affine_mask;
Bool is_nearest = FALSE;
+ i830_exa_check_pitch_3d(pSrc);
+ if (pMask)
+ i830_exa_check_pitch_3d(pMask);
+ i830_exa_check_pitch_3d(pDst);
+
IntelEmitInvarientState(pScrn);
*pI830->last_3d = LAST_3D_RENDER;
diff --git a/src/i915_render.c b/src/i915_render.c
index 2b9ed04..4a02cf5 100644
--- a/src/i915_render.c
+++ b/src/i915_render.c
@@ -323,6 +323,11 @@ i915_prepare_composite(int op, PicturePtr pSrcPicture,
Bool is_affine_src, is_affine_mask;
Bool is_nearest = FALSE;
+ i830_exa_check_pitch_3d(pSrc);
+ if (pMask)
+ i830_exa_check_pitch_3d(pMask);
+ i830_exa_check_pitch_3d(pDst);
+
IntelEmitInvarientState(pScrn);
*pI830->last_3d = LAST_3D_RENDER;
commit bfcc83ad1a3eb7b2acc44223c86fa007cd34a27c
Author: Zhenyu Wang <zhenyu.z.wang@intel.com>
Date: Fri Apr 18 16:48:38 2008 +0800
Revert "Set EXA pitch limit for pre-965 chipset"
This reverts commit 602613e397bdf0cf701a6a7748f9343875864466.
Pre-965 chipset actually have different pitch limit for 2d and 3d
engine. For 2D blit, it's 32KB max. For 3D, it's 8KB max. Don't
limit it to minimal which fallback 2D operations (noteable copy
slow).
diff --git a/src/i830_exa.c b/src/i830_exa.c
index 9e43bf7..9b5bb93 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -510,17 +510,11 @@ I830EXAInit(ScreenPtr pScreen)
pI830->EXADriverPtr->pixmapPitchAlign = 16;
pI830->EXADriverPtr->maxX = 8192;
pI830->EXADriverPtr->maxY = 8192;
- /* maxPitch setting not necessary on 965, as hw support
- * exa max pitch 128KB. */
} else {
pI830->EXADriverPtr->pixmapOffsetAlign = 4;
pI830->EXADriverPtr->pixmapPitchAlign = 16;
pI830->EXADriverPtr->maxX = 2048;
pI830->EXADriverPtr->maxY = 2048;
-#if EXA_VERSION_MINOR >= 3
- pI830->EXADriverPtr->maxPitchPixels = pI830->EXADriverPtr->maxX;
- pI830->EXADriverPtr->maxPitchBytes = KB(8);
-#endif
}
/* Sync */
commit 602613e397bdf0cf701a6a7748f9343875864466
Author: Zhenyu Wang <zhenyu.z.wang@intel.com>
Date: Thu Apr 17 16:55:47 2008 +0800
Set EXA pitch limit for pre-965 chipset
diff --git a/src/i830_exa.c b/src/i830_exa.c
index 9b5bb93..9e43bf7 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -510,11 +510,17 @@ I830EXAInit(ScreenPtr pScreen)
pI830->EXADriverPtr->pixmapPitchAlign = 16;
pI830->EXADriverPtr->maxX = 8192;
pI830->EXADriverPtr->maxY = 8192;
+ /* maxPitch setting not necessary on 965, as hw support
+ * exa max pitch 128KB. */
} else {
pI830->EXADriverPtr->pixmapOffsetAlign = 4;
pI830->EXADriverPtr->pixmapPitchAlign = 16;
pI830->EXADriverPtr->maxX = 2048;
pI830->EXADriverPtr->maxY = 2048;
+#if EXA_VERSION_MINOR >= 3
+ pI830->EXADriverPtr->maxPitchPixels = pI830->EXADriverPtr->maxX;
+ pI830->EXADriverPtr->maxPitchBytes = KB(8);
+#endif
}
/* Sync */
commit 5a1f7351c5bfa9f12cf718036ccc43f66787ce11
Author: Hong Liu <hong.liu@intel.com>
Date: Thu Apr 17 10:57:34 2008 +0800
fix possible segfault in I830FreeScreen
pI830 may point to NULL if I830PreInit fails
(cherry picked from commit 0ae283582d21776d3317d5fc1c25751d50d562c7)
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 155e7a9..41c0578 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -3108,7 +3108,7 @@ I830FreeScreen(int scrnIndex, int flags)
#ifdef INTEL_XVMC
ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
I830Ptr pI830 = I830PTR(pScrn);
- if (pI830->XvMCEnabled)
+ if (pI830 && pI830->XvMCEnabled)
intel_xvmc_finish(xf86Screens[scrnIndex]);
#endif
I830FreeRec(xf86Screens[scrnIndex]);
commit 33ffd781bbca3d0dee8c1b47e7b90be5824b9a4f
Author: Zhenyu Wang <zhenyu.z.wang@intel.com>
Date: Mon Apr 14 16:31:03 2008 +0800
Change default panel fitting mode to origin
i8xx currently only works in FULL mode.
diff --git a/src/i830_lvds.c b/src/i830_lvds.c
index a5004b4..1562c21 100644
--- a/src/i830_lvds.c
+++ b/src/i830_lvds.c
@@ -1366,9 +1366,10 @@ i830_lvds_init(ScrnInfoPtr pScrn)
/*
* Default to filling the whole screen if the mode is less than the
- * native size, without breaking aspect ratio.
+ * native size. (Change default to origin FULL mode, i8xx can only work
+ * in that mode for now.)
*/
- dev_priv->fitting_mode = FULL_ASPECT;
+ dev_priv->fitting_mode = FULL;
return;
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