xserver-xorg-video-intel: Changes to 'debian-experimental'
.gitignore | 1
aclocal.m4 | 2
configure | 21 -
configure.ac | 3
debian/changelog | 31 ++
debian/control | 4
man/intel.man | 84 +++++--
src/ch7xxx/ch7xxx.c | 4
src/common.h | 8
src/i810_dri.c | 28 +-
src/i810_driver.c | 8
src/i810_reg.h | 33 ++
src/i830.h | 62 +++++
src/i830_3d.c | 135 ++++++++++-
src/i830_accel.c | 19 -
src/i830_crt.c | 42 +--
src/i830_debug.c | 11
src/i830_display.c | 21 +
src/i830_dri.c | 33 +-
src/i830_driver.c | 188 ++++++++++-----
src/i830_exa.c | 1
src/i830_i2c.c | 2
src/i830_lvds.c | 529 +++++++++++++++++++++++++++++++++++++++------
src/i830_memory.c | 7
src/i830_quirks.c | 11
src/i830_reg.h | 31 --
src/i830_sdvo.c | 4
src/i830_tv.c | 5
src/i830_video.c | 2
src/ivch/ivch.c | 1
src/scripts/clock-graph.5c | 6
src/scripts/clock.5c | 4
32 files changed, 1032 insertions(+), 309 deletions(-)
New commits:
commit 3237a25fcf1af265a696fa1819735c3a0c0984fe
Author: David Nusinow <dnusinow@debian.org>
Date: Mon Jan 7 22:47:45 2008 -0500
Prepare changelog for upload
diff --git a/debian/changelog b/debian/changelog
index 252c5de..cce6404 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,7 +1,7 @@
-xserver-xorg-video-intel (2:2.2.0+git20080107-1) UNRELEASED; urgency=low
+xserver-xorg-video-intel (2:2.2.0+git20080107-1) experimental; urgency=low
- * New upstream snapshot
- + Clarifies backlight abilities in the manpage. Closes: #451847
+ * New upstream snapshot
+ + Clarifies backlight abilities in the manpage. Closes: #451847
+ Will use a functional backlight on older chips now. Newer chips may
benefit from configured to use something other than the legacy setting
though. Closes: #451848
@@ -9,7 +9,7 @@ xserver-xorg-video-intel (2:2.2.0+git20080107-1) UNRELEASED; urgency=low
+ Xv window hidden for a little while no longer causes segfaults.
Closes: #457587
- -- David Nusinow <dnusinow@debian.org> Mon, 07 Jan 2008 21:21:20 -0500
+ -- David Nusinow <dnusinow@debian.org> Mon, 07 Jan 2008 22:41:51 -0500
xserver-xorg-video-intel (2:2.2.0-2) UNRELEASED; urgency=low
commit cd8ab83c4825814d29d4b9c08c23fcc635ff6981
Author: David Nusinow <dnusinow@debian.org>
Date: Mon Jan 7 21:41:10 2008 -0500
* New upstream snapshot
+ Clarifies backlight abilities in the manpage. Closes: #451847
+ Will use a functional backlight on older chips now. Newer chips may
benefit from configured to use something other than the legacy setting
though. Closes: #451848
+ Fixes exa rendering corruption on some 855GM laptops. Closes: #439210
+ Xv window hidden for a little while no longer causes segfaults.
Closes: #457587
diff --git a/aclocal.m4 b/aclocal.m4
index a128c26..9effba7 100644
--- a/aclocal.m4
+++ b/aclocal.m4
@@ -18,7 +18,7 @@ you should regenerate the build system entirely.], [63])])
# libtool.m4 - Configure libtool for the host system. -*-Autoconf-*-
-# serial 51 Debian 1.5.24-1 AC_PROG_LIBTOOL
+# serial 51 Debian 1.5.24-2 AC_PROG_LIBTOOL
# AC_PROVIDE_IFELSE(MACRO-NAME, IF-PROVIDED, IF-NOT-PROVIDED)
diff --git a/configure b/configure
index 77b3c18..04a8297 100755
--- a/configure
+++ b/configure
@@ -21602,7 +21602,6 @@ echo "${ECHO_T}yes" >&6; }
have_libpciaccess=yes
fi
fi
-have_libpciaccess=no
if test "x$XSERVER_LIBPCIACCESS" = xyes; then
XSERVER_LIBPCIACCESS_TRUE=
XSERVER_LIBPCIACCESS_FALSE='#'
diff --git a/debian/changelog b/debian/changelog
index 1b9217a..252c5de 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,3 +1,16 @@
+xserver-xorg-video-intel (2:2.2.0+git20080107-1) UNRELEASED; urgency=low
+
+ * New upstream snapshot
+ + Clarifies backlight abilities in the manpage. Closes: #451847
+ + Will use a functional backlight on older chips now. Newer chips may
+ benefit from configured to use something other than the legacy setting
+ though. Closes: #451848
+ + Fixes exa rendering corruption on some 855GM laptops. Closes: #439210
+ + Xv window hidden for a little while no longer causes segfaults.
+ Closes: #457587
+
+ -- David Nusinow <dnusinow@debian.org> Mon, 07 Jan 2008 21:21:20 -0500
+
xserver-xorg-video-intel (2:2.2.0-2) UNRELEASED; urgency=low
* Conflict with 915resolution. This driver now handles all of this itself
commit f089942689df622b1af00569eade4883a84eb7a3
Author: Zhenyu Wang <zhenyu.z.wang@intel.com>
Date: Thu Jan 3 11:28:18 2008 +0800
Change origin i965G_1 to chipset market name G35.
diff --git a/src/common.h b/src/common.h
index 40ea038..daab52c 100644
--- a/src/common.h
+++ b/src/common.h
@@ -339,9 +339,9 @@ extern int I810_DEBUG;
#define PCI_CHIP_I945_GME_BRIDGE 0x27AC
#endif
-#ifndef PCI_CHIP_I965_G_1
-#define PCI_CHIP_I965_G_1 0x2982
-#define PCI_CHIP_I965_G_1_BRIDGE 0x2980
+#ifndef PCI_CHIP_G35_G
+#define PCI_CHIP_G35_G 0x2982
+#define PCI_CHIP_G35_G_BRIDGE 0x2980
#endif
#ifndef PCI_CHIP_I965_Q
@@ -416,7 +416,7 @@ extern int I810_DEBUG;
#define IS_I945G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I945_G)
#define IS_I945GM(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I945_GM || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I945_GME)
#define IS_I965GM(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GM || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GME)
-#define IS_I965G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_G_1 || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_Q || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I946_GZ || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GM || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GME)
+#define IS_I965G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_G35_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_Q || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I946_GZ || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GM || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GME)
#define IS_G33CLASS(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_G33_G ||\
DEVICE_ID(pI810->PciInfo) == PCI_CHIP_Q35_G ||\
DEVICE_ID(pI810->PciInfo) == PCI_CHIP_Q33_G)
diff --git a/src/i810_driver.c b/src/i810_driver.c
index a6c13ed..8ae35b6 100644
--- a/src/i810_driver.c
+++ b/src/i810_driver.c
@@ -144,7 +144,7 @@ static const struct pci_id_match intel_device_match[] = {
INTEL_DEVICE_MATCH (PCI_CHIP_I945_GM, 0 ),
INTEL_DEVICE_MATCH (PCI_CHIP_I945_GME, 0 ),
INTEL_DEVICE_MATCH (PCI_CHIP_I965_G, 0 ),
- INTEL_DEVICE_MATCH (PCI_CHIP_I965_G_1, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_G35_G, 0 ),
INTEL_DEVICE_MATCH (PCI_CHIP_I965_Q, 0 ),
INTEL_DEVICE_MATCH (PCI_CHIP_I946_GZ, 0 ),
INTEL_DEVICE_MATCH (PCI_CHIP_I965_GM, 0 ),
@@ -196,7 +196,7 @@ static SymTabRec I810Chipsets[] = {
{PCI_CHIP_I945_GM, "945GM"},
{PCI_CHIP_I945_GME, "945GME"},
{PCI_CHIP_I965_G, "965G"},
- {PCI_CHIP_I965_G_1, "965G"},
+ {PCI_CHIP_G35_G, "G35"},
{PCI_CHIP_I965_Q, "965Q"},
{PCI_CHIP_I946_GZ, "946GZ"},
{PCI_CHIP_I965_GM, "965GM"},
@@ -225,7 +225,7 @@ static PciChipsets I810PciChipsets[] = {
{PCI_CHIP_I945_GM, PCI_CHIP_I945_GM, RES_SHARED_VGA},
{PCI_CHIP_I945_GME, PCI_CHIP_I945_GME, RES_SHARED_VGA},
{PCI_CHIP_I965_G, PCI_CHIP_I965_G, RES_SHARED_VGA},
- {PCI_CHIP_I965_G_1, PCI_CHIP_I965_G_1, RES_SHARED_VGA},
+ {PCI_CHIP_G35_G, PCI_CHIP_G35_G, RES_SHARED_VGA},
{PCI_CHIP_I965_Q, PCI_CHIP_I965_Q, RES_SHARED_VGA},
{PCI_CHIP_I946_GZ, PCI_CHIP_I946_GZ, RES_SHARED_VGA},
{PCI_CHIP_I965_GM, PCI_CHIP_I965_GM, RES_SHARED_VGA},
@@ -788,7 +788,7 @@ I810Probe(DriverPtr drv, int flags)
case PCI_CHIP_I945_GM:
case PCI_CHIP_I945_GME:
case PCI_CHIP_I965_G:
- case PCI_CHIP_I965_G_1:
+ case PCI_CHIP_G35_G:
case PCI_CHIP_I965_Q:
case PCI_CHIP_I946_GZ:
case PCI_CHIP_I965_GM:
diff --git a/src/i830_driver.c b/src/i830_driver.c
index ca4544d..9a59be1 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -236,7 +236,7 @@ static SymTabRec I830Chipsets[] = {
{PCI_CHIP_I945_GM, "945GM"},
{PCI_CHIP_I945_GME, "945GME"},
{PCI_CHIP_I965_G, "965G"},
- {PCI_CHIP_I965_G_1, "965G"},
+ {PCI_CHIP_G35_G, "G35"},
{PCI_CHIP_I965_Q, "965Q"},
{PCI_CHIP_I946_GZ, "946GZ"},
{PCI_CHIP_I965_GM, "965GM"},
@@ -259,7 +259,7 @@ static PciChipsets I830PciChipsets[] = {
{PCI_CHIP_I945_GM, PCI_CHIP_I945_GM, RES_SHARED_VGA},
{PCI_CHIP_I945_GME, PCI_CHIP_I945_GME, RES_SHARED_VGA},
{PCI_CHIP_I965_G, PCI_CHIP_I965_G, RES_SHARED_VGA},
- {PCI_CHIP_I965_G_1, PCI_CHIP_I965_G_1, RES_SHARED_VGA},
+ {PCI_CHIP_G35_G, PCI_CHIP_G35_G, RES_SHARED_VGA},
{PCI_CHIP_I965_Q, PCI_CHIP_I965_Q, RES_SHARED_VGA},
{PCI_CHIP_I946_GZ, PCI_CHIP_I946_GZ, RES_SHARED_VGA},
{PCI_CHIP_I965_GM, PCI_CHIP_I965_GM, RES_SHARED_VGA},
@@ -1237,9 +1237,11 @@ I830PreInit(ScrnInfoPtr pScrn, int flags)
chipname = "945GME";
break;
case PCI_CHIP_I965_G:
- case PCI_CHIP_I965_G_1:
chipname = "965G";
break;
+ case PCI_CHIP_G35_G:
+ chipname = "G35";
+ break;
case PCI_CHIP_I965_Q:
chipname = "965Q";
break;
commit 71143200ed66cb9dcc1f9edf98128be80b05619c
Author: Jesse Barnes <jbarnes@hobbes.virtuousgeek.org>
Date: Fri Jan 4 15:01:25 2008 -0800
Don't modify low bit of BLC_PWM_CTL when using combo backlight control
On some platforms, the low bit of BLC_PWM_CTL is wired as a 'max brightness'
flag, rather than a regular part of the backlight duty cycle. So when in the
combo mode, divide the total number of backlight levels available by two
(tossing one bit) and adjust the programming in the set_brightness routine.
Note that platforms with this behavior may need quirks added so that they work
by default.
diff --git a/src/i830_lvds.c b/src/i830_lvds.c
index c58a7e0..cf0e345 100644
--- a/src/i830_lvds.c
+++ b/src/i830_lvds.c
@@ -234,6 +234,12 @@ i830_lvds_set_backlight_combo(xf86OutputPtr output, int level)
#endif
}
+ /*
+ * Don't set the lowest bit in combo configs since it can act as a flag for
+ * max brightness.
+ */
+ level <<= 1;
+
blc_pwm_ctl = INREG(BLC_PWM_CTL);
blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK;
OUTREG(BLC_PWM_CTL, blc_pwm_ctl | (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
@@ -248,7 +254,17 @@ i830_lvds_get_backlight_combo(xf86OutputPtr output)
blc_pwm_ctl = INREG(BLC_PWM_CTL);
blc_pwm_ctl &= BACKLIGHT_DUTY_CYCLE_MASK;
- return blc_pwm_ctl;
+
+ /* Since we don't use the low bit when using combo, the value is halved */
+
+ return blc_pwm_ctl >> 1;
+}
+
+static int
+i830_lvds_get_backlight_max_combo(xf86OutputPtr output)
+{
+ /* Since we don't set the low bit when using combo, the range is halved */
+ return i830_lvds_get_backlight_max_native(output) >> 1;
}
/*
@@ -661,7 +677,7 @@ i830_lvds_set_backlight_control(xf86OutputPtr output)
dev_priv->set_backlight = i830_lvds_set_backlight_combo;
dev_priv->get_backlight = i830_lvds_get_backlight_combo;
dev_priv->backlight_max =
- i830_lvds_get_backlight_max_native(output);
+ i830_lvds_get_backlight_max_combo(output);
break;
case BCM_KERNEL:
dev_priv->set_backlight = i830_lvds_set_backlight_kernel;
@@ -1003,7 +1019,7 @@ i830_lvds_init(ScrnInfoPtr pScrn)
case BCM_COMBO:
dev_priv->set_backlight = i830_lvds_set_backlight_combo;
dev_priv->get_backlight = i830_lvds_get_backlight_combo;
- dev_priv->backlight_max = i830_lvds_get_backlight_max_native(output);
+ dev_priv->backlight_max = i830_lvds_get_backlight_max_combo(output);
break;
case BCM_KERNEL:
dev_priv->set_backlight = i830_lvds_set_backlight_kernel;
commit b434bf4029d1a405216454629bcea717c779ae5a
Author: hulifox008 <hulifox008@163.com>
Date: Fri Jan 4 02:46:54 2008 -0800
Fix copy'n'paste-o in unused airlied i2c code.
diff --git a/src/i830_i2c.c b/src/i830_i2c.c
index da8f38e..d80229d 100644
--- a/src/i830_i2c.c
+++ b/src/i830_i2c.c
@@ -88,7 +88,7 @@ static void i830_getscl(I2CBusPtr b, int *state)
OUTREG(b->DriverPrivate.uval, GPIO_CLOCK_DIR_IN | GPIO_CLOCK_DIR_MASK);
OUTREG(b->DriverPrivate.uval, 0);
val = INREG(b->DriverPrivate.uval);
- *state = ((val & GPIO_DATA_VAL_IN) != 0);
+ *state = ((val & GPIO_CLOCK_VAL_IN) != 0);
}
static int i830_getsda(I2CBusPtr b)
commit f2ffc0f6e038357dda268363e52c11ada1d0b810
Author: Jesse Barnes <jbarnes@hobbes.virtuousgeek.org>
Date: Thu Jan 3 11:16:15 2008 -0800
Fix compilation error when not using DRI
This patch complements 88f8b688e2316ae4a1f7485f0010ce90de54783a which
added uint64_t typed variables to avoid unsigned long overflows in
32-bit architectures but didn't include <stdint.h> with the required
definition.
When XF86DRI and _XF86DRI_SERVER_ are defined this header gets
indirectly included through "i830_dri.h", thanks to "i830_common.h"
which masquerades this problem as released in 2.1.0 and that manifests
with :
In file included from i810_driver.c:88:
i830.h:137: error: expected specifier-qualifier-list before 'uint64_t'
i830.h:240: error: expected specifier-qualifier-list before 'uint64_t'
Patch from Carlo Marcelo Arenas Belon <carenas@sajinet.com.pe>
diff --git a/src/i830.h b/src/i830.h
index fe4d6c5..dcb87cc 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -40,6 +40,8 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define I830DEBUG
#endif
+#include <stdint.h>
+
#ifndef REMAP_RESERVED
#define REMAP_RESERVED 0
#endif
commit 83d304c61ad5fdc58b0a9309dbd1e5a3f6cd9b01
Author: Nanhai Zou <nanhai.zou@intel.com>
Date: Wed Jan 2 10:50:44 2008 +0800
TV: fix 576p refresh rate
diff --git a/src/i830_tv.c b/src/i830_tv.c
index 14f4089..9add367 100644
--- a/src/i830_tv.c
+++ b/src/i830_tv.c
@@ -580,7 +580,7 @@ const static tv_mode_t tv_modes[] = {
{
.name = "576p",
.clock = 107520,
- .refresh = 59.94,
+ .refresh = 50.0,
.oversample = TV_OVERSAMPLE_4X,
.component_only = 1,
commit 96246c27cb836bae8ee02c46c68a1f2102efd14b
Author: Joakim <elupus@ecce.se>
Date: Thu Dec 27 17:09:02 2007 +0800
Aopen Minipc 965GM LVDS quirk
diff --git a/src/i830_quirks.c b/src/i830_quirks.c
index 87d9a8a..323962c 100644
--- a/src/i830_quirks.c
+++ b/src/i830_quirks.c
@@ -58,28 +58,29 @@ static void quirk_mac_mini (I830Ptr pI830)
static i830_quirk i830_quirk_list[] = {
/* Aopen mini pc */
{ PCI_CHIP_I945_GM, 0xa0a0, SUBSYS_ANY, quirk_ignore_lvds },
+ { PCI_CHIP_I965_GM, 0xa0a0, SUBSYS_ANY, quirk_ignore_lvds },
{ PCI_CHIP_I965_GM, 0x8086, 0x1999, quirk_ignore_lvds },
/* Apple Mac mini has no lvds, but macbook pro does */
{ PCI_CHIP_I945_GM, 0x8086, 0x7270, quirk_mac_mini },
-
+
/* Dell Latitude X1 */
{ PCI_CHIP_I915_GM, 0x1028, 0x01a3, quirk_ignore_tv },
/* Dell XPS 1330 */
{ PCI_CHIP_I965_GM, 0x1028, 0x0209, quirk_ignore_tv },
-
+
/* Lenovo X60s has no TV output */
{ PCI_CHIP_I945_GM, 0x17aa, 0x201a, quirk_ignore_tv },
/* Lenovo T61 has no TV output */
{ PCI_CHIP_I965_GM, 0x17aa, 0x20b5, quirk_ignore_tv },
/* Lenovo 3000 v200 */
{ PCI_CHIP_I965_GM, 0x17aa, 0x3c18, quirk_ignore_tv },
-
+
/* Panasonic Toughbook CF-Y4 has no TV output */
{ PCI_CHIP_I915_GM, 0x10f7, 0x8338, quirk_ignore_tv },
/* Panasonic Toughbook CF-Y7 has no TV output */
{ PCI_CHIP_I965_GM, 0x10f7, 0x8338, quirk_ignore_tv },
-
+
/* Toshiba Satellite U300 has no TV output */
{ PCI_CHIP_I965_GM, 0x1179, 0xff50, quirk_ignore_tv },
commit f69b48fe24ef94dac44b8123884ca71df675be4b
Author: Jesse Barnes <jbarnes@hobbes.virtuousgeek.org>
Date: Tue Dec 18 18:10:33 2007 -0800
Unconditionally restore pipe configuration
This is a partial fix for #13196, which covers both leaving pipes disabled at
server exit time and problems with restoring the pipe configuration on certain
chipsets. It restores the pipe configuration unconditionally (previously we
made sure the PLL was running and we weren't in VGA mode) but also adds some
additional PLL settle time to the PLL register write paths.
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 7818ee4..ca4544d 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -1991,6 +1991,13 @@ SaveHWState(ScrnInfoPtr pScrn)
return TRUE;
}
+/* Wait for the PLL to settle down after programming */
+static void
+i830_dpll_settle(void)
+{
+ usleep(10000); /* 10 ms *should* be plenty */
+}
+
static Bool
RestoreHWState(ScrnInfoPtr pScrn)
{
@@ -2025,6 +2032,23 @@ RestoreHWState(ScrnInfoPtr pScrn)
if (!IS_I830(pI830) && !IS_845G(pI830))
OUTREG(PFIT_CONTROL, pI830->savePFIT_CONTROL);
+ /*
+ * Pipe regs
+ * To restore the saved state, we first need to program the PLL regs,
+ * followed by the pipe configuration and finally the display plane
+ * configuration. The VGA registers can program one, both or neither
+ * of the PLL regs, depending on their VGA_MOD_DIS bit value.
+ */
+
+ /*
+ * Since either or both pipes may use the VGA clocks, make sure the
+ * regs are valid.
+ */
+ OUTREG(VCLK_DIVISOR_VGA0, pI830->saveVCLK_DIVISOR_VGA0);
+ OUTREG(VCLK_DIVISOR_VGA1, pI830->saveVCLK_DIVISOR_VGA1);
+ OUTREG(VCLK_POST_DIV, pI830->saveVCLK_POST_DIV);
+
+ /* If the pipe A PLL is active, we can restore the pipe & plane config */
if (pI830->saveDPLL_A & DPLL_VCO_ENABLE)
{
OUTREG(DPLL_A, pI830->saveDPLL_A & ~DPLL_VCO_ENABLE);
@@ -2033,13 +2057,14 @@ RestoreHWState(ScrnInfoPtr pScrn)
OUTREG(FPA0, pI830->saveFPA0);
OUTREG(FPA1, pI830->saveFPA1);
OUTREG(DPLL_A, pI830->saveDPLL_A);
- usleep(150);
+ i830_dpll_settle();
if (IS_I965G(pI830))
OUTREG(DPLL_A_MD, pI830->saveDPLL_A_MD);
else
OUTREG(DPLL_A, pI830->saveDPLL_A);
- usleep(150);
+ i830_dpll_settle();
+ /* Restore mode config */
OUTREG(HTOTAL_A, pI830->saveHTOTAL_A);
OUTREG(HBLANK_A, pI830->saveHBLANK_A);
OUTREG(HSYNC_A, pI830->saveHSYNC_A);
@@ -2058,20 +2083,31 @@ RestoreHWState(ScrnInfoPtr pScrn)
OUTREG(DSPASURF, pI830->saveDSPASURF);
OUTREG(DSPATILEOFF, pI830->saveDSPATILEOFF);
}
+
+ OUTREG(PIPEACONF, pI830->savePIPEACONF);
+ i830WaitForVblank(pScrn);
+
/*
- * Make sure the DPLL is active and not in VGA mode or the
- * write of PIPEnCONF may cause a crash
+ * Program Pipe A's plane
+ * The corresponding display plane may be disabled, and should only be
+ * enabled if pipe A is actually on (otherwise we have a bug in the initial
+ * state).
*/
- if ((pI830->saveDPLL_A & DPLL_VCO_ENABLE) &&
- (pI830->saveDPLL_A & DPLL_VGA_MODE_DIS))
- OUTREG(PIPEACONF, pI830->savePIPEACONF);
- i830WaitForVblank(pScrn);
- OUTREG(DSPACNTR, pI830->saveDSPACNTR);
- OUTREG(DSPABASE, INREG(DSPABASE));
- i830WaitForVblank(pScrn);
-
+ if (pI830->saveDSPACNTR & DISPPLANE_SEL_PIPE_A) {
+ OUTREG(DSPACNTR, pI830->saveDSPACNTR);
+ OUTREG(DSPABASE, INREG(DSPABASE));
+ i830WaitForVblank(pScrn);
+ }
+ if (pI830->saveDSPBCNTR & DISPPLANE_SEL_PIPE_A) {
+ OUTREG(DSPBCNTR, pI830->saveDSPBCNTR);
+ OUTREG(DSPBBASE, INREG(DSPBBASE));
+ i830WaitForVblank(pScrn);
+ }
+
+ /* See note about pipe programming above */
if(xf86_config->num_crtc == 2)
{
+ /* If the pipe B PLL is active, we can restore the pipe & plane config */
if (pI830->saveDPLL_B & DPLL_VCO_ENABLE)
{
OUTREG(DPLL_B, pI830->saveDPLL_B & ~DPLL_VCO_ENABLE);
@@ -2080,13 +2116,14 @@ RestoreHWState(ScrnInfoPtr pScrn)
OUTREG(FPB0, pI830->saveFPB0);
OUTREG(FPB1, pI830->saveFPB1);
OUTREG(DPLL_B, pI830->saveDPLL_B);
- usleep(150);
+ i830_dpll_settle();
if (IS_I965G(pI830))
OUTREG(DPLL_B_MD, pI830->saveDPLL_B_MD);
else
OUTREG(DPLL_B, pI830->saveDPLL_B);
- usleep(150);
+ i830_dpll_settle();
+ /* Restore mode config */
OUTREG(HTOTAL_B, pI830->saveHTOTAL_B);
OUTREG(HBLANK_B, pI830->saveHBLANK_B);
OUTREG(HSYNC_B, pI830->saveHSYNC_B);
@@ -2105,18 +2142,28 @@ RestoreHWState(ScrnInfoPtr pScrn)
OUTREG(DSPBTILEOFF, pI830->saveDSPBTILEOFF);
}
+ OUTREG(PIPEBCONF, pI830->savePIPEBCONF);
+ i830WaitForVblank(pScrn);
+
/*
- * See PIPEnCONF note above
+ * Program Pipe B's plane
+ * Note that pipe B may be disabled, and in that case, the plane
+ * should also be disabled or we must have had a bad initial state.
*/
- if ((pI830->saveDPLL_B & DPLL_VCO_ENABLE) &&
- (pI830->saveDPLL_B & DPLL_VGA_MODE_DIS))
- OUTREG(PIPEBCONF, pI830->savePIPEBCONF);
- i830WaitForVblank(pScrn);
- OUTREG(DSPBCNTR, pI830->saveDSPBCNTR);
- OUTREG(DSPBBASE, INREG(DSPBBASE));
- i830WaitForVblank(pScrn);
+ if (pI830->saveDSPACNTR & DISPPLANE_SEL_PIPE_B) {
+ OUTREG(DSPACNTR, pI830->saveDSPACNTR);
+ OUTREG(DSPABASE, INREG(DSPABASE));
+ i830WaitForVblank(pScrn);
+ }
+ if (pI830->saveDSPBCNTR & DISPPLANE_SEL_PIPE_B) {
+ OUTREG(DSPBCNTR, pI830->saveDSPBCNTR);
+ OUTREG(DSPBBASE, INREG(DSPBBASE));
+ i830WaitForVblank(pScrn);
+ }
}
+ OUTREG(VGACNTRL, pI830->saveVGACNTRL);
+
/* Restore outputs */
for (i = 0; i < xf86_config->num_output; i++) {
xf86OutputPtr output = xf86_config->output[i];
@@ -2124,12 +2171,6 @@ RestoreHWState(ScrnInfoPtr pScrn)
output->funcs->restore(output);
}
- OUTREG(VGACNTRL, pI830->saveVGACNTRL);
-
- OUTREG(VCLK_DIVISOR_VGA0, pI830->saveVCLK_DIVISOR_VGA0);
- OUTREG(VCLK_DIVISOR_VGA1, pI830->saveVCLK_DIVISOR_VGA1);
- OUTREG(VCLK_POST_DIV, pI830->saveVCLK_POST_DIV);
-
i830_restore_palette(pI830, PIPE_A);
i830_restore_palette(pI830, PIPE_B);
commit 4757a218d733af12d04674455fc6e1fad48a1cd0
Author: Michel Dänzer <michel@tungstengraphics.com>
Date: Tue Dec 18 19:37:46 2007 +0100
Always set pPriv->buf to NULL after freeing the memory it pointed to.
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=13108 .
diff --git a/src/i830_video.c b/src/i830_video.c
index 5325bbd..9688aaa 100644
--- a/src/i830_video.c
+++ b/src/i830_video.c
@@ -2574,6 +2574,7 @@ I830VideoBlockHandler(int i, pointer blockData, pointer pTimeout,
*/
I830Sync(pScrn);
i830_free_memory(pScrn, pPriv->buf);
+ pPriv->buf = NULL;
pPriv->videoStatus = 0;
}
}
@@ -2686,6 +2687,7 @@ I830FreeSurface(XF86SurfacePtr surface)
/* Sync before freeing the buffer, because the pages will be unbound. */
I830Sync(pScrn);
i830_free_memory(surface->pScrn, pPriv->buf);
+ pPriv->buf = NULL;
xfree(surface->pitches);
xfree(surface->offsets);
xfree(surface->devPrivate.ptr);
commit 5cbb4110116f6d4187fd27660a78203caa1da46b
Author: Adam Jackson <ajax@redhat.com>
Date: Thu Dec 13 15:10:43 2007 -0500
i830_sdvo_mode_valid: Fix return values to match what we actually check.
diff --git a/src/i830_sdvo.c b/src/i830_sdvo.c
index 2767715..6b7037e 100644
--- a/src/i830_sdvo.c
+++ b/src/i830_sdvo.c
@@ -900,10 +900,10 @@ i830_sdvo_mode_valid(xf86OutputPtr output, DisplayModePtr pMode)
return MODE_NO_DBLESCAN;
if (dev_priv->pixel_clock_min > pMode->Clock)
- return MODE_CLOCK_HIGH;
+ return MODE_CLOCK_LOW;
if (dev_priv->pixel_clock_max < pMode->Clock)
- return MODE_CLOCK_LOW;
+ return MODE_CLOCK_HIGH;
return MODE_OK;
}
commit e03bc385e924222d3d5f3c9a8d65e1ef63b858dc
Author: Jesse Barnes <jbarnes@hobbes.virtuousgeek.org>
Date: Tue Dec 11 13:28:01 2007 -0800
Add cscope files to .gitignore
diff --git a/.gitignore b/.gitignore
index 410a074..998021b 100644
--- a/.gitignore
+++ b/.gitignore
@@ -25,3 +25,4 @@ missing
stamp-h1
i810.4
intel.4
+cscope.*
commit e720ae4476c3f986f623ce0f0ab9775b8b9b7e05
Author: Jesse Barnes <jbarnes@jbarnes-mobile.amr.corp.intel.com>
Date: Mon Dec 10 13:00:14 2007 -0800
CRT hotplug detection improvements
Patch from Hong Liu.
Fixup CRT detection by making sure the pipe is enabled before CRT
detection actually occurs. Fixes bugs Hong was seeing on G35 and other
machines.
diff --git a/src/i830_crt.c b/src/i830_crt.c
index d7762a0..cd71dc5 100644
--- a/src/i830_crt.c
+++ b/src/i830_crt.c
@@ -349,34 +349,38 @@ i830_crt_detect(xf86OutputPtr output)
I830Ptr pI830 = I830PTR(pScrn);
xf86CrtcPtr crtc;
int dpms_mode;
-
+ xf86OutputStatus status;
+ Bool connected;
+
+ crtc = i830GetLoadDetectPipe (output, NULL, &dpms_mode);
+ if (!crtc)
+ return XF86OutputStatusUnknown;
+
if (IS_I945G(pI830) || IS_I945GM(pI830) || IS_I965G(pI830) ||
IS_G33CLASS(pI830)) {
if (i830_crt_detect_hotplug(output))
- return XF86OutputStatusConnected;
+ status = XF86OutputStatusConnected;
else
- return XF86OutputStatusDisconnected;
+ status = XF86OutputStatusDisconnected;
+
+ goto out;
}
- if (i830_crt_detect_ddc(output))
- return XF86OutputStatusConnected;
+ if (i830_crt_detect_ddc(output)) {
+ status = XF86OutputStatusConnected;
+ goto out;
+ }
/* Use the load-detect method if we have no other way of telling. */
- crtc = i830GetLoadDetectPipe (output, NULL, &dpms_mode);
-
- if (crtc)
- {
- Bool connected;
-
- connected = i830_crt_detect_load (crtc, output);
- i830ReleaseLoadDetectPipe (output, dpms_mode);
- if (connected)
- return XF86OutputStatusConnected;
- else
- return XF86OutputStatusDisconnected;
- }
+ connected = i830_crt_detect_load (crtc, output);
+ if (connected)
+ status = XF86OutputStatusConnected;
+ else
+ status = XF86OutputStatusDisconnected;
- return XF86OutputStatusUnknown;
+out:
+ i830ReleaseLoadDetectPipe (output, dpms_mode);
+ return status;
}
static void
commit d9df93578b74785c08ba860b4c9aa23b0c89c91c
Author: Dave Airlie <airlied@linux.ie>
Date: Mon Dec 10 16:41:24 2007 +1000
ivch: fails on address mismatch as I seem to get this on my 865 system
diff --git a/src/ivch/ivch.c b/src/ivch/ivch.c
index ac57ff3..eb5dc21 100644
--- a/src/ivch/ivch.c
+++ b/src/ivch/ivch.c
@@ -188,6 +188,7 @@ ivch_init(I2CBusPtr b, I2CSlaveAddr addr)
"ivch detect failed due to address mismatch "
"(%d vs %d)\n",
(temp & VR00_BASE_ADDRESS_MASK), priv->d.SlaveAddr >> 1);
+ goto out;
}
if (!xf86I2CDevInit(&priv->d)) {
commit cd6f83519c69f72f146fea59afbd6a3542da783a
Author: Zhenyu Wang <zhenyu.z.wang@intel.com>
Date: Mon Dec 10 05:49:58 2007 +0800
Fix tv quirk for Dell Latitude X1
which is actually 915GM, reported by
Andreas Schildbach <andreas@schildbach.de>
diff --git a/src/i830_quirks.c b/src/i830_quirks.c
index 1ed6503..87d9a8a 100644
--- a/src/i830_quirks.c
+++ b/src/i830_quirks.c
@@ -64,7 +64,7 @@ static i830_quirk i830_quirk_list[] = {
{ PCI_CHIP_I945_GM, 0x8086, 0x7270, quirk_mac_mini },
/* Dell Latitude X1 */
- { PCI_CHIP_I945_GM, 0x1028, 0x01a3, quirk_ignore_tv },
+ { PCI_CHIP_I915_GM, 0x1028, 0x01a3, quirk_ignore_tv },
/* Dell XPS 1330 */
{ PCI_CHIP_I965_GM, 0x1028, 0x0209, quirk_ignore_tv },
commit 13ec9c8141a9f794258869a04a6bab59dac5eefa
Author: Zhenyu Wang <zhenyu.z.wang@intel.com>
Date: Sun Dec 9 00:52:13 2007 +0800
exa: fix rendering issue on some 855GM laptops
This trys to initialize more 3d states on i830 like mesa
code, which fixes exa rendering failure for some 855GM users.
diff --git a/src/i830_3d.c b/src/i830_3d.c
index 563dcef..45e02c4 100644
--- a/src/i830_3d.c
+++ b/src/i830_3d.c
@@ -38,7 +38,7 @@ void I830EmitInvarientState( ScrnInfoPtr pScrn )
{
I830Ptr pI830 = I830PTR(pScrn);
- BEGIN_LP_RING(40);
+ BEGIN_LP_RING(58);
OUT_RING(_3DSTATE_MAP_CUBE | MAP_UNIT(0));
OUT_RING(_3DSTATE_MAP_CUBE | MAP_UNIT(1));
@@ -62,7 +62,6 @@ void I830EmitInvarientState( ScrnInfoPtr pScrn )
OUT_RING(0);
OUT_RING(0);
-
OUT_RING(_3DSTATE_MAP_TEX_STREAM_CMD |
MAP_UNIT(0) |
DISABLE_TEX_STREAM_BUMP |
@@ -97,12 +96,6 @@ void I830EmitInvarientState( ScrnInfoPtr pScrn )
OUT_RING(_3DSTATE_MAP_COORD_TRANSFORM);
OUT_RING(DISABLE_TEX_TRANSFORM | TEXTURE_SET(3));
- OUT_RING(_3DSTATE_MAP_COORD_SETBIND_CMD);
- OUT_RING(TEXBIND_SET3(TEXCOORDSRC_VTXSET_3) |
- TEXBIND_SET2(TEXCOORDSRC_VTXSET_2) |
- TEXBIND_SET1(TEXCOORDSRC_VTXSET_1) |
- TEXBIND_SET0(TEXCOORDSRC_VTXSET_0));
-
OUT_RING(_3DSTATE_RASTER_RULES_CMD |
ENABLE_POINT_RASTER_RULE |
OGL_POINT_RASTER_RULE |
@@ -127,9 +120,133 @@ void I830EmitInvarientState( ScrnInfoPtr pScrn )
OUT_RING(MAGIC_W_STATE_DWORD1);
OUT_RING(0x3f800000 /* 1.0 in IEEE float */ );
-
OUT_RING(_3DSTATE_COLOR_FACTOR_CMD);
OUT_RING(0x80808080); /* .5 required in alpha for GL_DOT3_RGBA_EXT */
+ OUT_RING(_3DSTATE_MAP_COORD_SETBIND_CMD);
+ OUT_RING(TEXBIND_SET3(TEXCOORDSRC_VTXSET_3) |
+ TEXBIND_SET2(TEXCOORDSRC_VTXSET_2) |
+ TEXBIND_SET1(TEXCOORDSRC_VTXSET_1) |
+ TEXBIND_SET0(TEXCOORDSRC_VTXSET_0));
+
+ /* copy from mesa */
+ OUT_RING(_3DSTATE_INDPT_ALPHA_BLEND_CMD |
+ DISABLE_INDPT_ALPHA_BLEND |
+ ENABLE_ALPHA_BLENDFUNC |
+ ABLENDFUNC_ADD);
+
+ OUT_RING(_3DSTATE_FOG_COLOR_CMD |
+ FOG_COLOR_RED(0) |
+ FOG_COLOR_GREEN(0) |
+ FOG_COLOR_BLUE(0));
+
+ OUT_RING(_3DSTATE_CONST_BLEND_COLOR_CMD);
+ OUT_RING(0);
+
+ OUT_RING(_3DSTATE_MODES_1_CMD |
+ ENABLE_COLR_BLND_FUNC |
+ BLENDFUNC_ADD |
+ ENABLE_SRC_BLND_FACTOR |
+ SRC_BLND_FACT(BLENDFACTOR_ONE) |
+ ENABLE_DST_BLND_FACTOR |
+ DST_BLND_FACT(BLENDFACTOR_ZERO));
+ OUT_RING(_3DSTATE_MODES_2_CMD |
+ ENABLE_GLOBAL_DEPTH_BIAS |
+ GLOBAL_DEPTH_BIAS(0) |
+ ENABLE_ALPHA_TEST_FUNC|
+ ALPHA_TEST_FUNC(0) | /* always */
+ ALPHA_REF_VALUE(0));
+ OUT_RING(_3DSTATE_MODES_3_CMD |
+ ENABLE_DEPTH_TEST_FUNC |
+ DEPTH_TEST_FUNC(0x2) | /* COMPAREFUNC_LESS */
+ ENABLE_ALPHA_SHADE_MODE |
+ ALPHA_SHADE_MODE(SHADE_MODE_LINEAR)
+ | ENABLE_FOG_SHADE_MODE |
+ FOG_SHADE_MODE(SHADE_MODE_LINEAR) |
+ ENABLE_SPEC_SHADE_MODE |
+ SPEC_SHADE_MODE(SHADE_MODE_LINEAR) |
+ ENABLE_COLOR_SHADE_MODE |
+ COLOR_SHADE_MODE(SHADE_MODE_LINEAR)
+ | ENABLE_CULL_MODE | CULLMODE_NONE);
+
+ OUT_RING(_3DSTATE_MODES_4_CMD |
+ ENABLE_LOGIC_OP_FUNC |
+ LOGIC_OP_FUNC(LOGICOP_COPY) |
+ ENABLE_STENCIL_TEST_MASK |
+ STENCIL_TEST_MASK(0xff) |
+ ENABLE_STENCIL_WRITE_MASK |
+ STENCIL_WRITE_MASK(0xff));
+
+ OUT_RING(_3DSTATE_STENCIL_TEST_CMD |
+ ENABLE_STENCIL_PARMS |
+ STENCIL_FAIL_OP(0) | /* STENCILOP_KEEP */
+ STENCIL_PASS_DEPTH_FAIL_OP(0) | /* STENCILOP_KEEP */
+ STENCIL_PASS_DEPTH_PASS_OP(0) | /* STENCILOP_KEEP */
+ ENABLE_STENCIL_TEST_FUNC |
+ STENCIL_TEST_FUNC(0) | /* COMPAREFUNC_ALWAYS */
+ ENABLE_STENCIL_REF_VALUE |
+ STENCIL_REF_VALUE(0));
+
+ OUT_RING(_3DSTATE_MODES_5_CMD |
+ FLUSH_TEXTURE_CACHE |
+ ENABLE_SPRITE_POINT_TEX |
+ SPRITE_POINT_TEX_OFF |
+ ENABLE_FIXED_LINE_WIDTH |
+ FIXED_LINE_WIDTH(0x2) | /* 1.0 */
+ ENABLE_FIXED_POINT_WIDTH |
+ FIXED_POINT_WIDTH(1));
+
+ OUT_RING(_3DSTATE_ENABLES_1_CMD |
+ DISABLE_LOGIC_OP |
+ DISABLE_STENCIL_TEST |
+ DISABLE_DEPTH_BIAS |
+ DISABLE_SPEC_ADD |
+ DISABLE_FOG |
+ DISABLE_ALPHA_TEST |
+ ENABLE_COLOR_BLEND |
+ DISABLE_DEPTH_TEST);
+ OUT_RING(_3DSTATE_ENABLES_2_CMD |
+ DISABLE_STENCIL_WRITE |
+ ENABLE_TEX_CACHE |
+ DISABLE_DITHER |
+ ENABLE_COLOR_MASK |
+ ENABLE_COLOR_WRITE |
+ DISABLE_DEPTH_WRITE);
+
+ OUT_RING(_3DSTATE_STIPPLE);
+
+ /* Set default blend state */
+ OUT_RING(_3DSTATE_MAP_BLEND_OP_CMD(0) |
+ TEXPIPE_COLOR |
+ ENABLE_TEXOUTPUT_WRT_SEL |
+ TEXOP_OUTPUT_CURRENT |
+ DISABLE_TEX_CNTRL_STAGE |
+ TEXOP_SCALE_1X |
+ TEXOP_MODIFY_PARMS |
+ TEXOP_LAST_STAGE | TEXBLENDOP_ARG1);
+ OUT_RING(_3DSTATE_MAP_BLEND_OP_CMD(0) |
+ TEXPIPE_ALPHA |
+ ENABLE_TEXOUTPUT_WRT_SEL |
+ TEXOP_OUTPUT_CURRENT |
+ TEXOP_SCALE_1X |
+ TEXOP_MODIFY_PARMS | TEXBLENDOP_ARG1);
+ OUT_RING(_3DSTATE_MAP_BLEND_ARG_CMD(0) |
+ TEXPIPE_COLOR |
+ TEXBLEND_ARG1 |
+ TEXBLENDARG_MODIFY_PARMS |
+ TEXBLENDARG_DIFFUSE);
+ OUT_RING(_3DSTATE_MAP_BLEND_ARG_CMD(0) |
+ TEXPIPE_ALPHA |
+ TEXBLEND_ARG1 |
+ TEXBLENDARG_MODIFY_PARMS |
+ TEXBLENDARG_DIFFUSE);
+
+ OUT_RING(_3DSTATE_AA_CMD |
+ AA_LINE_ECAAR_WIDTH_ENABLE |
+ AA_LINE_ECAAR_WIDTH_1_0 |
+ AA_LINE_REGION_WIDTH_ENABLE |
+ AA_LINE_REGION_WIDTH_1_0 |
+ AA_LINE_DISABLE);
+
ADVANCE_LP_RING();
}
commit e2d9fd6425584119f28768d85c4b7d106ecf8742
Author: Jesse Barnes <jbarnes@hobbes.virtuousgeek.org>
Date: Fri Dec 7 16:30:46 2007 -0800
Describe output properties in more detail
Add descriptions for LVDS and TV output properties and also mention the EDID
property a new output configuration section.
diff --git a/man/intel.man b/man/intel.man
index 6245736..d46e3f9 100644
--- a/man/intel.man
+++ b/man/intel.man
@@ -176,31 +176,77 @@ Default: "EXA".
Enable printing of additional debugging information about modesetting to
the server log.
+.SH OUTPUT CONFIGURATION
+On 830M and better chipsets, the driver supports runtime configuration of
+detected outputs. You can use the
+.B xrandr
+tool to control outputs on the command line. Each output listed below may have
+one or more properties associated with it (like a binary EDID block if one is
+found). Some outputs have unique properties which are described below.
+
+.SS "VGA"
+VGA output port (typically exposed via an HD15 connector).
+
+.SS "LVDS"
+Low Voltage Differential Signalling output (typically a laptop LCD panel). Available properties:
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