xserver-xorg-video-intel: Changes to 'upstream-experimental'
configure.ac | 7 +-
src/common.h | 22 ++++++-
src/i810_driver.c | 9 ++
src/i810_reg.h | 46 +++++++++++++--
src/i830.h | 4 -
src/i830_common.h | 6 +
src/i830_crt.c | 3
src/i830_debug.c | 5 -
src/i830_display.c | 20 ++++--
src/i830_dri.c | 24 +++++++
src/i830_driver.c | 80 ++++++++++++++++++++------
src/i830_dvo.c | 1
src/i830_exa.c | 18 -----
src/i830_lvds.c | 52 ++++++++++++-----
src/i830_memory.c | 32 +++++++++-
src/i830_render.c | 3
src/i830_sdvo.c | 18 ++++-
src/i830_video.c | 28 ++++++---
src/i830_xaa.c | 2
src/i915_reg.h | 11 ++-
src/i915_render.c | 3
src/i915_video.c | 160 ++++++++++++++++++++---------------------------------
src/i965_render.c | 3
src/i965_video.c | 16 -----
24 files changed, 370 insertions(+), 203 deletions(-)
New commits:
commit a67c2965385001bcb8987265f698ff0f5809cd11
Author: Keith Packard <keithp@neko.keithp.com>
Date: Thu Jun 21 23:59:38 2007 +0100
Follow BIOS configuration for Legacy Backlight Brightness.
The backlight control in the LVDS controller can either operate in 'normal'
mode or 'legacy' mode. In legacy mode, it uses the PCI config space register
0xf4 which can range from 0 to 0xff. In normal mode, it reads the range and
current value from the BLC_PWM_CTL register.
diff --git a/src/i810_reg.h b/src/i810_reg.h
index 6001297..248df04 100644
--- a/src/i810_reg.h
+++ b/src/i810_reg.h
@@ -1056,6 +1056,14 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define RENCLK_GATE_D2 0x6208
#define RAMCLK_GATE_D 0x6210 /* CRL only */
+/*
+ * This is a PCI config space register to manipulate backlight brightness
+ * It is used when the BLM_LEGACY_MODE is turned on. When enabled, the first
+ * byte of this config register sets brightness within the range from
+ * 0 to 0xff
+ */
+#define LEGACY_BACKLIGHT_BRIGHTNESS 0xf4
+
#define BLC_PWM_CTL 0x61254
#define BACKLIGHT_MODULATION_FREQ_SHIFT (17)
/**
diff --git a/src/i830_lvds.c b/src/i830_lvds.c
index ee278aa..d469815 100644
--- a/src/i830_lvds.c
+++ b/src/i830_lvds.c
@@ -59,8 +59,18 @@ i830_lvds_set_backlight(xf86OutputPtr output, int level)
I830Ptr pI830 = I830PTR(pScrn);
CARD32 blc_pwm_ctl;
- blc_pwm_ctl = INREG(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
- OUTREG(BLC_PWM_CTL, blc_pwm_ctl | (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
+ blc_pwm_ctl = INREG(BLC_PWM_CTL);
+ if (blc_pwm_ctl & BLM_LEGACY_MODE)
+ {
+ pciWriteByte (pI830->PciTag,
+ LEGACY_BACKLIGHT_BRIGHTNESS,
+ level & 0xff);
+ }
+ else
+ {
+ blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK;
+ OUTREG(BLC_PWM_CTL, blc_pwm_ctl | (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
+ }
}
/**
@@ -71,9 +81,13 @@ i830_lvds_get_max_backlight(xf86OutputPtr output)
{
ScrnInfoPtr pScrn = output->scrn;
I830Ptr pI830 = I830PTR(pScrn);
+ CARD32 pwm_ctl = INREG(BLC_PWM_CTL);
- return ((INREG(BLC_PWM_CTL) & BACKLIGHT_MODULATION_FREQ_MASK) >>
- BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
+ if (pwm_ctl & BLM_LEGACY_MODE)
+ return 0xff;
+ else
+ return ((pwm_ctl & BACKLIGHT_MODULATION_FREQ_MASK) >>
+ BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
}
/**
@@ -129,8 +143,16 @@ i830_lvds_save (xf86OutputPtr output)
pI830->savePP_CONTROL = INREG(PP_CONTROL);
pI830->savePP_CYCLE = INREG(PP_CYCLE);
pI830->saveBLC_PWM_CTL = INREG(BLC_PWM_CTL);
- dev_priv->backlight_duty_cycle = (pI830->saveBLC_PWM_CTL &
- BACKLIGHT_DUTY_CYCLE_MASK);
+ if (pI830->saveBLC_PWM_CTL & BLM_LEGACY_MODE)
+ {
+ dev_priv->backlight_duty_cycle = pciReadByte (pI830->PciTag,
+ LEGACY_BACKLIGHT_BRIGHTNESS);
+ }
+ else
+ {
+ dev_priv->backlight_duty_cycle = (pI830->saveBLC_PWM_CTL &
+ BACKLIGHT_DUTY_CYCLE_MASK);
+ }
/*
* If the light is off at server startup, just make it full brightness
commit d6e46f67ab3af1ad3bfa72acb0efd9fe79dbf1dc
Author: Keith Packard <keithp@neko.keithp.com>
Date: Thu Jun 21 20:16:36 2007 +0100
Eliminate some uninitialized variable warnings
diff --git a/src/i830_dvo.c b/src/i830_dvo.c
index d81e5dd..dfd39ff 100644
--- a/src/i830_dvo.c
+++ b/src/i830_dvo.c
@@ -179,6 +179,7 @@ i830_dvo_mode_set(xf86OutputPtr output, DisplayModePtr mode,
switch (dvo_reg) {
case DVOA:
+ default:
dvo_srcdim_reg = DVOA_SRCDIM;
break;
case DVOB:
diff --git a/src/i830_video.c b/src/i830_video.c
index 43e25bb..b4f9e74 100644
--- a/src/i830_video.c
+++ b/src/i830_video.c
@@ -1702,6 +1702,10 @@ i830_covering_crtc (ScrnInfoPtr pScrn,
best_crtc = NULL;
best_coverage = 0;
+ crtc_box_ret->x1 = 0;
+ crtc_box_ret->x2 = 0;
+ crtc_box_ret->y1 = 0;
+ crtc_box_ret->y2 = 0;
for (c = 0; c < xf86_config->num_crtc; c++)
{
crtc = xf86_config->crtc[c];
commit 9d104634cf03bea82d1467f01e577cb8d2e4b554
Author: Keith Packard <keithp@neko.keithp.com>
Date: Thu Jun 21 01:15:39 2007 +0100
Add 3DSTATE_CLEAR_PARAMETERS bits
diff --git a/src/i915_reg.h b/src/i915_reg.h
index 6b40d70..682a157 100644
--- a/src/i915_reg.h
+++ b/src/i915_reg.h
@@ -109,6 +109,13 @@
/* 3DSTATE_CHROMA_KEY */
/* 3DSTATE_CLEAR_PARAMETERS, p150 */
+#define _3DSTATE_CLEAR_PARAMETERS (CMD_3D | (0x1d<<24) | (0x9c<<16) | 5)
+/* Dword 1 */
+#define CLEARPARAM_CLEAR_RECT (1 << 16)
+#define CLEARPARAM_ZONE_INIT (0 << 16)
+#define CLEARPARAM_WRITE_COLOR (1 << 2)
+#define CLEARPARAM_WRITE_DEPTH (1 << 1)
+#define CLEARPARAM_WRITE_STENCIL (1 << 0)
/* 3DSTATE_CONSTANT_BLEND_COLOR, p153 */
#define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16))
commit 3bbf313ba541526a893915f8b6c64b1eccf325e0
Author: Wang Zhenyu <zhenyu.z.wang@intel.com>
Date: Tue Jun 19 09:33:50 2007 +0800
Fix left G33 issues
Be sure to check G33 chip type in:
- sdvo output
- Y-major tile
- crt detect
- and xaa composite
Sorry for that I should have fixed them very earlier...
diff --git a/src/i830_crt.c b/src/i830_crt.c
index bbb4a83..d9f4ee6 100644
--- a/src/i830_crt.c
+++ b/src/i830_crt.c
@@ -310,7 +310,8 @@ i830_crt_detect(xf86OutputPtr output)
I830Ptr pI830 = I830PTR(pScrn);
xf86CrtcPtr crtc;
- if (IS_I945G(pI830) || IS_I945GM(pI830) || IS_I965G(pI830)) {
+ if (IS_I945G(pI830) || IS_I945GM(pI830) || IS_I965G(pI830) ||
+ IS_G33CLASS(pI830)) {
if (i830_crt_detect_hotplug(output))
return XF86OutputStatusConnected;
else
diff --git a/src/i830_debug.c b/src/i830_debug.c
index 9354958..bda263c 100644
--- a/src/i830_debug.c
+++ b/src/i830_debug.c
@@ -224,7 +224,7 @@ DEBUGSTRING(i830_debug_dpll)
break;
}
- if (IS_I945G(pI830) || IS_I945GM(pI830)) {
+ if (IS_I945G(pI830) || IS_I945GM(pI830) || IS_G33CLASS(pI830)) {
sprintf(sdvoextra, ", SDVO mult %d",
(int)((val & SDVO_MULTIPLIER_MASK) >>
SDVO_MULTIPLIER_SHIFT_HIRES) + 1);
diff --git a/src/i830_display.c b/src/i830_display.c
index 6965337..2df1fcc 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -706,7 +706,7 @@ i830_get_core_clock_speed(ScrnInfoPtr pScrn)
/* Core clock values taken from the published datasheets.
* The 830 may go up to 166 Mhz, which we should check.
*/
- if (IS_I945G(pI830))
+ if (IS_I945G(pI830) || IS_G33CLASS(pI830))
return 400000;
else if (IS_I915G(pI830))
return 333000;
@@ -869,7 +869,7 @@ i830_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
if (is_sdvo)
{
dpll |= DPLL_DVO_HIGH_SPEED;
- if (IS_I945G(pI830) || IS_I945GM(pI830))
+ if (IS_I945G(pI830) || IS_I945GM(pI830) || IS_G33CLASS(pI830))
{
int sdvo_pixel_multiply = adjusted_mode->Clock / mode->Clock;
dpll |= (sdvo_pixel_multiply - 1) << SDVO_MULTIPLIER_SHIFT_HIRES;
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 17d4c4e..afdd93d 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -790,7 +790,7 @@ IsTileable(ScrnInfoPtr pScrn, int pitch)
switch (pitch) {
case 128:
case 256:
- if (IS_I945G(pI830) || IS_I945GM(pI830))
+ if (IS_I945G(pI830) || IS_I945GM(pI830) || IS_G33CLASS(pI830))
return TRUE;
else
return FALSE;
@@ -1528,7 +1528,8 @@ i830_set_fence(ScrnInfoPtr pScrn, int nr, unsigned int offset,
}
}
- if ((IS_I945G(pI830) || IS_I945GM(pI830)) && tile_format == TILING_YMAJOR)
+ if ((IS_I945G(pI830) || IS_I945GM(pI830) || IS_G33CLASS(pI830))
+ && tile_format == TILING_YMAJOR)
fence_pitch = pitch / 128;
else if (IS_I9XX(pI830))
fence_pitch = pitch / 512;
diff --git a/src/i830_sdvo.c b/src/i830_sdvo.c
index 3916dba..2767715 100644
--- a/src/i830_sdvo.c
+++ b/src/i830_sdvo.c
@@ -747,7 +747,7 @@ i830_sdvo_mode_set(xf86OutputPtr output, DisplayModePtr mode,
sdvo_pixel_multiply = i830_sdvo_get_pixel_multiplier(mode);
if (IS_I965G(pI830)) {
/* done in crtc_mode_set as the dpll_md reg must be written early */
- } else if (IS_I945G(pI830) || IS_I945GM(pI830)) {
+ } else if (IS_I945G(pI830) || IS_I945GM(pI830) || IS_G33CLASS(pI830)) {
/* done in crtc_mode_set as it lives inside the dpll register */
} else {
sdvox |= (sdvo_pixel_multiply - 1) << SDVO_PORT_MULTIPLY_SHIFT;
diff --git a/src/i830_xaa.c b/src/i830_xaa.c
index 790299c..ec8a879 100644
--- a/src/i830_xaa.c
+++ b/src/i830_xaa.c
@@ -249,7 +249,7 @@ I830XAAInit(ScreenPtr pScreen)
pI830->xaa_composite = i830_composite;
pI830->xaa_done_composite = i830_done_composite;
} else if (IS_I915G(pI830) || IS_I915GM(pI830) ||
- IS_I945G(pI830) || IS_I945GM(pI830))
+ IS_I945G(pI830) || IS_I945GM(pI830) || IS_G33CLASS(pI830))
{
pI830->xaa_check_composite = i915_check_composite;
pI830->xaa_prepare_composite = i915_prepare_composite;
commit acef342c870f3b5b781e48c8bf44739aa5ee8ffa
Author: Eric Anholt <eric@anholt.net>
Date: Mon Jun 18 11:57:48 2007 -0700
Bug #11295: Disable textured video on i915 with framebuffer width too large.
diff --git a/src/i830_video.c b/src/i830_video.c
index 1ee43dd..43e25bb 100644
--- a/src/i830_video.c
+++ b/src/i830_video.c
@@ -569,7 +569,9 @@ I830InitVideo(ScreenPtr pScreen)
/* Set up textured video if we can do it at this depth and we are on
* supported hardware.
*/
- if (pScrn->bitsPerPixel >= 16 && (IS_I9XX(pI830) || IS_I965G(pI830))) {
+ if (pScrn->bitsPerPixel >= 16 && (IS_I9XX(pI830) || IS_I965G(pI830)) &&
+ !(!IS_I965G(pI830) && pScrn->displayWidth > 2048))
+ {
texturedAdaptor = I830SetupImageVideoTextured(pScreen);
if (texturedAdaptor != NULL) {
adaptors[num_adaptors++] = texturedAdaptor;
commit fbbb41bc5e03478cb46ee8f64ef68b23ff3fc14b
Author: Keith Packard <keithp@neko.keithp.com>
Date: Sun Jun 17 14:59:24 2007 +0100
Let DPMS functions enable plane/pipe/output on 8xx hardware.
On 855, letting crtc_mode_set enable the plane and pipe will occasionally
hang the chip. Instead, wait for crtc_enable to light things up. For 9xx,
leave things alone.
diff --git a/src/i830_display.c b/src/i830_display.c
index adc7479..6965337 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -958,11 +958,17 @@ i830_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
else
pipeconf &= ~PIPEACONF_DOUBLE_WIDE;
}
-#if 1
- dspcntr |= DISPLAY_PLANE_ENABLE;
- pipeconf |= PIPEACONF_ENABLE;
- dpll |= DPLL_VCO_ENABLE;
-#endif
+ /*
+ * This "shouldn't" be needed as the dpms on code
+ * will be run after the mode is set. On 9xx, it helps.
+ * On 855, it can lock up the chip (and the entire machine)
+ */
+ if (IS_I9XX (pI830))
+ {
+ dspcntr |= DISPLAY_PLANE_ENABLE;
+ pipeconf |= PIPEACONF_ENABLE;
+ dpll |= DPLL_VCO_ENABLE;
+ }
/* Disable the panel fitter if it was on our pipe */
if (i830_panel_fitter_pipe (pI830) == pipe)
commit d5ca000ece145a35fd6df0dcf3fb3460bd2d64e3
Author: Rémi Cardona <remi@gentoo.org>
Date: Sat Jun 16 13:17:54 2007 +0100
Include stdint.h to get uint64_t
diff --git a/src/i830_common.h b/src/i830_common.h
index 5c2d919..9c8616c 100644
--- a/src/i830_common.h
+++ b/src/i830_common.h
@@ -31,6 +31,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
#ifndef _I830_COMMON_H_
#define _I830_COMMON_H_
+#include <stdint.h>
#define I830_NR_TEX_REGIONS 255 /* maximum due to use of chars for next/prev */
#define I830_LOG_MIN_TEX_REGION_SIZE 14
commit 6b2ae93506d6795f87d6993bebfcb4e6632508ee
Author: Dave Airlie <airlied@linux.ie>
Date: Fri Jun 15 23:30:04 2007 +1000
sdvo: add support for RGB outputs on SDVO
This lights up my monitor VGA-1 - it doesn't look the best though
diff --git a/src/i830_sdvo.c b/src/i830_sdvo.c
index 24c9c99..3916dba 100644
--- a/src/i830_sdvo.c
+++ b/src/i830_sdvo.c
@@ -1280,6 +1280,18 @@ i830_sdvo_init(ScrnInfoPtr pScrn, int output_device)
output->subpixel_order = SubPixelHorizontalRGB;
name_prefix="TMDS";
}
+ else if (dev_priv->caps.output_flags & SDVO_OUTPUT_RGB0)
+ {
+ dev_priv->active_outputs = SDVO_OUTPUT_RGB0;
+ output->subpixel_order = SubPixelHorizontalRGB;
+ name_prefix="VGA";
+ }
+ else if (dev_priv->caps.output_flags & SDVO_OUTPUT_RGB1)
+ {
+ dev_priv->active_outputs = SDVO_OUTPUT_RGB1;
+ output->subpixel_order = SubPixelHorizontalRGB;
+ name_prefix="VGA";
+ }
else
{
unsigned char bytes[2];
@@ -1318,6 +1330,6 @@ i830_sdvo_init(ScrnInfoPtr pScrn, int output_device)
dev_priv->pixel_clock_max / 1000.0,
(dev_priv->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
(dev_priv->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
- dev_priv->caps.output_flags & SDVO_OUTPUT_TMDS0 ? 'Y' : 'N',
- dev_priv->caps.output_flags & SDVO_OUTPUT_TMDS1 ? 'Y' : 'N');
+ dev_priv->caps.output_flags & (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_TMDS0) ? 'Y' : 'N',
+ dev_priv->caps.output_flags & (SDVO_OUTPUT_RGB1 | SDVO_OUTPUT_TMDS1) ? 'Y' : 'N');
}
commit 671ba03befebfdd7256855858987aabc28b2e8cd
Author: Eric Anholt <eric@anholt.net>
Date: Wed Jun 13 16:30:26 2007 -0700
Fix and enable the 915-class planar textured video path.
diff --git a/src/i830_video.c b/src/i830_video.c
index c1ddc98..1ee43dd 100644
--- a/src/i830_video.c
+++ b/src/i830_video.c
@@ -2347,9 +2347,8 @@ I830PutImage(ScrnInfoPtr pScrn,
case FOURCC_I420:
srcPitch = (width + 3) & ~3;
srcPitch2 = ((width >> 1) + 3) & ~3;
- if (pPriv->textured) {
+ if (pPriv->textured && IS_I965G(pI830))
destId = FOURCC_YUY2;
- }
break;
case FOURCC_UYVY:
case FOURCC_YUY2:
@@ -2450,7 +2449,7 @@ I830PutImage(ScrnInfoPtr pScrn,
case FOURCC_I420:
top &= ~1;
nlines = ((((y2 + 0xffff) >> 16) + 1) & ~1) - top;
- if (pPriv->textured) {
+ if (pPriv->textured && IS_I965G(pI830)) {
I830CopyPlanarToPackedData(pScrn, pPriv, buf, srcPitch, srcPitch2,
dstPitch, height, top, left, nlines,
npixels, id);
diff --git a/src/i915_video.c b/src/i915_video.c
index d02f770..f1bf4cc 100644
--- a/src/i915_video.c
+++ b/src/i915_video.c
@@ -48,7 +48,7 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
PixmapPtr pPixmap)
{
I830Ptr pI830 = I830PTR(pScrn);
- CARD32 format, ms3, s2, s5;
+ CARD32 format, ms3, s5;
BoxPtr pbox;
int nbox, dxo, dyo, pix_xoff, pix_yoff;
Bool planar;
@@ -68,11 +68,8 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
planar = TRUE;
break;
default:
-#if 0
ErrorF("Unknown format 0x%x\n", id);
-#endif
- planar = FALSE;
- break;
+ return;
}
IntelEmitInvarientState(pScrn);
@@ -96,18 +93,14 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
OUT_RING(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) |
I1_LOAD_S(4) | I1_LOAD_S(5) | I1_LOAD_S(6) | 3);
- s2 = S2_TEXCOORD_FMT(0, TEXCOORDFMT_2D);
- if (planar)
- s2 |= S2_TEXCOORD_FMT(1, TEXCOORDFMT_2D);
- else
- s2 |= S2_TEXCOORD_FMT(1, TEXCOORDFMT_NOT_PRESENT);
- s2 |= S2_TEXCOORD_FMT(2, TEXCOORDFMT_NOT_PRESENT) |
- S2_TEXCOORD_FMT(3, TEXCOORDFMT_NOT_PRESENT) |
- S2_TEXCOORD_FMT(4, TEXCOORDFMT_NOT_PRESENT) |
- S2_TEXCOORD_FMT(5, TEXCOORDFMT_NOT_PRESENT) |
- S2_TEXCOORD_FMT(6, TEXCOORDFMT_NOT_PRESENT) |
- S2_TEXCOORD_FMT(7, TEXCOORDFMT_NOT_PRESENT);
- OUT_RING(s2);
+ OUT_RING(S2_TEXCOORD_FMT(0, TEXCOORDFMT_2D) |
+ S2_TEXCOORD_FMT(1, TEXCOORDFMT_NOT_PRESENT) |
+ S2_TEXCOORD_FMT(2, TEXCOORDFMT_NOT_PRESENT) |
+ S2_TEXCOORD_FMT(3, TEXCOORDFMT_NOT_PRESENT) |
+ S2_TEXCOORD_FMT(4, TEXCOORDFMT_NOT_PRESENT) |
+ S2_TEXCOORD_FMT(5, TEXCOORDFMT_NOT_PRESENT) |
+ S2_TEXCOORD_FMT(6, TEXCOORDFMT_NOT_PRESENT) |
+ S2_TEXCOORD_FMT(7, TEXCOORDFMT_NOT_PRESENT));
OUT_RING((1 << S4_POINT_WIDTH_SHIFT) | S4_LINE_WIDTH_ONE |
S4_CULLMODE_NONE | S4_VFMT_XY);
s5 = 0x0;
@@ -148,7 +141,9 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
(FILTER_LINEAR << SS2_MAG_FILTER_SHIFT) |
(FILTER_LINEAR << SS2_MIN_FILTER_SHIFT));
OUT_RING((TEXCOORDMODE_CLAMP_EDGE << SS3_TCX_ADDR_MODE_SHIFT) |
- (TEXCOORDMODE_CLAMP_EDGE << SS3_TCY_ADDR_MODE_SHIFT));
+ (TEXCOORDMODE_CLAMP_EDGE << SS3_TCY_ADDR_MODE_SHIFT) |
+ (0 << SS3_TEXTUREMAP_INDEX_SHIFT) |
+ SS3_NORMALIZED_COORDS);
OUT_RING(0x00000000);
OUT_RING(_3DSTATE_MAP_STATE | 3);
@@ -168,7 +163,7 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
if (!pI830->disableTiling)
ms3 |= MS3_USE_FENCE_REGS;
OUT_RING(ms3);
- OUT_RING(((video_pitch / 4) - 1) << 21);
+ OUT_RING(((video_pitch / 4) - 1) << MS4_PITCH_SHIFT);
ADVANCE_LP_RING();
FS_BEGIN();
@@ -179,8 +174,7 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
} else {
FS_LOCALS(16);
- BEGIN_LP_RING(1 + 18 + 11 + 11);
- OUT_RING(MI_NOOP);
+ BEGIN_LP_RING(18 + 11 + 11);
/* For the planar formats, we set up three samplers -- one for each plane,
* in a Y8 format. Because I couldn't get the special PLANAR_TO_PACKED
* shader setup to work, I did the manual pixel shader:
@@ -226,23 +220,29 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
OUT_RING(_3DSTATE_SAMPLER_STATE | 9);
OUT_RING(0x00000007);
/* sampler 0 */
- OUT_RING(0x00000000);
OUT_RING((FILTER_LINEAR << SS2_MAG_FILTER_SHIFT) |
(FILTER_LINEAR << SS2_MIN_FILTER_SHIFT));
OUT_RING((TEXCOORDMODE_CLAMP_EDGE << SS3_TCX_ADDR_MODE_SHIFT) |
- (TEXCOORDMODE_CLAMP_EDGE << SS3_TCY_ADDR_MODE_SHIFT));
- /* sampler 1 */
+ (TEXCOORDMODE_CLAMP_EDGE << SS3_TCY_ADDR_MODE_SHIFT) |
+ (0 << SS3_TEXTUREMAP_INDEX_SHIFT) |
+ SS3_NORMALIZED_COORDS);
OUT_RING(0x00000000);
+ /* sampler 1 */
OUT_RING((FILTER_LINEAR << SS2_MAG_FILTER_SHIFT) |
(FILTER_LINEAR << SS2_MIN_FILTER_SHIFT));
OUT_RING((TEXCOORDMODE_CLAMP_EDGE << SS3_TCX_ADDR_MODE_SHIFT) |
- (TEXCOORDMODE_CLAMP_EDGE << SS3_TCY_ADDR_MODE_SHIFT));
- /* sampler 2 */
+ (TEXCOORDMODE_CLAMP_EDGE << SS3_TCY_ADDR_MODE_SHIFT) |
+ (1 << SS3_TEXTUREMAP_INDEX_SHIFT) |
+ SS3_NORMALIZED_COORDS);
OUT_RING(0x00000000);
+ /* sampler 2 */
OUT_RING((FILTER_LINEAR << SS2_MAG_FILTER_SHIFT) |
(FILTER_LINEAR << SS2_MIN_FILTER_SHIFT));
OUT_RING((TEXCOORDMODE_CLAMP_EDGE << SS3_TCX_ADDR_MODE_SHIFT) |
- (TEXCOORDMODE_CLAMP_EDGE << SS3_TCY_ADDR_MODE_SHIFT));
+ (TEXCOORDMODE_CLAMP_EDGE << SS3_TCY_ADDR_MODE_SHIFT) |
+ (2 << SS3_TEXTUREMAP_INDEX_SHIFT) |
+ SS3_NORMALIZED_COORDS);
+ OUT_RING(0x00000000);
OUT_RING(_3DSTATE_MAP_STATE | 9);
OUT_RING(0x00000007);
@@ -251,36 +251,39 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
ms3 = MAPSURF_8BIT | MT_8BIT_I8;
ms3 |= (height - 1) << MS3_HEIGHT_SHIFT;
ms3 |= (width - 1) << MS3_WIDTH_SHIFT;
+ if (!pI830->disableTiling)
+ ms3 |= MS3_USE_FENCE_REGS;
OUT_RING(ms3);
- OUT_RING(((video_pitch * 2 / 4) - 1) << 21);
+ OUT_RING(((video_pitch * 2 / 4) - 1) << MS4_PITCH_SHIFT);
OUT_RING(pPriv->UBuf0offset);
ms3 = MAPSURF_8BIT | MT_8BIT_I8;
ms3 |= (height / 2 - 1) << MS3_HEIGHT_SHIFT;
ms3 |= (width / 2 - 1) << MS3_WIDTH_SHIFT;
+ if (!pI830->disableTiling)
+ ms3 |= MS3_USE_FENCE_REGS;
OUT_RING(ms3);
- OUT_RING(((video_pitch / 4) - 1) << 21);
+ OUT_RING(((video_pitch / 4) - 1) << MS4_PITCH_SHIFT);
OUT_RING(pPriv->VBuf0offset);
ms3 = MAPSURF_8BIT | MT_8BIT_I8;
ms3 |= (height / 2 - 1) << MS3_HEIGHT_SHIFT;
ms3 |= (width / 2 - 1) << MS3_WIDTH_SHIFT;
+ if (!pI830->disableTiling)
+ ms3 |= MS3_USE_FENCE_REGS;
OUT_RING(ms3);
- OUT_RING(((video_pitch / 4) - 1) << 21);
+ OUT_RING(((video_pitch / 4) - 1) << MS4_PITCH_SHIFT);
ADVANCE_LP_RING();
FS_BEGIN();
/* Declare samplers */
- i915_fs_dcl(FS_S0);
- i915_fs_dcl(FS_S1);
- i915_fs_dcl(FS_S2);
- i915_fs_dcl(FS_T0);
- i915_fs_dcl(FS_T1);
+ i915_fs_dcl(FS_S0); /* Y */
+ i915_fs_dcl(FS_S1); /* U */
+ i915_fs_dcl(FS_S2); /* V */
+ i915_fs_dcl(FS_T0); /* normalized coords */
- /* Load samplers to temporaries. Y (sampler 0) gets the un-halved coords-
- * from t1.
- */
- i915_fs_texld(FS_R1, FS_S0, FS_T1);
+ /* Load samplers to temporaries. */
+ i915_fs_texld(FS_R1, FS_S0, FS_T0);
i915_fs_texld(FS_R2, FS_S1, FS_T0);
i915_fs_texld(FS_R3, FS_S2, FS_T0);
@@ -293,16 +296,17 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
i915_fs_add(FS_R0, i915_fs_operand_reg(FS_R0),
i915_fs_operand_reg(FS_C0));
/* dot-product the YUV data in R0 by the vectors of coefficients for
- * calculating R, G, and B, storing the results in the R, G, or B channels
- * of the output color.
+ * calculating R, G, and B, storing the results in the R, G, or B
+ * channels of the output color. The OC results are implicitly clamped
+ * at the end of the program.
*/
- i915_fs_dp3_masked(FS_OC, MASK_X | MASK_SATURATE,
+ i915_fs_dp3_masked(FS_OC, MASK_X,
i915_fs_operand_reg(FS_R0),
i915_fs_operand_reg(FS_C1));
- i915_fs_dp3_masked(FS_OC, MASK_Y | MASK_SATURATE,
+ i915_fs_dp3_masked(FS_OC, MASK_Y,
i915_fs_operand_reg(FS_R0),
i915_fs_operand_reg(FS_C2));
- i915_fs_dp3_masked(FS_OC, MASK_Z | MASK_SATURATE,
+ i915_fs_dp3_masked(FS_OC, MASK_Z,
i915_fs_operand_reg(FS_R0),
i915_fs_operand_reg(FS_C3));
/* Set alpha of the output to 1.0, by wiring W to 1 and not actually using
@@ -342,19 +346,13 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
int box_x2 = pbox->x2;
int box_y2 = pbox->y2;
float src_scale_x, src_scale_y;
- int vert_data_count;
pbox++;
- src_scale_x = (float)src_w / (float)drw_w;
- src_scale_y = (float)src_h / (float)drw_h;
-
- if (!planar)
- vert_data_count = 12;
- else
- vert_data_count = 18;
+ src_scale_x = ((float)src_w / width) / drw_w;
+ src_scale_y = ((float)src_h / height) / drw_h;
- BEGIN_LP_RING(vert_data_count + 8);
+ BEGIN_LP_RING(8 + 12);
OUT_RING(MI_NOOP);
OUT_RING(MI_NOOP);
OUT_RING(MI_NOOP);
@@ -366,47 +364,25 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
/* vertex data - rect list consists of bottom right, bottom left, and top
* left vertices.
*/
- OUT_RING(PRIM3D_INLINE | PRIM3D_RECTLIST |
- (vert_data_count - 1));
+ OUT_RING(PRIM3D_INLINE | PRIM3D_RECTLIST | (12 - 1));
/* bottom right */
OUT_RING_F(box_x2 + pix_xoff);
OUT_RING_F(box_y2 + pix_yoff);
- if (!planar) {
- OUT_RING_F((box_x2 - dxo) * src_scale_x);
- OUT_RING_F((box_y2 - dyo) * src_scale_y);
- } else {
- OUT_RING_F((box_x2 - dxo) * src_scale_x / 2.0);
- OUT_RING_F((box_y2 - dyo) * src_scale_y / 2.0);
- OUT_RING_F((box_x2 - dxo) * src_scale_x);
- OUT_RING_F((box_y2 - dyo) * src_scale_y);
- }
+ OUT_RING_F((box_x2 - dxo) * src_scale_x);
+ OUT_RING_F((box_y2 - dyo) * src_scale_y);
/* bottom left */
OUT_RING_F(box_x1 + pix_xoff);
OUT_RING_F(box_y2 + pix_yoff);
- if (!planar) {
- OUT_RING_F((box_x1 - dxo) * src_scale_x);
- OUT_RING_F((box_y2 - dyo) * src_scale_y);
- } else {
- OUT_RING_F((box_x1 - dxo) * src_scale_x / 2.0);
- OUT_RING_F((box_y2 - dyo) * src_scale_y / 2.0);
- OUT_RING_F((box_x1 - dxo) * src_scale_x);
- OUT_RING_F((box_y2 - dyo) * src_scale_y);
- }
+ OUT_RING_F((box_x1 - dxo) * src_scale_x);
+ OUT_RING_F((box_y2 - dyo) * src_scale_y);
/* top left */
OUT_RING_F(box_x1 + pix_xoff);
OUT_RING_F(box_y1 + pix_yoff);
- if (!planar) {
- OUT_RING_F((box_x1 - dxo) * src_scale_x);
- OUT_RING_F((box_y1 - dyo) * src_scale_y);
- } else {
- OUT_RING_F((box_x1 - dxo) * src_scale_x / 2.0);
- OUT_RING_F((box_y1 - dyo) * src_scale_y / 2.0);
- OUT_RING_F((box_x1 - dxo) * src_scale_x);
- OUT_RING_F((box_y1 - dyo) * src_scale_y);
- }
+ OUT_RING_F((box_x1 - dxo) * src_scale_x);
+ OUT_RING_F((box_y1 - dyo) * src_scale_y);
ADVANCE_LP_RING();
}
commit 6c29e0bae5f1e7cee02b678418394abb971594eb
Author: Eric Anholt <eric@anholt.net>
Date: Wed Jun 13 13:40:39 2007 -0700
Improve the drm_i915_flip_t check.
diff --git a/configure.ac b/configure.ac
index da9fd3f..66992fc 100644
--- a/configure.ac
+++ b/configure.ac
@@ -191,11 +191,14 @@ if test "$DRI" = yes; then
fi
save_CFLAGS="$CFLAGS"
- CFLAGS="$DRI_CFLAGS"
+ CFLAGS="$XORG_CFLAGS $DRI_CFLAGS"
AC_CHECK_TYPE(drm_i915_flip_t,
[AC_DEFINE(HAVE_I915_FLIP, 1,
[Have drm_i915_flip_t and related definitions])],
- [], [#include <i915_drm.h>])
+ [], [
+#include <inttypes.h>
+#include <i915_drm.h>
+])
CFLAGS="$save_CFLAGS"
fi
commit 420e41e7921d3cc07c784fd17936ec8a675f3b20
Author: Eric Anholt <eric@anholt.net>
Date: Wed Jun 13 13:34:26 2007 -0700
Revert "Replace failure-prone configure test for fresh libdrm with a simple ifndef."
This reverts commit c2b130354aecffbeb2a2d23c7371461feaf5766a.
Sadly, a non-working DRM_IOCTL_I915_FLIP already existed.
diff --git a/configure.ac b/configure.ac
index 53d23ed..da9fd3f 100644
--- a/configure.ac
+++ b/configure.ac
@@ -189,6 +189,14 @@ if test "$DRI" = yes; then
if test "$have_damage_h" = yes; then
AC_DEFINE(DAMAGE,1,[Use Damage extension])
fi
+
+ save_CFLAGS="$CFLAGS"
+ CFLAGS="$DRI_CFLAGS"
+ AC_CHECK_TYPE(drm_i915_flip_t,
+ [AC_DEFINE(HAVE_I915_FLIP, 1,
+ [Have drm_i915_flip_t and related definitions])],
+ [], [#include <i915_drm.h>])
+ CFLAGS="$save_CFLAGS"
fi
AM_CONDITIONAL(VIDEO_DEBUG, test x$VIDEO_DEBUG = xyes)
diff --git a/src/i830_dri.c b/src/i830_dri.c
index 6ec56cf..ca1190c 100644
--- a/src/i830_dri.c
+++ b/src/i830_dri.c
@@ -83,8 +83,10 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "i915_drm.h"
-/* This block can be removed when libdrm >= 2.3.1 is required. */
-#ifndef DRM_IOCTL_I915_FLIP
+/* This block and the corresponding configure test can be removed when
+ * libdrm >= 2.3.1 is required.
+ */
+#ifndef HAVE_I915_FLIP
#define DRM_VBLANK_FLIP 0x8000000
commit 51612e5ac3ddfb2bb172c58f2dfff9631093b69c
Author: Eric Anholt <eric@anholt.net>
Date: Tue Jun 12 16:09:54 2007 -0700
On hang, dump up to the head pointer, not just up to the tail.
diff --git a/src/i830_debug.c b/src/i830_debug.c
index 19eb17a..9354958 100644
--- a/src/i830_debug.c
+++ b/src/i830_debug.c
@@ -666,7 +666,8 @@ i830_dump_ring(ScrnInfoPtr pScrn)
virt = pI830->LpRing->virtual_start;
ErrorF ("Ring at virtual 0x%x head 0x%x tail 0x%x count %d\n",
(unsigned int) virt, head, tail, (((tail + mask + 1) - head) & mask) >> 2);
- for (ring = (head - 128) & mask; ring != tail; ring = (ring + 4) & mask)
+ for (ring = (head - 128) & mask; ring != ((head + 4) & mask);
+ ring = (ring + 4) & mask)
{
ErrorF ("\t%08x: %08x\n", ring, *(volatile unsigned int *) (virt + ring));
}
commit ceb6dd72443c094212b0281c42cbe92e9a29f682
Author: Eric Anholt <eric@anholt.net>
Date: Mon Jun 4 16:37:53 2007 -0700
Fix context switching between DRI and X.
Now, all 3D pipeline consumers in the driver just call
IntelEmitInvariantState(), which handles basic state setup, the caching of that
state setup, and notifying DRI clients. This also removes a mistaken idle
wait in the Render code which was papering over the brokenness in the context
switching.
diff --git a/src/i830.h b/src/i830.h
index e4d5070..8947524 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -307,7 +307,6 @@ typedef struct _I830Rec {
Rotation rotation;
void (*PointerMoved)(int, int, int);
CreateScreenResourcesProcPtr CreateScreenResources;
- int *used3D;
i830_memory *logical_context;
@@ -527,7 +526,7 @@ typedef struct _I830Rec {
CARD32 saveSWF[17];
CARD32 saveBLC_PWM_CTL;
- enum last_3d last_3d;
+ enum last_3d *last_3d;
/** Enables logging of debug output related to mode switching. */
Bool debug_modes;
diff --git a/src/i830_dri.c b/src/i830_dri.c
index 4746be0..6ec56cf 100644
--- a/src/i830_dri.c
+++ b/src/i830_dri.c
@@ -1196,7 +1196,7 @@ I830DRISwapContext(ScreenPtr pScreen, DRISyncType syncType,
if (I810_DEBUG & DEBUG_VERBOSE_DRI)
ErrorF("i830DRISwapContext (in)\n");
- pI830->last_3d = LAST_3D_OTHER;
+ *pI830->last_3d = LAST_3D_OTHER;
if (!pScrn->vtSema)
return;
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 3133d77..7f1fe2c 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -2045,22 +2045,25 @@ I830InitFBManager(
return ret;
}
-/* Initialize the first context */
+/**
+ * Intialiazes the hardware for the 3D pipeline use in the 2D driver.
+ *
+ * Some state caching is performed to avoid redundant state emits. This
+ * function is also responsible for marking the state as clobbered for DRI
+ * clients.
+ */
void
IntelEmitInvarientState(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
CARD32 ctx_addr;
-#ifdef XF86DRI
- drmI830Sarea *sarea;
-#endif
- if (pI830->noAccel || !I830IsPrimary(pScrn))
+ if (pI830->noAccel)
return;
#ifdef XF86DRI
if (pI830->directRenderingEnabled) {
- sarea = DRIGetSAREAPrivate(pScrn->pScreen);
+ drmI830Sarea *sarea = DRIGetSAREAPrivate(pScrn->pScreen);
/* Mark that the X Server was the last holder of the context */
if (sarea)
@@ -2068,6 +2071,12 @@ IntelEmitInvarientState(ScrnInfoPtr pScrn)
}
#endif
+ /* If we've emitted our state since the last clobber by another client,
+ * skip it.
+ */
+ if (*pI830->last_3d != LAST_3D_OTHER)
+ return;
+
ctx_addr = pI830->logical_context->offset;
assert((pI830->logical_context->offset & 2047) == 0);
{
@@ -2304,13 +2313,14 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
pI830->LpRing = xcalloc(1, sizeof(I830RingBuffer));
if (!pI830->overlayOn)
pI830->overlayOn = xalloc(sizeof(Bool));
- if (!pI830->used3D)
- pI830->used3D = xalloc(sizeof(int));
- if (!pI830->LpRing || !pI830->overlayOn || !pI830->used3D) {
+ if (!pI830->last_3d)
+ pI830->last_3d = xalloc(sizeof(enum last_3d));
+ if (!pI830->LpRing || !pI830->overlayOn || !pI830->last_3d) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Could not allocate primary data structures.\n");
return FALSE;
}
+ *pI830->last_3d = LAST_3D_OTHER;
*pI830->overlayOn = FALSE;
if (pI830->entityPrivate)
pI830->entityPrivate->XvInUse = -1;
@@ -2320,7 +2330,7 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
pI830->LpRing = pI8301->LpRing;
pI830->overlay_regs = pI8301->overlay_regs;
pI830->overlayOn = pI8301->overlayOn;
- pI830->used3D = pI8301->used3D;
+ pI830->last_3d = pI8301->last_3d;
}
/* Need MMIO mapped to do GTT lookups during memory allocation. */
@@ -3012,15 +3022,11 @@ I830EnterVT(int scrnIndex, int flags)
*/
i830SetHotkeyControl(pScrn, HOTKEY_DRIVER_NOTIFY);
- /* Needed for rotation */
- IntelEmitInvarientState(pScrn);
-
if (pI830->checkDevices)
pI830->devicesTimer = TimerSet(NULL, 0, 1000, I830CheckDevicesTimer, pScrn);
- /* Force invarient 3D state to be emitted */
- *pI830->used3D = 1<<31;
- pI830->last_3d = LAST_3D_OTHER;
+ /* Mark 3D state as being clobbered */
+ *pI830->last_3d = LAST_3D_OTHER;
return TRUE;
}
@@ -3111,8 +3117,8 @@ I830CloseScreen(int scrnIndex, ScreenPtr pScreen)
pI830->LpRing = NULL;
xfree(pI830->overlayOn);
pI830->overlayOn = NULL;
- xfree(pI830->used3D);
- pI830->used3D = NULL;
+ xfree(pI830->last_3d);
+ pI830->last_3d = NULL;
}
pScrn->PointerMoved = pI830->PointerMoved;
diff --git a/src/i830_exa.c b/src/i830_exa.c
index bb60c0a..22618dc 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -270,22 +270,6 @@ I830EXADoneCopy(PixmapPtr pDstPixmap)
#endif
}
-void
-i830_enter_render(ScrnInfoPtr pScrn)
-{
- I830Ptr pI830 = I830PTR(pScrn);
-#ifdef XF86DRI
- if (pI830->directRenderingEnabled) {
- drmI830Sarea *pSAREAPriv = DRIGetSAREAPrivate(pScrn->pScreen);
- pSAREAPriv->ctxOwner = DRIGetContext(pScrn->pScreen);
- }
-#endif
- if (pI830->last_3d != LAST_3D_RENDER) {
- i830WaitSync(pScrn);
- pI830->last_3d = LAST_3D_RENDER;
- }
-}
-
#define xFixedToFloat(val) \
((float)xFixedToInt(val) + ((float)xFixedFrac(val) / 65536.0))
diff --git a/src/i830_render.c b/src/i830_render.c
index 957953e..90b884f 100644
--- a/src/i830_render.c
+++ b/src/i830_render.c
@@ -400,7 +400,8 @@ i830_prepare_composite(int op, PicturePtr pSrcPicture,
I830Ptr pI830 = I830PTR(pScrn);
CARD32 dst_format, dst_offset, dst_pitch;
- i830_enter_render(pScrn);
+ IntelEmitInvarientState(pScrn);
+ *pI830->last_3d = LAST_3D_RENDER;
i830_get_dest_format(pDstPicture, &dst_format);
dst_offset = intel_get_pixmap_offset(pDst);
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