xserver-xorg-video-intel: Changes to 'debian-experimental'
ChangeLog | 416 +++++++++++++++++++++++++++++++++++++++++++++++++++++
README | 5
debian/changelog | 6
man/intel.man | 27 ++-
src/i830.h | 11 +
src/i830_display.c | 80 ++++++++++
src/i830_lvds.c | 16 ++
src/i830_video.c | 31 ---
src/ivch/ivch.c | 2
9 files changed, 559 insertions(+), 35 deletions(-)
New commits:
commit 2925445105a689bd68b53f48d53e8520407f0f09
Author: Drew Parsons <drew@pug.localdomain>
Date: Wed May 30 12:27:25 2007 +1000
Pull in latest upstream git (updated Xv fix)
diff --git a/ChangeLog b/ChangeLog
index 8a84ecb..9b5351a 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,9 +1,425 @@
+commit 516fb73ffee0aea7cf892e6703d37f8ecf52b812
+Author: Eric Anholt <eric@anholt.net>
+Date: Tue May 29 10:22:25 2007 -0700
+
+ Remove README statement that 830M panels are unsupported.
+
+commit 72462568da589054828b72ace83232a71636ee73
+Author: Eric Anholt <eric@anholt.net>
+Date: Tue May 29 10:21:12 2007 -0700
+
+ Expand manpage description of outputs supported.
+
+commit 906b974bfeeed18d79c244ad3db4f5d30e13e4c8
+Author: Eric Anholt <eric@anholt.net>
+Date: Tue May 29 09:49:08 2007 -0700
+
+ Add a fixup to LVDS panel mode detection for 1280x768 panel from text mode.
+
+ Apparently some BIOSes will program a small mode with large blanking instead of
+ using the pannel fitter.
+
+commit 4b2781291844b61b397e257a0fdb43e964e5f603
+Author: Keith Packard <keithp@neko.keithp.com>
+Date: Sat May 26 10:09:11 2007 -0700
+
+ Mark IVCH as connected when detected
+
+commit 2a365eab0178c28782fba97bdd22365f30ce8963
+Author: Keith Packard <keithp@dulcimer.keithp.com>
+Date: Sun May 27 12:35:55 2007 -0700
+
+ On i830, Pipe B cannot be lit the first time unless Pipe A is running.
+
+ I don't understand it, but just like the video overlay, if Pipe A is not
+ running, Pipe B will not turn the first time it is activated. This
+ patch restructures the code used for the video overlay to share it
+ with the crtc commit function.
+
+commit ff8c8cb869a3c780dbd826f7c94f06e4f3fda6af
+Author: Keith Packard <keithp@dulcimer.keithp.com>
+Date: Fri May 25 20:29:59 2007 -0700
+
+ Compute and clip to crtc before call to xf86XVClipVideoHelper.
+
+ By clipping to the crtc ahead of time, xf86XVClipVideoHelper will
+ correctly clip to the bounds of the crtc, eliminating the need for any
+ custom crtc clipping.
+
+ Also, replace the broken xf86XVFillKeyHelper with a private version that
+ doesn't end up stuck with the wrong clip list when the root window changes
+ size.
+
+commit 33f635d79fe891079558fd909d564f3cf424c482
+Author: Keith Packard <keithp@dulcimer.keithp.com>
+Date: Fri May 25 17:32:06 2007 -0700
+
+ Ensure Pipe A is active when enabling overlay the first time.
+
+ The overlay on the i830 appears to be clocked by Pipe A when being enabled.
+ If pipe A is not running, it will freeze the overlay and blank the screen.
+ Setting a random mode on the Pipe and turning it on fixes this problem
+ nicely.
+
+commit ff0ac8ea63dd6e55573652c5826c482881da0d62
+Author: Keith Packard <keithp@dulcimer.keithp.com>
+Date: Fri May 25 17:26:15 2007 -0700
+
+ Xv does not require directRendering
+
+commit 109e5d597b76f7414601cb39c07b133ebf1b0e61
+Author: Keith Packard <keithp@dulcimer.keithp.com>
+Date: Thu May 24 11:40:50 2007 -0700
+
+ Clean up CRTC selection. Remove more overlay blocking.
+
+ Create separate CRTC selection function, use ints instead of floats for
+ coverage measurement. Remove pipe stalls waiting for overlay update.
+
+commit dfb1ec9a07f74125cb1724d41ed4342c4714e12b
+Author: Keith Packard <keithp@dulcimer.keithp.com>
+Date: Thu May 24 11:23:44 2007 -0700
+
+ Eliminate blocking for video overlay.
+
+ No need to block for the overlay; just use the idle buffer. This will
+ always work because the buffer switch occurs at vblank time, so there is
+ always plenty of time to get the next buffer contents in place before it
+ starts getting scanned to the screen.
+
+commit d172344599585e11388e59659dc9aaa86d7a31c1
+Author: Keith Packard <keithp@dulcimer.keithp.com>
+Date: Wed May 23 20:00:16 2007 -0700
+
+ Reformat i830_video.c to four-space indents.
+
+ Yes, I can't stand it anymore. it's a huge patch, but
+ git-diff -w shows no changes.
+
+commit 02935ced3fba598a01d908ae49ccc30cbcc765a8
+Author: Keith Packard <keithp@dulcimer.keithp.com>
+Date: Wed May 23 19:24:25 2007 -0700
+
+ Clean up overlay management.
+
+ Create separate on/continue/off functions for overlay.
+ Manage overlayOn boolean within those functions.
+ Eliminate redundant management code in other routines.
+
+commit 08753f9b79f3f09879a18b552d90d88dbf52d4be
+Author: Keith Packard <keithp@dulcimer.keithp.com>
+Date: Wed May 23 18:59:10 2007 -0700
+
+ Use FLIP_CONTINUE with ~OVERLAY_ENABLE to turn overlay off.
+
+ This makes the overlay work on i830 with the modesetting driver. I don't
+ know why the pre-modesetting driver worked without this, but it did.
+ A more 'correct' fix would be welcome, but this does seem to do the trick.
+
+commit aa187186dc4f2d770a642060fe54f547ea8952b3
+Author: Keith Packard <keithp@dulcimer.keithp.com>
+Date: Mon May 21 10:49:08 2007 -0700
+
+ Automatically select crtc based on coverage.
+
+ By default, select crtc based on which one covers more of the video output.
+ pipe property can be used to override selection when both have partial
+ coverage.
+
+commit f5017a06a271bba0ace3c5415b78e78bc0c96f22
+Author: Keith Packard <keithp@dulcimer.keithp.com>
+Date: Sun May 20 17:25:33 2007 -0700
+
+ Use CRTCs instead of pipe indices for video pipe selection.
+
+ Replace pipe indices with crtc indices and store references to the xf86Crtc
+ objects in the video private structure.
+
+commit 2df87256df755e972eb884bc742832038a020b2c
+Author: Keith Packard <keithp@dulcimer.keithp.com>
+Date: Sun May 20 17:23:26 2007 -0700
+
+ Dump pending ring on crash.
+
+ When the hardware locks up, dump the pending commands in the ring for
+ analysis.
+
+commit 9971fac87622c93503540196e1756fded3d4869e
+Author: Michel Dänzer <michel@tungstengraphics.com>
+Date: Tue May 22 10:46:39 2007 +0200
+
+ i830: Provide new DRI texOffsetStart hook when available with EXA.
+
+commit 5390a2e2611950d3f48cc735df4a0c37bc5377a5
+Author: Michel Dänzer <michel@tungstengraphics.com>
+Date: Fri May 18 17:51:36 2007 +0200
+
+ Update vblank pipes when a pipe gets disabled.
+
+commit 4120a20626998272424225261f2cf7960b7ec0ca
+Author: Wang Zhenyu <zhenyu.z.wang@intel.com>
+Date: Fri May 18 10:10:34 2007 +0800
+
+ EXA: add render enter helper function
+
+ That notify mesa rendering is smashing the state, and check last 3d
+ operation to do sync after we're swapped in or others.
+
+commit 8db28aeaa6e908017b40bd9180f144a2972f6278
+Author: Wang Zhenyu <zhenyu.z.wang@intel.com>
+Date: Fri May 18 09:54:34 2007 +0800
+
+ Fix ring debug code
+
+ Use proper unsigned type for timer variables, and try to dump 965G state.
+
+commit 16e50a91dd8b3676e8ce06052c549ab27e6843b7
+Author: Wang Zhenyu <zhenyu.z.wang@intel.com>
+Date: Fri May 18 09:53:36 2007 +0800
+
+ EXA: remove a flush cmd in i915 render code
+
+commit 12a9fcfe1b25cee850380d8ce11ef11cde9aaacb
+Merge: b930bb9... e89d5f2...
+Author: Keith Packard <keithp@neko.keithp.com>
+Date: Thu May 17 15:11:29 2007 -0700
+
+ Merge branch 'master' of git+ssh://git.freedesktop.org/git/xorg/driver/xf86-video-intel
+
+commit e89d5f275442915cc7777e75d3fcf7e7ed0f2084
+Author: Keith Packard <keithp@dulcimer.keithp.com>
+Date: Thu May 17 15:00:12 2007 -0700
+
+ Make each output control clones/crtcs. Split DVO into LVDS, TMDS, TV.
+
+ Move clone/crtc config into each output where it's easier to understand (no
+ need for a switch statement in I830PrepareOutputs. Also, split DVO into
+ three sub-types (TMDS, LVDS, TVOUT) as those have different cloning
+ abilities.
+
+commit a441954630c6cdabbf463bfc3404160f97a04b4f
+Author: Keith Packard <keithp@dulcimer.keithp.com>
+Date: Thu May 17 14:11:49 2007 -0700
+
+ Enable panel fitter on ivch DVO.
+
+ Using BIOS source code as a guide, set up the panel fitter on the ivch. This
+ involves setting the pipe to the panel fixed mode, the DVO to the source
+ size and assigning vertical and horizontal scaling factors in the ivch
+ itself.
+
+commit c0daa0a982e7074af4b50653b4a45b0a6352b43d
+Author: Keith Packard <keithp@dulcimer.keithp.com>
+Date: Wed May 16 14:02:00 2007 -0700
+
+ Change DVO module interface to pass more state across. Fix IVCH display.
+
+ The DVO module interface reflected most of the xf86Output API to the
+ underlying functions; finish that work given the changes that have since
+ occurred in the xf86Output API.
+
+ Move the LVDS-specific code into the IVCH module and make that work on the
+ Thinkpad X30 (an i830-based laptop). Panel scaling does not work yet.
+
+commit b28817a87a1608e849e4a9a736dda43533a84b0c
+Author: Keith Packard <keithp@dulcimer.keithp.com>
+Date: Wed May 16 13:59:36 2007 -0700
+
+ Add i830_bios_get_aim_data_block to read AIM data from BIOS
+
+ Add-in modules have per-module data in the BIOS which contains configuration
+ information which cannot be entirely discovered.
+
+commit b31bef1a8effa9acb6de7edd206b9d8c48d88144
+Author: Keith Packard <keithp@work.jf.intel.com>
+Date: Sat May 12 20:04:31 2007 -0700
+
+ Deal with i830 CRT load detection which cannot use FORCE_BORDER.
+
+ Chips newer than the i830 can force the border color for the active period
+ of the screen, allowing the load detection to easily see the right data. In
+ addition, newer chips appear to have more sensible load detection hardware
+ which either ignores inactive periods on the screen or performs some
+ longer-term averaging. The i830 appears to provide unfiltered samples of the
+ detected load.
+
+ For the i830, then, emit a border at the bottom of the screen and, for load
+ detection, simply turn it purple and wait for the current line to be within
+ the border. Sample an entire scanline, counting the number of times the load
+ detection sees a monitor. In my testing, the presence of a monitor will
+ cause the detection to succeed every time, while the absense will cause it
+ to fail about 75% of the time. The code here, checks for presence at least
+ 75% of the time, which should be adequate.
+
+ Also, as the new mode configuration code has already taken care to enable
+ the CRT output, eliminate much of the load detection code which is simply
+ duplicating functionality from the general mode setting code. This should
+ result in faster load detection as this code will now run in no more than
+ one frame time. It does burn the CPU the whole time though, polling the
+ displayed scanline register.
+
+commit b930bb9d6da8c24dbe0949afb7bb2aa4bcb24687
+Author: Eric Anholt <eric@anholt.net>
+Date: Thu May 3 13:44:12 2007 -0700
+
+ Disable vblank interrupts when no DRI clients are running.
+ (cherry picked from commit 6621dd71ada839f4c1742e9e5b272e924cee21d9)
+
+commit 3b769af53e0ef6ef9b56afd679446c73a0e63ea5
+Author: Eric Anholt <eric@anholt.net>
+Date: Thu May 3 13:44:12 2007 -0700
+
+ Disable vblank interrupts when no DRI clients are running.
+
+commit 775fc125aa7ecd0f054959ef210be2df4dc54345
+Author: Dave Airlie <airlied@airlied2.(none)>
+Date: Thu May 3 20:58:50 2007 +1000
+
+ i810: be a bit more verbose about disabling DRI
+
+commit 34f362d099d255f8f0bb34e9de30f953ee770163
+Author: Eric Anholt <eric@anholt.net>
+Date: Wed May 2 15:40:49 2007 -0700
+
+ Fix typo s/i/index/ in LoadPalette for depth 16.
+
+ Reported by: Haihao Xiang <haihao.xiang@intel.com>
+
+commit f850d4727a2ad55c2116d0788f6684b2a0192d24
+Author: Eric Anholt <eric@anholt.net>
+Date: Wed May 2 14:16:21 2007 -0700
+
+ Make up a fixed panel timing for DVO LVDS, and use DVOA for DVO LVDS.
+
+ The fixed panel timing will only be available when the LVDS is already on
+ at X startup.
+
+ So far, our only mostly-working LVDS driver is for the i830, and on i830 the
+ LVDS is always on DVOA, so use that for all LVDS chips. This may need to
+ change if we support the ch7017 I've seen used on embedded i845, for example.
+
+commit f3168e3b0c5664a322ca6bb1c81fc94844cb30ab
+Author: Eric Anholt <eric@anholt.net>
+Date: Wed May 2 14:08:30 2007 -0700
+
+ Disable non-working GTT decoding on i830, and fix map/unmap of GTT.
+
+commit 1fc630f24f8ad9e304cb0761f9cacca2224203c4
+Author: Eric Anholt <eric@anholt.net>
+Date: Wed May 2 13:29:21 2007 -0700
+
+ Add DVO[ABC] register debugging.
+
+commit d0ec37e9c0ceab1080700cd7be4a7cc58552d465
+Author: Eric Anholt <eric@anholt.net>
+Date: Tue May 1 15:56:37 2007 -0700
+
+ Make the DVO output name LVDS if it's an LVDS chip.
+
+commit 490d05f99d2b62dd612d514d9ae0badbac9285ce
+Author: Eric Anholt <eric@anholt.net>
+Date: Tue May 1 15:47:01 2007 -0700
+
+ Fix typo in previous commit with s/XF86_DRI/XF86DRI/
+
+commit c7bb34e83d7c459d932d01070cfeffbbf6c703ac
+Author: Dave Airlie <airlied@linux.ie>
+Date: Wed May 2 14:25:39 2007 +1000
+
+ disable all outputs on EnterVT
+
+ This disables all outputs on EnterVT as the SDVO output can confuse
+ the VGA output if the BIOS has enabled it on the same pipe but X
+ isn't going to use the SDVO.
+
+ Worked out on irc with keithp
+
+commit cae0ae237b79fa7d3a82dfc8d3fb595ccb6c63e1
+Author: Samuel Thibault <samuel.thibault@ens-lyon.org>
+Date: Tue May 1 12:41:18 2007 -0700
+
+ Bug #10714: Fix build without DRI.
+
+commit 6748d620fbf39dd98982856c09256bdec0fc82a1
+Author: Eric Anholt <eric@anholt.net>
+Date: Mon Apr 30 17:27:23 2007 -0700
+
+ Ignore VideoRam now that its original purpose is obsolete.
+
+ It had been necessary to allow more than a small amount of memory to be
+ allocated, but now those old small allocations people had configured are
+ getting in the way.
+
+commit a4f1a7872f6f959bb4bc6568face710bee3589de
+Author: Eric Anholt <eric@anholt.net>
+Date: Mon Apr 30 17:13:09 2007 -0700
+
+ Allow physical-memory allocations within stolen memory.
+
+ Because stolen memory happens to be a contiguous block of high system memory,
+ we can just read the GTT entries for it to get physical addresses for our
+ allocations there if needed. This reduces fragmentation of the aperture space,
+ and will often reclaim up to 7 MB of memory that had been left unused since the
+ simplified aperture manager was put in place, but without reintroducing the
+ complexities of the old aperture manager.
+
+commit 7d0d34cfdcc67d07e7667e13a9413743853134f8
+Author: Eric Anholt <eric@anholt.net>
+Date: Mon Apr 30 10:39:54 2007 -0700
+
+ Disable some clock gating functions documented to work incorrectly.
+
+commit 138ac8f36cb4e4b3776f313955372522646acbb2
+Author: Wang Zhenyu <zhenyu.z.wang@intel.com>
+Date: Sun Apr 29 14:43:19 2007 +0800
+
+ Alloc state mem buffer on 965G for xaa rotation
+
+ 965G needs state mem buffer to setup render pipeline.
+ Thanks Barry Scrott for report this.
+
+commit 0cd524e5411e35c8483c02ecc5062625809e6fc6
+Author: Kristian Høgsberg <krh@redhat.com>
+Date: Wed Apr 25 18:09:10 2007 -0400
+
+ Implement the custom I2C protocol used by the ivch DVO.
+
+ The ihch DVO uses a modified I2C addressing scheme as described
+ in section 5.2 of the data sheet. Implement this by over-riding
+ the I2C read and write word routines.
+
+commit 880314aabe6326ed56517034940f0e10fb16e866
+Author: Keith Packard <keithp@guitar.keithp.com>
+Date: Tue Apr 24 11:37:08 2007 -0700
+
+ CRTC Rotation under XAA wasn't hitting accelerated path.
+
+ The server rotation code is now using the root window in IncludeInferiors
+ mode rather than using the screen pixmap. Change the XAA Composite code
+ to check for this case now.
+
+commit b23eae55c8cdd73e0aba1bf7ced283d402ee6470
+Merge: 31bf269... cebdb8b...
+Author: Keith Packard <keithp@neko.keithp.com>
+Date: Thu Apr 19 20:38:18 2007 -0700
+
+ Merge branch 'origin'
+
commit 31bf269afed0a830e79cbbd9d4b1ee9843af326c
Author: Keith Packard <keithp@neko.keithp.com>
Date: Thu Apr 19 20:03:41 2007 -0700
Update version to 2.0.0
+commit cebdb8bfc6170a0fb441039f4422917fd0c77e70
+Author: Wang Zhenyu <zhenyu.z.wang@intel.com>
+Date: Fri Apr 20 10:54:34 2007 +0800
+
+ EXA: set enabling bits properly for i830
+
+ This was found when debug exa on a 865GV, we should set
+ pipeline state bits properly, otherwise the engine will hang.
+
commit 60e891915af7d0f522c9c3f966599fa07779f7aa
Author: Keith Packard <keithp@neko.keithp.com>
Date: Thu Apr 19 14:02:23 2007 -0700
diff --git a/debian/changelog b/debian/changelog
index 15ddfec..ebe3695 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,3 +1,9 @@
+xserver-xorg-video-intel (2:2.0.0-3) experimental; urgency=low
+
+ * Pull in latest upstream git (updated Xv fix)
+
+ -- Drew Parsons <dparsons@debian.org> Wed, 30 May 2007 12:20:45 +1000
+
xserver-xorg-video-intel (2:2.0.0-2) experimental; urgency=low
[ Julien Cristau ]
commit 516fb73ffee0aea7cf892e6703d37f8ecf52b812
Author: Eric Anholt <eric@anholt.net>
Date: Tue May 29 10:22:25 2007 -0700
Remove README statement that 830M panels are unsupported.
diff --git a/README b/README
index f209baa..bcb0205 100644
--- a/README
+++ b/README
@@ -57,11 +57,6 @@ options.
Known Limitations
-- Bug #8534: i830 laptop panels not supported. The driver
- will fail to recognize them, and only function through VGA output. Two
- partial DVO chip drivers (ivch and ch7017) are included which contain some of
- the code necessary for i830 laptop panel support, but some I2C debugging will
- be necessary to get those drivers to attach.
- No support for "zaphod mode" dualhead. This is the mode in which two
Device sections are placed in the config file, and doesn't support DRI or
many other features. Instead, only "MergedFB-style" dualhead is supported.
commit 72462568da589054828b72ace83232a71636ee73
Author: Eric Anholt <eric@anholt.net>
Date: Tue May 29 10:21:12 2007 -0700
Expand manpage description of outputs supported.
diff --git a/man/intel.man b/man/intel.man
index daf9030..8991619 100644
--- a/man/intel.man
+++ b/man/intel.man
@@ -168,11 +168,28 @@ Enable printing of additional debugging information about modesetting to
the server log.
.PP
-The 830M and newer driver supports RandR 1.2, exposing the VGA, LVDS
-(laptop panel), TMDS (DVI on SDVO/DVO cards), and TV (on 915GM/945GM)
-outputs. Per-output configuration is done through the
-.B Monitor
-section of __xconfigfile__(__filemansuffix__).
+The 830M and newer driver supports the following outputs through RandR 1.2:
+.PP
+.TP
+.BI "VGA"
+Analog VGA output
+.TP
+.BI "LVDS"
+Laptop panel
+.TP
+.BI "TV"
+Integrated TV output
+.TP
+.BI "TMDS-1"
+First DVI SDVO output
+.TP
+.BI "TMDS-2"
+Second DVI SDVO output
+.PP
+SDVO and DVO TV outputs are not supported by the driver at this time.
+.PP
+See __xconfigfile__(__filemansuffix__) for information on associating Monitor
+sections with these outputs for configuration.
.SH "SEE ALSO"
__xservername__(__appmansuffix__), __xconfigfile__(__filemansuffix__), xorgconfig(__appmansuffix__), Xserver(__appmansuffix__), X(__miscmansuffix__)
commit 906b974bfeeed18d79c244ad3db4f5d30e13e4c8
Author: Eric Anholt <eric@anholt.net>
Date: Tue May 29 09:49:08 2007 -0700
Add a fixup to LVDS panel mode detection for 1280x768 panel from text mode.
Apparently some BIOSes will program a small mode with large blanking instead of
using the pannel fitter.
diff --git a/src/i830_lvds.c b/src/i830_lvds.c
index 566c868..ecc91aa 100644
--- a/src/i830_lvds.c
+++ b/src/i830_lvds.c
@@ -496,6 +496,22 @@ i830_lvds_init(ScrnInfoPtr pScrn)
dev_priv->panel_fixed_mode = i830_crtc_mode_get(pScrn, crtc);
if (dev_priv->panel_fixed_mode != NULL)
dev_priv->panel_fixed_mode->type |= M_T_PREFERRED;
+
+ /* Fixup for a 1280x768 panel with the horizontal trimmed
+ * down to 1024 for text mode.
+ */
+ if (!xf86ModesEqual(dev_priv->panel_fixed_mode, bios_mode) &&
+ dev_priv->panel_fixed_mode->HDisplay == 1024 &&
+ dev_priv->panel_fixed_mode->HSyncStart == 1200 &&
+ dev_priv->panel_fixed_mode->HSyncEnd == 1312 &&
+ dev_priv->panel_fixed_mode->HTotal == 1688 &&
+ dev_priv->panel_fixed_mode->VDisplay == 768)
+ {
+ dev_priv->panel_fixed_mode->HDisplay = 1280;
+ dev_priv->panel_fixed_mode->HSyncStart = 1328;
+ dev_priv->panel_fixed_mode->HSyncEnd = 1440;
+ dev_priv->panel_fixed_mode->HTotal = 1688;
+ }
}
}
commit 4b2781291844b61b397e257a0fdb43e964e5f603
Author: Keith Packard <keithp@neko.keithp.com>
Date: Sat May 26 10:09:11 2007 -0700
Mark IVCH as connected when detected
diff --git a/src/ivch/ivch.c b/src/ivch/ivch.c
index e0755c0..eac878e 100644
--- a/src/ivch/ivch.c
+++ b/src/ivch/ivch.c
@@ -219,7 +219,7 @@ ivch_setup (I2CDevPtr d, xf86OutputPtr output)
static xf86OutputStatus
ivch_detect(I2CDevPtr d)
{
- return XF86OutputStatusUnknown;
+ return XF86OutputStatusConnected;
}
static DisplayModePtr
commit 2a365eab0178c28782fba97bdd22365f30ce8963
Author: Keith Packard <keithp@dulcimer.keithp.com>
Date: Sun May 27 12:35:55 2007 -0700
On i830, Pipe B cannot be lit the first time unless Pipe A is running.
I don't understand it, but just like the video overlay, if Pipe A is not
running, Pipe B will not turn the first time it is activated. This
patch restructures the code used for the video overlay to share it
with the crtc commit function.
diff --git a/src/i830.h b/src/i830.h
index 35f8192..76cc6e8 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -216,6 +216,8 @@ extern const char *i830_output_type_names[];
typedef struct _I830CrtcPrivateRec {
int pipe;
+ Bool enabled;
+
/* Lookup table values to be set when the CRTC is enabled */
CARD8 lut_r[256], lut_g[256], lut_b[256];
@@ -579,6 +581,15 @@ extern void I830InitVideo(ScreenPtr pScreen);
extern void i830_crtc_dpms_video(xf86CrtcPtr crtc, Bool on);
#endif
+int
+i830_crtc_pipe (xf86CrtcPtr crtc);
+
+Bool
+i830_pipe_a_require_activate (ScrnInfoPtr scrn);
+
+void
+i830_pipe_a_require_deactivate (ScrnInfoPtr scrn);
+
#ifdef XF86DRI
extern Bool I830Allocate3DMemory(ScrnInfoPtr pScrn, const int flags);
extern void I830SetupMemoryTiling(ScrnInfoPtr pScrn);
diff --git a/src/i830_display.c b/src/i830_display.c
index 023a1aa..adc7479 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -429,6 +429,76 @@ i830PipeSetBase(xf86CrtcPtr crtc, int x, int y)
#endif
}
+/*
+ * Both crtc activation and video overlay enablement on pipe B
+ * will fail on i830 if pipe A is not running. This function
+ * makes sure pipe A is active for these cases
+ */
+
+int
+i830_crtc_pipe (xf86CrtcPtr crtc)
+{
+ if (crtc == NULL)
+ return 0;
+ return ((I830CrtcPrivatePtr) crtc->driver_private)->pipe;
+}
+
+static xf86CrtcPtr
+i830_crtc_for_pipe (ScrnInfoPtr scrn, int pipe)
+{
+ xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn);
+ int c;
+
+ for (c = 0; c < xf86_config->num_crtc; c++)
+ {
+ xf86CrtcPtr crtc = xf86_config->crtc[c];
+ if (i830_crtc_pipe (crtc) == pipe)
+ return crtc;
+ }
+ return NULL;
+}
+
+Bool
+i830_pipe_a_require_activate (ScrnInfoPtr scrn)
+{
+ xf86CrtcPtr crtc = i830_crtc_for_pipe (scrn, 0);
+ /* VESA 640x480x72Hz mode to set on the pipe */
+ static DisplayModeRec mode = {
+ NULL, NULL, "640x480", MODE_OK, M_T_DEFAULT,
+ 31500,
+ 640, 664, 704, 832, 0,
+ 480, 489, 491, 520, 0,
+ V_NHSYNC | V_NVSYNC,
+ 0, 0,
+ 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
+ FALSE, FALSE, 0, NULL, 0, 0.0, 0.0
+ };
+
+ if (!crtc)
+ return FALSE;
+ if (crtc->enabled)
+ return FALSE;
+ xf86SetModeCrtc (&mode, INTERLACE_HALVE_V);
+ crtc->funcs->mode_set (crtc, &mode, &mode, 0, 0);
+ crtc->funcs->dpms (crtc, DPMSModeOn);
+ return TRUE;
+}
+
+void
+i830_pipe_a_require_deactivate (ScrnInfoPtr scrn)
+{
+ xf86CrtcPtr crtc = i830_crtc_for_pipe (scrn, 0);
+
+ if (!crtc)
+ return;
+ if (crtc->enabled)
+ return;
+ crtc->funcs->dpms (crtc, DPMSModeOff);
+ return;
+}
+
+
/**
* Sets the power management mode of the pipe and plane.
*
@@ -593,9 +663,19 @@ i830_crtc_prepare (xf86CrtcPtr crtc)
static void
i830_crtc_commit (xf86CrtcPtr crtc)
{
+ I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
+ Bool deactivate = FALSE;
+
+ if (!intel_crtc->enabled && intel_crtc->pipe != 0)
+ deactivate = i830_pipe_a_require_activate (crtc->scrn);
+
+ intel_crtc->enabled = TRUE;
+
crtc->funcs->dpms (crtc, DPMSModeOn);
if (crtc->scrn->pScreen != NULL)
xf86_reload_cursors (crtc->scrn->pScreen);
+ if (deactivate)
+ i830_pipe_a_require_deactivate (crtc->scrn);
}
void
diff --git a/src/i830_video.c b/src/i830_video.c
index d57519b..4517975 100644
--- a/src/i830_video.c
+++ b/src/i830_video.c
@@ -382,6 +382,7 @@ i830_overlay_on(ScrnInfoPtr pScrn)
I830Ptr pI830 = I830PTR(pScrn);
I830OverlayRegPtr overlay = I830OVERLAYREG(pI830);
I830PortPrivPtr pPriv = pI830->adaptor->pPortPrivates[0].ptr;
+ Bool deactivate = FALSE;
xf86CrtcPtr crtc0 = NULL;
if (*pI830->overlayOn)
@@ -393,30 +394,12 @@ i830_overlay_on(ScrnInfoPtr pScrn)
* screen. Light up pipe A in this case to provide a clock
* for the overlay hardware
*/
- if (!pPriv->started_video)
+ if (pPriv->current_crtc &&
+ i830_crtc_pipe (pPriv->current_crtc) != 0 &&
+ !pPriv->started_video)
{
pPriv->started_video = TRUE;
- crtc0 = I830CrtcForPipe (pScrn, 0);
- if (!crtc0->enabled)
- {
- /* VESA 640x480x72Hz mode to set on the pipe */
- static DisplayModeRec mode = {
- NULL, NULL, "640x480", MODE_OK, M_T_DEFAULT,
- 31500,
- 640, 664, 704, 832, 0,
- 480, 489, 491, 520, 0,
- V_NHSYNC | V_NVSYNC,
- 0, 0,
- 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0,
- FALSE, FALSE, 0, NULL, 0, 0.0, 0.0
- };
- xf86SetModeCrtc (&mode, INTERLACE_HALVE_V);
- crtc0->funcs->mode_set (crtc0, &mode, &mode, 0, 0);
- crtc0->funcs->dpms (crtc0, DPMSModeOn);
- }
- else
- crtc0 = NULL;
+ deactivate = i830_pipe_a_require_activate (pScrn);
}
overlay->OCMD &= ~OVERLAY_ENABLE;
@@ -435,8 +418,8 @@ i830_overlay_on(ScrnInfoPtr pScrn)
* If we turned pipe A on up above, turn it
* back off
*/
- if (crtc0)
- crtc0->funcs->dpms (crtc0, DPMSModeOff);
+ if (deactivate)
+ i830_pipe_a_require_deactivate (pScrn);
OVERLAY_DEBUG("overlay_on\n");
*pI830->overlayOn = TRUE;
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