Re: FYI: www.debian.org/ports/mips/cpu

[Martin Schulze <joey@finlandia.infodrom.north.de>]

Paul Kasper wrote:
> >From the manufacturer's page:
> http://www.pmc-sierra.com/products/details/rm5261a/
> 
> Vendor/Name   Date   Clock      ICache  DCache  TLB   ISA   Specials
>                                                             (all have FPU)
> QED RM5231      -    150-250MHz   32K     32K    -     IV   32-bit external bus
> QED RM5231A     -    250-300MHz   32K     32K    -     IV   32-bit external bus
> QED RM5261      -    200-266MHz   32K     32K    -     IV   64-bit external bus
> QED RM5261A     -    250-350MHz   32K     32K    -     IV   64-bit external bus
> QED RM5271      -    250-300MHz   32K     32K    -     IV   64-bit ext. bus, external L2 cache

Thanks, info updated.

lolo: this is for you:

> I also believe that the RM52x0 processors are essentially phased out. 
> They had 16K/16K of cache relative to their RM52x1 counterparts.
> 
> I am unclear as to whether there really is an RM5271A.  However, the
> RM5271 is supposed to be replaced by the RM7000A for current designs.
> 
> Hope this is of some help in your next page update.

Definitively.

Regards,

	Joey

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