Bug#905952: ITP: netgen-lvs -- Netlist comparison - Layout vs Schematic (LVS)

[Ruben Undheim <ruben.undheim@gmail.com>]

Package: wnpp
Severity: wishlist
Owner: Ruben Undheim <ruben.undheim@gmail.com>

* Package name    : netgen-lvs
  Version         : 1.5.105
  Upstream Author : Tim Edwards
* URL             : http://opencircuitdesign.com/netgen/
* License         : GPL
  Programming Lang: C
  Description     : Netlist comparison - Layout vs Schematic (LVS)


Netgen is a tool for comparing netlists, a process known as LVS, which stands
for "Layout vs. Schematic". This is an important step in the integrated circuit
design flow, ensuring that the geometry that has been laid out matches the
expected circuit. Very small circuits can bypass this step by confirming
circuit operation through extraction and simulation. Very large digital
circuits are usually generated by tools from high-level descriptions, using
compilers that ensure the correct layout geometry. The greatest need for LVS is
in large analog or mixed-signal circuits that cannot be simulated in reasonable
time. Even for small circuits, LVS can be done much faster than simulation, and
provides feedback that makes it easier to find an error than does a simulation.

The source package name "netgen" is reserved by another package, so reserving
"netgen-lvs" for this program.

I plan to maintain it in the Debian Electronics team.