Quoting shell command lines in Makefiles

["Michael D. Crawford" <crawford@goingware.com>]

I'm using CPPUnit (http://cppunit.sourceforge.net/cppunit-wiki) to make 
unit tests for each class in my C++ program.  I can say "make test" to 
have them all built and executed.  The "testexec" target builds the unit 
test executables without running them.  I started with something like this:

TESTS=EndOfFile.t \
	YetAnotherClass.t

test: testexec
	./EndOfFile.t
	./YetAnotherClass.t

testexec: $(TESTS)
	(... commands to build the test executables)

I thought I'd be clever and use the shell "for" control construct to 
execute all the tests that are named in $(TESTS) rather than listing 
them explicitly.  But it doesn't work because make sees the $ and 
expands it before passing the command line to the shell:

test: testexec
	for test in $(TESTS); do ./$test; done

gives me:

 /bin/sh: ./est: No such file or directory

$t expands to "", leaving "est".

I've tried all manner of backslashes and quotes to try to get the string 
"$test" passed literraly to the subshell that make executes, but always 
Make eats it.  The *must* be a way to do what I want.  Is there?

References to The Fine Manual are fine.

--
Mike Crawford
crawford@goingware.com

   Read "GoingWare's Bag of Programming Tricks" at:
           http://www.goingware.com/tips/