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makefile problem



Can anyone help me out with the a makefile problem?

I have a large number of subdirectories filled with simple sample programs. I want to do the following

   for each subdirectory {
     cd subdirectory
     if Makefile exists {
       make
     } else {
       for each .c file  {
         $(CC) X.c -o X
       }
     }

Is there any way I can do this just with makefiles (i.e. no batch scripts)? It's not hard for me to make the rule
   .c.exe:
     $(CC) $< -o $@
but how to I tell make it should invoke this rule on all the *.c files present? I can't list them as targets because I don't know their names.



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