Makefile gone crazy - urgent

[Micha Feigin <michf@math.tau.ac.il>]

I have a makefile for a project I'm writing. In it I add values to a
variable CFLAGS according to whether certain variables are defined.
for example:
ifdef NEWCPPH
CFLAGS := $(CFLAGS) -DNEWCPPH
endif

the problem is that for the last one it inserts the three last letters
twice. So the command comes out like this:
g++ -o input.o -Wall -pedantic -g -DNEWCPPHPPH  input.cpp

How do i solve the problem?

Here is the full makefile:
CC = g++
CFLAGS = -Wall -pedantic
EXEC = project
OBJ = $(patsubst %.cpp,%.o,$(wildcard *.cpp))

ifeq ($(strip $(DEBUGLVL)),0)
CFLAGS := $(CFLAGS) -DNDEBUG
else
ifeq ($(strip $(DEBUGLVL)),2)
CFLAGS := $(CFLAGS) -g
endif
endif

ifdef OPTIMIZE
CFLAGS := $(CFLAGS) -O2
endif

ifdef PROFILE
CFLAGS := $(CFLAGS) -p
endif

ifdef NEWCPPH
CFLAGS := $(CFLAGS) -DNEWCPPH
endif


%.o : CFLAGS := $(CFLAGS) -c 

%.o : %.cpp
	$(CC) -o $@ $(CFLAGS) $<




all: $(EXEC)

$(EXEC): $(OBJ)
	$(CC) -o $@ $(CFLAGS) $^

main.o: main.cpp input.h

input.o: input.cpp input.h

# vector-data.o: vector-data.cpp vector-data.h

clean:
	rm -f $(OBJ) $(EXEC) core *~