Re: [PATCH] sparc64: Handle extremely large kernel TSB range flushes sanely.
From: James Clarke <jrtc27@jrtc27.com>
Date: Wed, 26 Oct 2016 17:58:16 +0100
>> On 26 Oct 2016, at 16:54, David Miller <davem@davemloft.net> wrote:
>>
>> From: James Clarke <jrtc27@jrtc27.com>
>> Date: Wed, 26 Oct 2016 09:28:05 +0100
>>
>>> Any progress on TLB flushing?
>>
>> I was half-way through an implementation when I noticed that
>> hypervisor TLB flush handler relative branch bug I posted the
>> fix for last night.
>
> Yep, I saw that. Looks like you forgot to update the comment on
> __hypervisor_flush_tlb_pending; it still says 16 insns rather than 27.
Fixed, thanks.
And now I noticed that the cross-call hypervisor tlb flush assembler
has the bug and needs to be fixed too...
>> I'll keep plugging away at it today.
>
> Great; let me know if you need a guinea pig, as itʼs pretty easy for me to
> reproduce.
Will do, what kind of cpus do you have?
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