Debian on SparcStation 10 and HyperSparc

[Jean Gervers <jean@gervers.com>]

Hi at all,

does Debian currently support ROSS dual Processor boards?

> cpu0 at mainbus0: mid 8: RT620/625 @ 100 MHz, on-chip FPU
> cpu0: 256K byte write-back, 64 bytes/line, sw flush: cache enabled
> cpu1 at mainbus0: mid 9: RT620/625 @ 100 MHz, on-chip FPU
> cpu1: 256K byte write-back, 64 bytes/line, sw flush: cache enabled
> cpu2 at mainbus0: mid 10: RT620/625 @ 90 MHz, on-chip FPU
> cpu2: 256K byte write-back, 64 bytes/line, sw flush: cache enabled
> cpu3 at mainbus0: mid 11: RT620/625 @ 90 MHz, on-chip FPU
> cpu3: 256K byte write-back, 64 bytes/line, sw flush: cache enabled

Please post answers to my eMail Address, I'am not a member of this
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Jean