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Re: reiserfs empirical study (very long)

> > Sane architectures (sparc64, ppc) have load/store with byte swap
> > instructions and if reiserfs is using them you shouldnt see a
> > performance penalty.
> > 
> > cpu_to_le* etc make use of them.
> It does use them, but are these functions inlines with just one
> instruction?  If not, then there is a penalty.  These handy
> instructions just make that penalty a little less painful.

They are inline, yes, and gcc can optimize the code down to the no
penalty case. Just compile with -save-temps and look at the code.

Btw, we do this for every PCI bus access on ppc or sparc, not only
for filesystem metadata. We'd be pissed if this wouldn't work without

Eddie C. Dost

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