Source: llvm-toolchain-18 Version: 1:18.1.8-9 Severity: important Tags: patch User: debian-riscv@lists.debian.org Usertags: riscv64 X-Debbugs-Cc: debian-riscv@lists.debian.org, smcv@debian.org, aurel32@debian.org, i@hack3r.moe Dear Maintainer, As smcv has reported it in #1080435, mesa/24.2.1-3 has a ftbfs issue due to: ``` JIT session error: No HI20 PCREL relocation type be found for LO12 PCREL relocation type ``` Meantime aurel32 found the issue from lomiri-online-accounts also, see: https://buildd.debian.org/status/fetch.php?pkg=lomiri-online-accounts&arch=riscv64&ver=0.15-1&stamp=1725113110&raw=0 Thanks to Eric Long's headup to backport two commit and I built it on my local riscv64 hardware and can confrim that lomiri-online-accounts can be built with the llvm. So I think we can backport these two commits to Debian llvm. I'm not very familiar with llvm's maintenance workflow, so do I need to backport this to all llvm versions? Please let me know if any issues. -- Regards, -- Bo YU
diff -Nru llvm-toolchain-18-18.1.8/debian/changelog llvm-toolchain-18-18.1.8/debian/changelog
--- llvm-toolchain-18-18.1.8/debian/changelog 2024-08-04 02:07:17.000000000 +0800
+++ llvm-toolchain-18-18.1.8/debian/changelog 2024-09-04 16:39:07.000000000 +0800
@@ -1,3 +1,10 @@
+llvm-toolchain-18 (1:18.1.8-9.1) UNRELEASED; urgency=medium
+
+ * Non-maintainer upload.
+ * Backport two commits to fix riscv64 issue. (Closes: #1080435)
+
+ -- Bo YU <tsu.yubo@gmail.com> Wed, 04 Sep 2024 16:39:07 +0800
+
llvm-toolchain-18 (1:18.1.8-9) unstable; urgency=medium
[ Gianfranco Costamagna ]
diff -Nru llvm-toolchain-18-18.1.8/debian/patches/llvm-toolchain-17-sve-types-aux-target.diff llvm-toolchain-18-18.1.8/debian/patches/llvm-toolchain-17-sve-types-aux-target.diff
--- llvm-toolchain-18-18.1.8/debian/patches/llvm-toolchain-17-sve-types-aux-target.diff 2024-07-30 16:46:24.000000000 +0800
+++ llvm-toolchain-18-18.1.8/debian/patches/llvm-toolchain-17-sve-types-aux-target.diff 2024-09-04 16:34:20.000000000 +0800
@@ -12,11 +12,9 @@
clang/test/PCH/aarch64-sve-types.c | 2 ++
3 files changed, 7 insertions(+), 2 deletions(-)
-Index: llvm-toolchain-17-17.0.6/clang/lib/AST/ASTContext.cpp
-===================================================================
---- llvm-toolchain-17-17.0.6.orig/clang/lib/AST/ASTContext.cpp
-+++ llvm-toolchain-17-17.0.6/clang/lib/AST/ASTContext.cpp
-@@ -1353,7 +1353,8 @@ void ASTContext::InitBuiltinTypes(const
+--- a/clang/lib/AST/ASTContext.cpp
++++ b/clang/lib/AST/ASTContext.cpp
+@@ -1353,7 +1353,8 @@
#include "clang/Basic/OpenCLExtensionTypes.def"
}
@@ -26,11 +24,9 @@
#define SVE_TYPE(Name, Id, SingletonId) \
InitBuiltinType(SingletonId, BuiltinType::Id);
#include "clang/Basic/AArch64SVEACLETypes.def"
-Index: llvm-toolchain-17-17.0.6/clang/lib/Sema/Sema.cpp
-===================================================================
---- llvm-toolchain-17-17.0.6.orig/clang/lib/Sema/Sema.cpp
-+++ llvm-toolchain-17-17.0.6/clang/lib/Sema/Sema.cpp
-@@ -424,7 +424,9 @@ void Sema::Initialize() {
+--- a/clang/lib/Sema/Sema.cpp
++++ b/clang/lib/Sema/Sema.cpp
+@@ -424,7 +424,9 @@
#include "clang/Basic/OpenCLExtensionTypes.def"
}
@@ -41,10 +37,8 @@
#define SVE_TYPE(Name, Id, SingletonId) \
addImplicitTypedef(Name, Context.SingletonId);
#include "clang/Basic/AArch64SVEACLETypes.def"
-Index: llvm-toolchain-17-17.0.6/clang/test/PCH/aarch64-sve-types.c
-===================================================================
---- llvm-toolchain-17-17.0.6.orig/clang/test/PCH/aarch64-sve-types.c
-+++ llvm-toolchain-17-17.0.6/clang/test/PCH/aarch64-sve-types.c
+--- a/clang/test/PCH/aarch64-sve-types.c
++++ b/clang/test/PCH/aarch64-sve-types.c
@@ -1,6 +1,8 @@
// RUN: %clang_cc1 -triple aarch64-linux-gnu -emit-pch -o %t %s
// RUN: %clang_cc1 -triple aarch64-linux-gnu -include-pch %t \
diff -Nru llvm-toolchain-18-18.1.8/debian/patches/rv64-fix-mm-leak.diff llvm-toolchain-18-18.1.8/debian/patches/rv64-fix-mm-leak.diff
--- llvm-toolchain-18-18.1.8/debian/patches/rv64-fix-mm-leak.diff 1970-01-01 08:00:00.000000000 +0800
+++ llvm-toolchain-18-18.1.8/debian/patches/rv64-fix-mm-leak.diff 2024-09-04 16:38:55.000000000 +0800
@@ -0,0 +1,33 @@
+From 3d67cf681a728e4cf0ab9947c0dd07539dda8b74 Mon Sep 17 00:00:00 2001
+From: Min-Yih Hsu <min.hsu@sifive.com>
+Date: Fri, 16 Feb 2024 16:19:56 -0800
+Subject: [PATCH] [JITLink] Always unmap standard segments in
+ InProcessMemoryManager::deallocate (#81943)
+
+Right now InProcessMemoryManager only releases a standard segment (via
+sys::Memory::releaseMappedMemory) in `deallocate` when there is a
+DeallocAction associated, leaving residual memory pages in the process
+until termination.
+Despite being a de facto memory leak, it won't cause a major issue if
+users only create a single LLJIT instance per process, which is the most
+common use cases. It will, however, drain virtual memory pages if we
+create thousands of ephemeral LLJIT instances in the same process.
+
+This patch fixes this issue by releasing every standard segments
+regardless of the attached DeallocAction.
+---
+ llvm/lib/ExecutionEngine/JITLink/JITLinkMemoryManager.cpp | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+--- a/llvm/lib/ExecutionEngine/JITLink/JITLinkMemoryManager.cpp
++++ b/llvm/lib/ExecutionEngine/JITLink/JITLinkMemoryManager.cpp
+@@ -449,8 +449,7 @@
+ for (auto &Alloc : Allocs) {
+ auto *FA = Alloc.release().toPtr<FinalizedAllocInfo *>();
+ StandardSegmentsList.push_back(std::move(FA->StandardSegments));
+- if (!FA->DeallocActions.empty())
+- DeallocActionsList.push_back(std::move(FA->DeallocActions));
++ DeallocActionsList.push_back(std::move(FA->DeallocActions));
+ FA->~FinalizedAllocInfo();
+ FinalizedAllocInfos.Deallocate(FA);
+ }
diff -Nru llvm-toolchain-18-18.1.8/debian/patches/rv64-fix-PCREL_HI20-issue.diff llvm-toolchain-18-18.1.8/debian/patches/rv64-fix-PCREL_HI20-issue.diff
--- llvm-toolchain-18-18.1.8/debian/patches/rv64-fix-PCREL_HI20-issue.diff 1970-01-01 08:00:00.000000000 +0800
+++ llvm-toolchain-18-18.1.8/debian/patches/rv64-fix-PCREL_HI20-issue.diff 2024-09-04 16:38:06.000000000 +0800
@@ -0,0 +1,104 @@
+From 78f39dc70c1feaea5130b90ea3fb7b3ddd62446b Mon Sep 17 00:00:00 2001
+From: Jonas Hahnfeld <hahnjo@hahnjo.de>
+Date: Mon, 12 Feb 2024 19:45:52 +0100
+Subject: [PATCH] [JITLink][RISCV] Use hashmap to find PCREL_HI20 edge (#78849)
+
+As noted in issues #68594 and #73935, `JITLink/RISCV/ELF_ehframe.s`
+fails with libstdc++'s expensive checks because `getRISCVPCRelHi20`
+calls `std::equal_range` on the edges which may not be ordered by their
+offset. Instead let `ELFJITLinker_riscv` build a hashmap of all edges
+with type `R_RISCV_PCREL_HI20` that can be looked up in constant time.
+
+Bugs: https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=1080435
+
+Closes #73935
+---
+ .../lib/ExecutionEngine/JITLink/ELF_riscv.cpp | 68 ++++++++++---------
+ 1 file changed, 35 insertions(+), 33 deletions(-)
+
+--- a/llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp
++++ b/llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp
+@@ -133,38 +133,6 @@
+ namespace llvm {
+ namespace jitlink {
+
+-static Expected<const Edge &> getRISCVPCRelHi20(const Edge &E) {
+- using namespace riscv;
+- assert((E.getKind() == R_RISCV_PCREL_LO12_I ||
+- E.getKind() == R_RISCV_PCREL_LO12_S) &&
+- "Can only have high relocation for R_RISCV_PCREL_LO12_I or "
+- "R_RISCV_PCREL_LO12_S");
+-
+- const Symbol &Sym = E.getTarget();
+- const Block &B = Sym.getBlock();
+- orc::ExecutorAddrDiff Offset = Sym.getOffset();
+-
+- struct Comp {
+- bool operator()(const Edge &Lhs, orc::ExecutorAddrDiff Offset) {
+- return Lhs.getOffset() < Offset;
+- }
+- bool operator()(orc::ExecutorAddrDiff Offset, const Edge &Rhs) {
+- return Offset < Rhs.getOffset();
+- }
+- };
+-
+- auto Bound =
+- std::equal_range(B.edges().begin(), B.edges().end(), Offset, Comp{});
+-
+- for (auto It = Bound.first; It != Bound.second; ++It) {
+- if (It->getKind() == R_RISCV_PCREL_HI20)
+- return *It;
+- }
+-
+- return make_error<JITLinkError>(
+- "No HI20 PCREL relocation type be found for LO12 PCREL relocation type");
+-}
+-
+ static uint32_t extractBits(uint32_t Num, unsigned Low, unsigned Size) {
+ return (Num & (((1ULL << Size) - 1) << Low)) >> Low;
+ }
+@@ -184,9 +152,43 @@
+ public:
+ ELFJITLinker_riscv(std::unique_ptr<JITLinkContext> Ctx,
+ std::unique_ptr<LinkGraph> G, PassConfiguration PassConfig)
+- : JITLinker(std::move(Ctx), std::move(G), std::move(PassConfig)) {}
++ : JITLinker(std::move(Ctx), std::move(G), std::move(PassConfig)) {
++ JITLinkerBase::getPassConfig().PostAllocationPasses.push_back(
++ [this](LinkGraph &G) { return gatherRISCVPCRelHi20(G); });
++ }
+
+ private:
++ DenseMap<std::pair<const Block *, orc::ExecutorAddrDiff>, const Edge *>
++ RelHi20;
++
++ Error gatherRISCVPCRelHi20(LinkGraph &G) {
++ for (Block *B : G.blocks())
++ for (Edge &E : B->edges())
++ if (E.getKind() == R_RISCV_PCREL_HI20)
++ RelHi20[{B, E.getOffset()}] = &E;
++
++ return Error::success();
++ }
++
++ Expected<const Edge &> getRISCVPCRelHi20(const Edge &E) const {
++ using namespace riscv;
++ assert((E.getKind() == R_RISCV_PCREL_LO12_I ||
++ E.getKind() == R_RISCV_PCREL_LO12_S) &&
++ "Can only have high relocation for R_RISCV_PCREL_LO12_I or "
++ "R_RISCV_PCREL_LO12_S");
++
++ const Symbol &Sym = E.getTarget();
++ const Block &B = Sym.getBlock();
++ orc::ExecutorAddrDiff Offset = Sym.getOffset();
++
++ auto It = RelHi20.find({&B, Offset});
++ if (It != RelHi20.end())
++ return *It->second;
++
++ return make_error<JITLinkError>("No HI20 PCREL relocation type be found "
++ "for LO12 PCREL relocation type");
++ }
++
+ Error applyFixup(LinkGraph &G, Block &B, const Edge &E) const {
+ using namespace riscv;
+ using namespace llvm::support;
diff -Nru llvm-toolchain-18-18.1.8/debian/patches/series llvm-toolchain-18-18.1.8/debian/patches/series
--- llvm-toolchain-18-18.1.8/debian/patches/series 2024-08-04 02:07:17.000000000 +0800
+++ llvm-toolchain-18-18.1.8/debian/patches/series 2024-09-04 16:37:34.000000000 +0800
@@ -154,3 +154,5 @@
rename-libllvm.diff
link-with-package-metadata.diff
llvm-toolchain-17-sve-types-aux-target.diff
+rv64-fix-PCREL_HI20-issue.diff
+rv64-fix-mm-leak.diff
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