Re: Reading Machine ISA

[Bo YU <tsu.yubo@gmail.com>]

Hi,

On Fri, Sep 2, 2022 at 7:46 PM Mathieu Malaterre <malat@debian.org> wrote:
>
> Dear riscv64 porters,
>
> I would like to check if the underlying riscv64 arch is supporting
> Vector Extension 1.0. I was told this can be done by checking the misa
> value.
>
> However I am getting a SIGILL (again!) with a simple example such as
> this one (*)
>
> What did I missed here ? Steps:
>
> $ gcc -g3 -ggdb3 -Wall -Wextra misa.c  && ./a.out
> Illegal instruction
>
> $ gdb ./a.out
> [...]
> (gdb) r
> Starting program: /home/malaterre/a.out
> [Thread debugging using libthread_db enabled]
> Using host libthread_db library "/lib/riscv64-linux-gnu/libthread_db.so.1".
>
> Program received signal SIGILL, Illegal instruction.
> csr_read_misa () at misa.c:18
> 18          __asm__ volatile ("csrr    %0, misa"
> (gdb) bt full
> #0  csr_read_misa () at misa.c:18
>         value = 0
> #1  0x0000002aaaaaa68e in main () at misa.c:27
>         misa = 99
> (gdb) i all-r
[...]
>
> With
>
> $ cat misa.c
> #include <stdint.h>
> #include <stdio.h>
>
> #if __riscv_xlen==32
> typedef uint32_t uint_xlen_t;
> #elif __riscv_xlen==64
> typedef uint64_t uint_xlen_t;
> #else
> #error "Unknown XLEN"
> #endif
>
> #if !defined(__riscv_zicsr)
> #error "-march must include zicsr to access CSRs"
> #endif
>
> static inline uint_xlen_t csr_read_misa(void) {
>     uint_xlen_t value;
>     __asm__ volatile ("csrr    %0, misa"
>                       : "=r" (value)  /* output : register */
>                       : /* input : none */
>                       : /* clobbers: none */);
>     return value;
> }
>
> int main()
> {
>   uint_xlen_t misa = csr_read_misa() ;
>   printf("%lu\n", misa );
> }
>
Hi,

First of all, I am not RV SPEC expert. The next tip I took from an RV spec
expert.

The misa instruction[0](3.1.1 Machine ISA Register misa) should be a machine
instruction, and this program tries to access the instruction in user space.

[0]: https://docs.google.com/viewer?url=https%3A%2F%2Fgithub.com%2Friscv%2Friscv-isa-manual%2Freleases%2Fdownload%2FPriv-v1.12%2Friscv-privileged-20211203.pdf&embedded=true&chrome=false&dov=1

BR,
Bo YU