Re: [PATCH] nspr: Please add support for the RISC-V architecture
Hello,
attached is an updated packaging patch adding support for the
RISC-V architecture to nspr package version 2:4.19-1. The
original patch that had been submitted to this bug had been for
package version 2:4.18-1 and doesn't apply cleanly on version
2:4.19-1.
In addition to the updated packaging patch I have also attached
a "bare" patch directly against upstream.
Regards,
Karsten
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diff -Nur nspr-4.19.orig/debian/patches/Add-type-definitions-for-the-RISC-V-architecture.patch nspr-4.19/debian/patches/Add-type-definitions-for-the-RISC-V-architecture.patch
--- nspr-4.19.orig/debian/patches/Add-type-definitions-for-the-RISC-V-architecture.patch 1970-01-01 00:00:00.000000000 +0000
+++ nspr-4.19/debian/patches/Add-type-definitions-for-the-RISC-V-architecture.patch 2018-04-09 18:37:58.232415922 +0000
@@ -0,0 +1,131 @@
+From d4b3321b5eeb7976a8ca2169128a3754e3b2a8bd Mon Sep 17 00:00:00 2001
+From: Karsten Merker <merker@debian.org>
+Date: Fri, 9 Mar 2018 19:38:12 +0100
+Subject: [PATCH] Add type definitions for the RISC-V architecture.
+
+---
+ nspr/pr/include/md/_linux.cfg | 92 +++++++++++++++++++++++++++++++++++++++++++
+ nspr/pr/include/md/_linux.h | 4 ++
+ 2 files changed, 96 insertions(+)
+
+diff --git a/nspr/pr/include/md/_linux.cfg b/nspr/pr/include/md/_linux.cfg
+index b4c0ed4..afc407c 100644
+--- a/nspr/pr/include/md/_linux.cfg
++++ b/nspr/pr/include/md/_linux.cfg
+@@ -1020,6 +1020,98 @@
+ #define PR_BYTES_PER_WORD_LOG2 2
+ #define PR_BYTES_PER_DWORD_LOG2 3
+
++#elif defined(__riscv) && (__riscv_xlen == 32)
++
++#undef IS_BIG_ENDIAN
++#define IS_LITTLE_ENDIAN 1
++#undef IS_64
++
++#define PR_BYTES_PER_BYTE 1
++#define PR_BYTES_PER_SHORT 2
++#define PR_BYTES_PER_INT 4
++#define PR_BYTES_PER_INT64 8
++#define PR_BYTES_PER_LONG 4
++#define PR_BYTES_PER_FLOAT 4
++#define PR_BYTES_PER_DOUBLE 8
++#define PR_BYTES_PER_WORD 4
++#define PR_BYTES_PER_DWORD 8
++
++#define PR_BITS_PER_BYTE 8
++#define PR_BITS_PER_SHORT 16
++#define PR_BITS_PER_INT 32
++#define PR_BITS_PER_INT64 64
++#define PR_BITS_PER_LONG 32
++#define PR_BITS_PER_FLOAT 32
++#define PR_BITS_PER_DOUBLE 64
++#define PR_BITS_PER_WORD 32
++
++#define PR_BITS_PER_BYTE_LOG2 3
++#define PR_BITS_PER_SHORT_LOG2 4
++#define PR_BITS_PER_INT_LOG2 5
++#define PR_BITS_PER_INT64_LOG2 6
++#define PR_BITS_PER_LONG_LOG2 5
++#define PR_BITS_PER_FLOAT_LOG2 5
++#define PR_BITS_PER_DOUBLE_LOG2 6
++#define PR_BITS_PER_WORD_LOG2 5
++
++#define PR_ALIGN_OF_SHORT 2
++#define PR_ALIGN_OF_INT 4
++#define PR_ALIGN_OF_LONG 4
++#define PR_ALIGN_OF_INT64 8
++#define PR_ALIGN_OF_FLOAT 4
++#define PR_ALIGN_OF_DOUBLE 8
++#define PR_ALIGN_OF_POINTER 4
++#define PR_ALIGN_OF_WORD 4
++
++#define PR_BYTES_PER_WORD_LOG2 2
++#define PR_BYTES_PER_DWORD_LOG2 3
++
++#elif defined(__riscv) && (__riscv_xlen == 64)
++
++#undef IS_BIG_ENDIAN
++#define IS_LITTLE_ENDIAN 1
++#define IS_64
++
++#define PR_BYTES_PER_BYTE 1
++#define PR_BYTES_PER_SHORT 2
++#define PR_BYTES_PER_INT 4
++#define PR_BYTES_PER_INT64 8
++#define PR_BYTES_PER_LONG 8
++#define PR_BYTES_PER_FLOAT 4
++#define PR_BYTES_PER_DOUBLE 8
++#define PR_BYTES_PER_WORD 8
++#define PR_BYTES_PER_DWORD 8
++
++#define PR_BITS_PER_BYTE 8
++#define PR_BITS_PER_SHORT 16
++#define PR_BITS_PER_INT 32
++#define PR_BITS_PER_INT64 64
++#define PR_BITS_PER_LONG 64
++#define PR_BITS_PER_FLOAT 32
++#define PR_BITS_PER_DOUBLE 64
++#define PR_BITS_PER_WORD 64
++
++#define PR_BITS_PER_BYTE_LOG2 3
++#define PR_BITS_PER_SHORT_LOG2 4
++#define PR_BITS_PER_INT_LOG2 5
++#define PR_BITS_PER_INT64_LOG2 6
++#define PR_BITS_PER_LONG_LOG2 6
++#define PR_BITS_PER_FLOAT_LOG2 5
++#define PR_BITS_PER_DOUBLE_LOG2 6
++#define PR_BITS_PER_WORD_LOG2 6
++
++#define PR_ALIGN_OF_SHORT 2
++#define PR_ALIGN_OF_INT 4
++#define PR_ALIGN_OF_LONG 8
++#define PR_ALIGN_OF_INT64 8
++#define PR_ALIGN_OF_FLOAT 4
++#define PR_ALIGN_OF_DOUBLE 8
++#define PR_ALIGN_OF_POINTER 8
++#define PR_ALIGN_OF_WORD 8
++
++#define PR_BYTES_PER_WORD_LOG2 3
++#define PR_BYTES_PER_DWORD_LOG2 3
++
+ #else
+
+ #error "Unknown CPU architecture"
+diff --git a/nspr/pr/include/md/_linux.h b/nspr/pr/include/md/_linux.h
+index b4b298b..2370ab8 100644
+--- a/nspr/pr/include/md/_linux.h
++++ b/nspr/pr/include/md/_linux.h
+@@ -57,6 +57,10 @@
+ #define _PR_SI_ARCHITECTURE "m32r"
+ #elif defined(__or1k__)
+ #define _PR_SI_ARCHITECTURE "or1k"
++#elif defined(__riscv) && (__riscv_xlen == 32)
++#define _PR_SI_ARCHITECTURE "riscv32"
++#elif defined(__riscv) && (__riscv_xlen == 64)
++#define _PR_SI_ARCHITECTURE "riscv64"
+ #else
+ #error "Unknown CPU architecture"
+ #endif
+--
+2.11.0
+
diff -Nur nspr-4.19.orig/debian/patches/series nspr-4.19/debian/patches/series
--- nspr-4.19.orig/debian/patches/series 1970-01-01 00:00:00.000000000 +0000
+++ nspr-4.19/debian/patches/series 2018-04-09 18:37:58.240415763 +0000
@@ -0,0 +1 @@
+Add-type-definitions-for-the-RISC-V-architecture.patch
>From d4b3321b5eeb7976a8ca2169128a3754e3b2a8bd Mon Sep 17 00:00:00 2001
From: Karsten Merker <merker@debian.org>
Date: Fri, 9 Mar 2018 19:38:12 +0100
Subject: [PATCH] Add type definitions for the RISC-V architecture.
---
nspr/pr/include/md/_linux.cfg | 92 +++++++++++++++++++++++++++++++++++++++++++
nspr/pr/include/md/_linux.h | 4 ++
2 files changed, 96 insertions(+)
diff --git a/nspr/pr/include/md/_linux.cfg b/nspr/pr/include/md/_linux.cfg
index b4c0ed4..afc407c 100644
--- a/nspr/pr/include/md/_linux.cfg
+++ b/nspr/pr/include/md/_linux.cfg
@@ -1020,6 +1020,98 @@
#define PR_BYTES_PER_WORD_LOG2 2
#define PR_BYTES_PER_DWORD_LOG2 3
+#elif defined(__riscv) && (__riscv_xlen == 32)
+
+#undef IS_BIG_ENDIAN
+#define IS_LITTLE_ENDIAN 1
+#undef IS_64
+
+#define PR_BYTES_PER_BYTE 1
+#define PR_BYTES_PER_SHORT 2
+#define PR_BYTES_PER_INT 4
+#define PR_BYTES_PER_INT64 8
+#define PR_BYTES_PER_LONG 4
+#define PR_BYTES_PER_FLOAT 4
+#define PR_BYTES_PER_DOUBLE 8
+#define PR_BYTES_PER_WORD 4
+#define PR_BYTES_PER_DWORD 8
+
+#define PR_BITS_PER_BYTE 8
+#define PR_BITS_PER_SHORT 16
+#define PR_BITS_PER_INT 32
+#define PR_BITS_PER_INT64 64
+#define PR_BITS_PER_LONG 32
+#define PR_BITS_PER_FLOAT 32
+#define PR_BITS_PER_DOUBLE 64
+#define PR_BITS_PER_WORD 32
+
+#define PR_BITS_PER_BYTE_LOG2 3
+#define PR_BITS_PER_SHORT_LOG2 4
+#define PR_BITS_PER_INT_LOG2 5
+#define PR_BITS_PER_INT64_LOG2 6
+#define PR_BITS_PER_LONG_LOG2 5
+#define PR_BITS_PER_FLOAT_LOG2 5
+#define PR_BITS_PER_DOUBLE_LOG2 6
+#define PR_BITS_PER_WORD_LOG2 5
+
+#define PR_ALIGN_OF_SHORT 2
+#define PR_ALIGN_OF_INT 4
+#define PR_ALIGN_OF_LONG 4
+#define PR_ALIGN_OF_INT64 8
+#define PR_ALIGN_OF_FLOAT 4
+#define PR_ALIGN_OF_DOUBLE 8
+#define PR_ALIGN_OF_POINTER 4
+#define PR_ALIGN_OF_WORD 4
+
+#define PR_BYTES_PER_WORD_LOG2 2
+#define PR_BYTES_PER_DWORD_LOG2 3
+
+#elif defined(__riscv) && (__riscv_xlen == 64)
+
+#undef IS_BIG_ENDIAN
+#define IS_LITTLE_ENDIAN 1
+#define IS_64
+
+#define PR_BYTES_PER_BYTE 1
+#define PR_BYTES_PER_SHORT 2
+#define PR_BYTES_PER_INT 4
+#define PR_BYTES_PER_INT64 8
+#define PR_BYTES_PER_LONG 8
+#define PR_BYTES_PER_FLOAT 4
+#define PR_BYTES_PER_DOUBLE 8
+#define PR_BYTES_PER_WORD 8
+#define PR_BYTES_PER_DWORD 8
+
+#define PR_BITS_PER_BYTE 8
+#define PR_BITS_PER_SHORT 16
+#define PR_BITS_PER_INT 32
+#define PR_BITS_PER_INT64 64
+#define PR_BITS_PER_LONG 64
+#define PR_BITS_PER_FLOAT 32
+#define PR_BITS_PER_DOUBLE 64
+#define PR_BITS_PER_WORD 64
+
+#define PR_BITS_PER_BYTE_LOG2 3
+#define PR_BITS_PER_SHORT_LOG2 4
+#define PR_BITS_PER_INT_LOG2 5
+#define PR_BITS_PER_INT64_LOG2 6
+#define PR_BITS_PER_LONG_LOG2 6
+#define PR_BITS_PER_FLOAT_LOG2 5
+#define PR_BITS_PER_DOUBLE_LOG2 6
+#define PR_BITS_PER_WORD_LOG2 6
+
+#define PR_ALIGN_OF_SHORT 2
+#define PR_ALIGN_OF_INT 4
+#define PR_ALIGN_OF_LONG 8
+#define PR_ALIGN_OF_INT64 8
+#define PR_ALIGN_OF_FLOAT 4
+#define PR_ALIGN_OF_DOUBLE 8
+#define PR_ALIGN_OF_POINTER 8
+#define PR_ALIGN_OF_WORD 8
+
+#define PR_BYTES_PER_WORD_LOG2 3
+#define PR_BYTES_PER_DWORD_LOG2 3
+
#else
#error "Unknown CPU architecture"
diff --git a/nspr/pr/include/md/_linux.h b/nspr/pr/include/md/_linux.h
index b4b298b..2370ab8 100644
--- a/nspr/pr/include/md/_linux.h
+++ b/nspr/pr/include/md/_linux.h
@@ -57,6 +57,10 @@
#define _PR_SI_ARCHITECTURE "m32r"
#elif defined(__or1k__)
#define _PR_SI_ARCHITECTURE "or1k"
+#elif defined(__riscv) && (__riscv_xlen == 32)
+#define _PR_SI_ARCHITECTURE "riscv32"
+#elif defined(__riscv) && (__riscv_xlen == 64)
+#define _PR_SI_ARCHITECTURE "riscv64"
#else
#error "Unknown CPU architecture"
#endif
--
2.11.0
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