Your message dated Sat, 26 Mar 2022 11:59:13 +0000 with message-id <c4d20274f6d76a43fb574d2177f6e3af4235e4be.camel@adam-barratt.org.uk> and subject line Closing p-u requests for updates in 11.3 has caused the Debian Bug report #1008031, regarding bullseye-pu: package intel-microcode/3.20210608.2 to be marked as done. This means that you claim that the problem has been dealt with. If this is not the case it is now your responsibility to reopen the Bug report if necessary, and/or fix the problem forthwith. (NB: If you are a system administrator and have no idea what this message is talking about, this may indicate a serious mail system misconfiguration somewhere. Please contact owner@bugs.debian.org immediately.) -- 1008031: https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=1008031 Debian Bug Tracking System Contact owner@bugs.debian.org with problems
--- Begin Message ---
- To: Debian Bug Tracking System <submit@bugs.debian.org>
- Subject: bullseye-pu: package intel-microcode/3.20210608.2
- From: Henrique de Moraes Holschuh <hmh@debian.org>
- Date: Sun, 20 Mar 2022 18:02:35 -0300
- Message-id: <[🔎] YjeWa8IpASEks4ho@khazad-dum.debian.net>
Package: release.debian.org Severity: normal Tags: bullseye User: release.debian.org@packages.debian.org Usertags: pu I'd like to update the intel-microcode package in bullseye. The new Intel microcode release includes fixes for several critical functional defects (errata) as well as security fixes and mitigations. It fixes hangs and incorrect behavior on *many* processors, as well as several CVEs. The package changelog has a reasonable list of the issues addressed by the update. There are no known regressions introduced by this microcode update. The same package is alrady in bullseye-backports, testing and unstable, with no bug reports. I have attached a git diff against the version currently in bullseye. Here's the diffstat: b/.gitignore | 1 b/changelog | 79 +++++++++++++++++++++++++++ b/debian/.gitignore | 5 + b/debian/changelog | 103 ++++++++++++++++++++++++++++++++++++ b/debian/ucode-blacklist.txt | 2 b/intel-ucode-with-caveats/06-4f-01 |binary b/intel-ucode/06-3f-02 |binary b/intel-ucode/06-3f-04 |binary b/intel-ucode/06-4e-03 |binary b/intel-ucode/06-55-03 |binary b/intel-ucode/06-55-04 |binary b/intel-ucode/06-55-06 |binary b/intel-ucode/06-55-07 |binary b/intel-ucode/06-55-0b |binary b/intel-ucode/06-56-03 |binary b/intel-ucode/06-56-04 |binary b/intel-ucode/06-56-05 |binary b/intel-ucode/06-5c-09 |binary b/intel-ucode/06-5c-0a |binary b/intel-ucode/06-5e-03 |binary b/intel-ucode/06-5f-01 |binary b/intel-ucode/06-6a-06 |binary b/intel-ucode/06-7a-01 |binary b/intel-ucode/06-7a-08 |binary b/intel-ucode/06-7e-05 |binary b/intel-ucode/06-8a-01 |binary b/intel-ucode/06-8c-01 |binary b/intel-ucode/06-8c-02 |binary b/intel-ucode/06-8d-01 |binary b/intel-ucode/06-8e-09 |binary b/intel-ucode/06-8e-0a |binary b/intel-ucode/06-8e-0b |binary b/intel-ucode/06-8e-0c |binary b/intel-ucode/06-96-01 |binary b/intel-ucode/06-9c-00 |binary b/intel-ucode/06-9e-09 |binary b/intel-ucode/06-9e-0a |binary b/intel-ucode/06-9e-0b |binary b/intel-ucode/06-9e-0c |binary b/intel-ucode/06-9e-0d |binary b/intel-ucode/06-a5-02 |binary b/intel-ucode/06-a5-03 |binary b/intel-ucode/06-a5-05 |binary b/intel-ucode/06-a6-00 |binary b/intel-ucode/06-a6-01 |binary b/intel-ucode/06-a7-01 |binary b/releasenote.md | 80 +++++++++++++++++++++++++++ 48 files changed, 270 insertions(+) PS: I apologise for sending this so close to the deadline for the next point release. -- Henrique Holschuhdiff --git a/.gitignore b/.gitignore index 5ead64a..0af49a5 100644 --- a/.gitignore +++ b/.gitignore @@ -1,3 +1,4 @@ intel-microcode.bin intel-microcode-64.bin *.pbin +*.dbin diff --git a/changelog b/changelog index 25b8ada..7dfb0b0 100644 --- a/changelog +++ b/changelog @@ -1,3 +1,81 @@ +2022-02-07: + * Relevant information: + https://www.intel.com/content/www/us/en/developer/topic-technology/software-security-guidance/processors-affected-consolidated-product-cpu-model.html + * Mitigates (*only* when loaded from firmware through the FIT) + CVE-2021-0146, INTEL-SA-00528: VT-d privilege escalation through + debug port, on Pentium, Celeron and Atom processors with signatures + 0x506c9, 0x506ca, 0x506f1, 0x706a1, 0x706a8 + https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/57#issuecomment-1036363145 + * Mitigates CVE-2021-0127, INTEL-SA-00532: an unexpected code breakpoint + may cause a system hang, on many processors. + * Mitigates CVE-2021-0145, INTEL-SA-00561: information disclosure due + to improper sanitization of shared resources (fast-store forward + predictor), on many processors. + * Mitigates CVE-2021-33120, INTEL-SA-00589: out-of-bounds read on some + Atom Processors may allow information disclosure or denial of service + via network access. + * Fixes critical errata (functional issues) on many processors + * Adds a MSR switch to enable RAPL filtering (default off, once enabled + it can only be disabled by poweroff or reboot). Useful to protect + SGX and other threads from side-channel info leak. Improves the + mitigation for CVE-2020-8694, CVE-2020-8695, INTEL-SA-00389 on many + processors. + * Disables TSX in more processor models. + * Fixes issue with WBINDV on multi-socket (server) systems which could + cause resets and unpredictable system behavior + * Adds a MSR switch to 10th and 11th-gen (Ice Lake, Tiger Lake, Rocket + Lake) processors, to control a fix for (hopefully rare) unpredictable + processor behavior when HyperThreading is enabled. This MSR switch + is enabled by default on *server* processors. On other processors, + it needs to be explicitly enabled by an updated UEFI/BIOS (with added + configuration logic). An updated operating system kernel might also + be able to enable it. When enabled, this fix can impact performance. + * Updated Microcodes: + sig 0x000306f2, pf_mask 0x6f, 2021-08-11, rev 0x0049, size 38912 + sig 0x000306f4, pf_mask 0x80, 2021-05-24, rev 0x001a, size 23552 + sig 0x000406e3, pf_mask 0xc0, 2021-04-28, rev 0x00ec, size 105472 + sig 0x00050653, pf_mask 0x97, 2021-05-26, rev 0x100015c, size 34816 + sig 0x00050654, pf_mask 0xb7, 2021-06-16, rev 0x2006c0a, size 43008 + sig 0x00050656, pf_mask 0xbf, 2021-08-13, rev 0x400320a, size 35840 + sig 0x00050657, pf_mask 0xbf, 2021-08-13, rev 0x500320a, size 36864 + sig 0x0005065b, pf_mask 0xbf, 2021-06-04, rev 0x7002402, size 28672 + sig 0x00050663, pf_mask 0x10, 2021-06-12, rev 0x700001c, size 28672 + sig 0x00050664, pf_mask 0x10, 2021-06-12, rev 0xf00001a, size 27648 + sig 0x00050665, pf_mask 0x10, 2021-09-18, rev 0xe000014, size 23552 + sig 0x000506c9, pf_mask 0x03, 2021-05-10, rev 0x0046, size 17408 + sig 0x000506ca, pf_mask 0x03, 2021-05-10, rev 0x0024, size 16384 + sig 0x000506e3, pf_mask 0x36, 2021-04-29, rev 0x00ec, size 108544 + sig 0x000506f1, pf_mask 0x01, 2021-05-10, rev 0x0036, size 11264 + sig 0x000606a6, pf_mask 0x87, 2021-12-03, rev 0xd000331, size 291840 + sig 0x000706a1, pf_mask 0x01, 2021-05-10, rev 0x0038, size 74752 + sig 0x000706a8, pf_mask 0x01, 2021-05-10, rev 0x001c, size 75776 + sig 0x000706e5, pf_mask 0x80, 2021-05-26, rev 0x00a8, size 110592 + sig 0x000806a1, pf_mask 0x10, 2021-09-02, rev 0x002d, size 34816 + sig 0x000806c1, pf_mask 0x80, 2021-08-06, rev 0x009a, size 109568 + sig 0x000806c2, pf_mask 0xc2, 2021-07-16, rev 0x0022, size 96256 + sig 0x000806d1, pf_mask 0xc2, 2021-07-16, rev 0x003c, size 101376 + sig 0x000806e9, pf_mask 0x10, 2021-04-28, rev 0x00ec, size 104448 + sig 0x000806e9, pf_mask 0xc0, 2021-04-28, rev 0x00ec, size 104448 + sig 0x000806ea, pf_mask 0xc0, 2021-04-28, rev 0x00ec, size 103424 + sig 0x000806eb, pf_mask 0xd0, 2021-04-28, rev 0x00ec, size 104448 + sig 0x000806ec, pf_mask 0x94, 2021-04-28, rev 0x00ec, size 104448 + sig 0x00090661, pf_mask 0x01, 2021-09-21, rev 0x0015, size 20480 + sig 0x000906c0, pf_mask 0x01, 2021-08-09, rev 0x2400001f, size 20480 + sig 0x000906e9, pf_mask 0x2a, 2021-04-29, rev 0x00ec, size 106496 + sig 0x000906ea, pf_mask 0x22, 2021-04-28, rev 0x00ec, size 102400 + sig 0x000906eb, pf_mask 0x02, 2021-04-28, rev 0x00ec, size 104448 + sig 0x000906ec, pf_mask 0x22, 2021-04-28, rev 0x00ec, size 103424 + sig 0x000906ed, pf_mask 0x22, 2021-04-28, rev 0x00ec, size 103424 + sig 0x000a0652, pf_mask 0x20, 2021-04-28, rev 0x00ec, size 93184 + sig 0x000a0653, pf_mask 0x22, 2021-04-28, rev 0x00ec, size 94208 + sig 0x000a0655, pf_mask 0x22, 2021-04-28, rev 0x00ee, size 94208 + sig 0x000a0660, pf_mask 0x80, 2021-04-28, rev 0x00ea, size 94208 + sig 0x000a0661, pf_mask 0x80, 2021-04-29, rev 0x00ec, size 93184 + sig 0x000a0671, pf_mask 0x02, 2021-08-29, rev 0x0050, size 102400 + * Removed Microcodes: + sig 0x00080664, pf_mask 0x01, 2021-02-17, rev 0xb00000f, size 130048 + sig 0x00080665, pf_mask 0x01, 2021-02-17, rev 0xb00000f, size 130048 + 2021-06-08: * Implements mitigations for CVE-2020-24511 CVE-2020-24512 (INTEL-SA-00464), information leakage through shared resources, @@ -8,6 +86,7 @@ * Implements mitigations for CVE-2020-24489 (INTEL-SA-00442), Intel VT-d privilege escalation * Fixes critical errata on several processors + * Disables TSX on several processors * New Microcodes: sig 0x00050655, pf_mask 0xb7, 2018-11-16, rev 0x3000010, size 47104 sig 0x000606a5, pf_mask 0x87, 2021-03-08, rev 0xc0002f0, size 283648 diff --git a/debian/.gitignore b/debian/.gitignore new file mode 100644 index 0000000..732e304 --- /dev/null +++ b/debian/.gitignore @@ -0,0 +1,5 @@ +files +intel-microcode.substvars +intel-microcode.debhelper.log +intel-microcode/ +.debhelper diff --git a/debian/changelog b/debian/changelog index c21c8c9..29c46e4 100644 --- a/debian/changelog +++ b/debian/changelog @@ -1,3 +1,106 @@ +intel-microcode (3.20220207.1~deb11u1) bullseye; urgency=medium + + * Backport for Debian stable (no changes) + * Release manager: this is the same package already in bullseye-backports, + testing and unstable. It fixes several security issues, adds MSRs that + can be enabled by updated kernels for enhanced security mitigaton, and + also fixes several critical "functional issues" (i.e. processor errata). + There were no reports to date of regressions introduced by this microcode + drelease. + + -- Henrique de Moraes Holschuh <hmh@debian.org> Sun, 20 Mar 2022 17:40:05 -0300 + +intel-microcode (3.20220207.1) unstable; urgency=medium + + * upstream changelog: new upstream datafile 20220207 + * Mitigates (*only* when loaded from UEFI firmware through the FIT) + CVE-2021-0146, INTEL-SA-00528: VT-d privilege escalation through + debug port, on Pentium, Celeron and Atom processors with signatures + 0x506c9, 0x506ca, 0x506f1, 0x706a1, 0x706a8 + https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/57#issuecomment-1036363145 + * Mitigates CVE-2021-0127, INTEL-SA-00532: an unexpected code breakpoint + may cause a system hang, on many processors. + * Mitigates CVE-2021-0145, INTEL-SA-00561: information disclosure due + to improper sanitization of shared resources (fast-store forward + predictor), on many processors. + * Mitigates CVE-2021-33120, INTEL-SA-00589: out-of-bounds read on some + Atom Processors may allow information disclosure or denial of service + via network access. + * Fixes critical errata (functional issues) on many processors + * Adds a MSR switch to enable RAPL filtering (default off, once enabled + it can only be disabled by poweroff or reboot). Useful to protect + SGX and other threads from side-channel info leak. Improves the + mitigation for CVE-2020-8694, CVE-2020-8695, INTEL-SA-00389 on many + processors. + * Disables TSX in more processor models. + * Fixes issue with WBINDV on multi-socket (server) systems which could + cause resets and unpredictable system behavior. + * Adds a MSR switch to 10th and 11th-gen (Ice Lake, Tiger Lake, Rocket + Lake) processors, to control a fix for (hopefully rare) unpredictable + processor behavior when HyperThreading is enabled. This MSR switch + is enabled by default on *server* processors. On other processors, + it needs to be explicitly enabled by an updated UEFI/BIOS (with added + configuration logic). An updated operating system kernel might also + be able to enable it. When enabled, this fix can impact performance. + * Updated Microcodes: + sig 0x000306f2, pf_mask 0x6f, 2021-08-11, rev 0x0049, size 38912 + sig 0x000306f4, pf_mask 0x80, 2021-05-24, rev 0x001a, size 23552 + sig 0x000406e3, pf_mask 0xc0, 2021-04-28, rev 0x00ec, size 105472 + sig 0x00050653, pf_mask 0x97, 2021-05-26, rev 0x100015c, size 34816 + sig 0x00050654, pf_mask 0xb7, 2021-06-16, rev 0x2006c0a, size 43008 + sig 0x00050656, pf_mask 0xbf, 2021-08-13, rev 0x400320a, size 35840 + sig 0x00050657, pf_mask 0xbf, 2021-08-13, rev 0x500320a, size 36864 + sig 0x0005065b, pf_mask 0xbf, 2021-06-04, rev 0x7002402, size 28672 + sig 0x00050663, pf_mask 0x10, 2021-06-12, rev 0x700001c, size 28672 + sig 0x00050664, pf_mask 0x10, 2021-06-12, rev 0xf00001a, size 27648 + sig 0x00050665, pf_mask 0x10, 2021-09-18, rev 0xe000014, size 23552 + sig 0x000506c9, pf_mask 0x03, 2021-05-10, rev 0x0046, size 17408 + sig 0x000506ca, pf_mask 0x03, 2021-05-10, rev 0x0024, size 16384 + sig 0x000506e3, pf_mask 0x36, 2021-04-29, rev 0x00ec, size 108544 + sig 0x000506f1, pf_mask 0x01, 2021-05-10, rev 0x0036, size 11264 + sig 0x000606a6, pf_mask 0x87, 2021-12-03, rev 0xd000331, size 291840 + sig 0x000706a1, pf_mask 0x01, 2021-05-10, rev 0x0038, size 74752 + sig 0x000706a8, pf_mask 0x01, 2021-05-10, rev 0x001c, size 75776 + sig 0x000706e5, pf_mask 0x80, 2021-05-26, rev 0x00a8, size 110592 + sig 0x000806a1, pf_mask 0x10, 2021-09-02, rev 0x002d, size 34816 + sig 0x000806c1, pf_mask 0x80, 2021-08-06, rev 0x009a, size 109568 + sig 0x000806c2, pf_mask 0xc2, 2021-07-16, rev 0x0022, size 96256 + sig 0x000806d1, pf_mask 0xc2, 2021-07-16, rev 0x003c, size 101376 + sig 0x000806e9, pf_mask 0x10, 2021-04-28, rev 0x00ec, size 104448 + sig 0x000806e9, pf_mask 0xc0, 2021-04-28, rev 0x00ec, size 104448 + sig 0x000806ea, pf_mask 0xc0, 2021-04-28, rev 0x00ec, size 103424 + sig 0x000806eb, pf_mask 0xd0, 2021-04-28, rev 0x00ec, size 104448 + sig 0x000806ec, pf_mask 0x94, 2021-04-28, rev 0x00ec, size 104448 + sig 0x00090661, pf_mask 0x01, 2021-09-21, rev 0x0015, size 20480 + sig 0x000906c0, pf_mask 0x01, 2021-08-09, rev 0x2400001f, size 20480 + sig 0x000906e9, pf_mask 0x2a, 2021-04-29, rev 0x00ec, size 106496 + sig 0x000906ea, pf_mask 0x22, 2021-04-28, rev 0x00ec, size 102400 + sig 0x000906eb, pf_mask 0x02, 2021-04-28, rev 0x00ec, size 104448 + sig 0x000906ec, pf_mask 0x22, 2021-04-28, rev 0x00ec, size 103424 + sig 0x000906ed, pf_mask 0x22, 2021-04-28, rev 0x00ec, size 103424 + sig 0x000a0652, pf_mask 0x20, 2021-04-28, rev 0x00ec, size 93184 + sig 0x000a0653, pf_mask 0x22, 2021-04-28, rev 0x00ec, size 94208 + sig 0x000a0655, pf_mask 0x22, 2021-04-28, rev 0x00ee, size 94208 + sig 0x000a0660, pf_mask 0x80, 2021-04-28, rev 0x00ea, size 94208 + sig 0x000a0661, pf_mask 0x80, 2021-04-29, rev 0x00ec, size 93184 + sig 0x000a0671, pf_mask 0x02, 2021-08-29, rev 0x0050, size 102400 + * Removed Microcodes: + sig 0x00080664, pf_mask 0x01, 2021-02-17, rev 0xb00000f, size 130048 + sig 0x00080665, pf_mask 0x01, 2021-02-17, rev 0xb00000f, size 130048 + * update .gitignore and debian/.gitignore. + Add some missing items from .gitignore and debian/.gitignore. + * ucode-blacklist: do not late-load 0x406e3 and 0x506e3. + When the BIOS microcode is older than revision 0x7f (and perhaps in some + other cases as well), the latest microcode updates for 0x406e3 and + 0x506e3 must be applied using the early update method. Otherwise, the + system might hang. Also: there must not be any other intermediate + microcode update attempts [other than the one done by the BIOS itself], + either. It must go from the BIOS microcode update directly to the + latest microcode update. + * source: update symlinks to reflect id of the latest release, 20220207 + + -- Henrique de Moraes Holschuh <hmh@debian.org> Fri, 25 Feb 2022 05:36:55 -0300 + intel-microcode (3.20210608.2) unstable; urgency=high * Correct INTEL-SA-00442 CVE id to CVE-2020-24489 in changelog and diff --git a/debian/ucode-blacklist.txt b/debian/ucode-blacklist.txt index 236bb93..50f194b 100644 --- a/debian/ucode-blacklist.txt +++ b/debian/ucode-blacklist.txt @@ -10,7 +10,9 @@ 06-46-01 06-47-01 06-56-02 +06-4e-03 06-4f-01 +06-5e-03 06-8e-09 06-8e-0a 06-8e-0b diff --git a/intel-ucode-with-caveats/06-4f-01 b/intel-ucode-with-caveats/06-4f-01 index 1c6e793..7ed66ea 100644 Binary files a/intel-ucode-with-caveats/06-4f-01 and b/intel-ucode-with-caveats/06-4f-01 differ diff --git a/intel-ucode/06-3f-02 b/intel-ucode/06-3f-02 index 04a67cf..41a9d90 100644 Binary files a/intel-ucode/06-3f-02 and b/intel-ucode/06-3f-02 differ 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[INTEL-SA-00528](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00528.html) +- Security updates for [INTEL-SA-00532](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00532.html) +- Update for functional issues. Refer to [Third Generation Intel® Xeon® Processor Scalable Family Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/637780) for details. +- Update for functional issues. Refer to [Second Generation Intel® Xeon® Processor Scalable Family Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/338848) for details. +- Update for functional issues. Refer to [Intel® Xeon® Processor Scalable Family Specification Update](https://www.intel.com/content/www/us/en/processors/xeon/scalable/xeon-scalable-spec-update.html?wapkw=processor+specification+update) for details. +- Update for functional issues. Refer to [11th Generation Intel® Core™ Processor Family Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/631123) for details. +- Update for functional issues. Refer to [11th Generation Intel® Core™ Processor Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/634808) for details. +- Update for functional issues. Refer to [10th Gen Intel® Core™ Processor Families Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/341079) for details. +- Update for functional issues. Refer to [10th Generation Intel® Core™ Processor Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/615213) for details. +- Update for functional issues. Refer to [8th Generation Intel® Core™ Processor Families Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/338025) for details. +- Update for functional issues. Refer to [8th Gen Intel® Core™ Processor Family Spec Update](https://www.intel.com/content/www/us/en/products/docs/processors/core/8th-gen-core-family-spec-update.html?wapkw=processor+specification+update) for details. +- Update for functional issues. Refer to [7th and 8th Generation Intel® Core™ Processor Family Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/334663) for details. +- Update for functional issues. Refer to [6th Generation Intel® Processor Family Specification Update](https://www.intel.com/content/www/us/en/processors/core/desktop-6th-gen-core-family-spec-update.html) for details. +- Update for functional issues. Refer to [Intel® Pentium® Silver and Intel® Celeron® Processors](https://www.intel.com/content/www/us/en/products/docs/processors/pentium/silver-celeron-spec-update.html?wapkw=processor+specification+update) for details. + +### New Platforms + +None + +### Updated Platforms + +| Processor | Stepping | F-M-S/PI | Old Ver | New Ver | Products +|:---------------|:---------|:------------|:---------|:---------|:--------- +| HSX-E/EP | Cx/M1 | 06-3f-02/6f | 00000046 | 00000049 | Core Gen4 X series; Xeon E5 v3 +| HSX-EX | E0 | 06-3f-04/80 | 00000019 | 0000001a | Xeon E7 v3 +| SKL-U/Y | D0 | 06-4e-03/c0 | 000000ea | 000000ec | Core Gen6 Mobile +| BDX-ML | B0/M0/R0 | 06-4f-01/ef | 0b00003e | 0b000040 | Xeon E5/E7 v4; Core i7-69xx/68xx +| SKX-SP | B1 | 06-55-03/97 | 0100015b | 0100015c | Xeon Scalable +| SKX-SP | H0/M0/U0 | 06-55-04/b7 | 02006b06 | 02006c0a | Xeon Scalable +| SKX-D | M1 | 06-55-04/b7 | 02006b06 | 02006c0a | Xeon D-21xx +| CLX-SP | B0 | 06-55-06/bf | 04003102 | 0400320a | Xeon Scalable Gen2 +| CLX-SP | B1 | 06-55-07/bf | 05003102 | 0500320a | Xeon Scalable Gen2 +| CPX-SP | A1 | 06-55-0b/bf | 07002302 | 07002402 | Xeon Scalable Gen3 +| BDX-DE | V2/V3 | 06-56-03/10 | 0700001b | 0700001c | Xeon D-1518/19/21/27/28/31/33/37/41/48, Pentium D1507/08/09/17/19 +| BDX-DE | Y0 | 06-56-04/10 | 0f000019 | 0f00001a | Xeon D-1557/59/67/71/77/81/87 +| BDX-NS | A1 | 06-56-05/10 | 0e000012 | 0e000014 | Xeon D-1513N/23/33/43/53 +| APL | D0 | 06-5c-09/03 | 00000044 | 00000046 | Pentium N/J4xxx, Celeron N/J3xxx, Atom x5/7-E39xx +| APL | E0 | 06-5c-0a/03 | 00000020 | 00000024 | Atom x5-E39xx +| SKL-H/S | R0/N0 | 06-5e-03/36 | 000000ea | 000000ec | Core Gen6; Xeon E3 v5 +| DNV | B0 | 06-5f-01/01 | 00000034 | 00000036 | Atom C Series +| ICX-SP | D0 | 06-6a-06/87 | 0d0002a0 | 0d000331 | Xeon Scalable Gen3 +| GLK | B0 | 06-7a-01/01 | 00000036 | 00000038 | Pentium Silver N/J5xxx, Celeron N/J4xxx +| GKL-R | R0 | 06-7a-08/01 | 0000001a | 0000001c | Pentium J5040/N5030, Celeron J4125/J4025/N4020/N4120 +| ICL-U/Y | D1 | 06-7e-05/80 | 000000a6 | 000000a8 | Core Gen10 Mobile +| LKF | B2/B3 | 06-8a-01/10 | 0000002a | 0000002d | Core w/Hybrid Technology +| TGL | B1 | 06-8c-01/80 | 00000088 | 0000009a | Core Gen11 Mobile +| TGL-R | C0 | 06-8c-02/c2 | 00000016 | 00000022 | Core Gen11 Mobile +| TGL-H | R0 | 06-8d-01/c2 | 0000002c | 0000003c | Core Gen11 Mobile +| AML-Y22 | H0 | 06-8e-09/10 | 000000ea | 000000ec | Core Gen8 Mobile +| KBL-U/Y | H0 | 06-8e-09/c0 | 000000ea | 000000ec | Core Gen7 Mobile +| CFL-U43e | D0 | 06-8e-0a/c0 | 000000ea | 000000ec | Core Gen8 Mobile +| WHL-U | W0 | 06-8e-0b/d0 | 000000ea | 000000ec | Core Gen8 Mobile +| AML-Y42 | V0 | 06-8e-0c/94 | 000000ea | 000000ec | Core Gen10 Mobile +| CML-Y42 | V0 | 06-8e-0c/94 | 000000ea | 000000ec | Core Gen10 Mobile +| WHL-U | V0 | 06-8e-0c/94 | 000000ea | 000000ec | Core Gen8 Mobile +| EHL | B1 | 06-96-01/01 | 00000011 | 00000015 | Pentium J6426/N6415, Celeron J6412/J6413/N6210/N6211, Atom x6000E +| JSL | A0/A1 | 06-9c-00/01 | 0000001d | 2400001f | Pentium N6000/N6005, Celeron N4500/N4505/N5100/N5105 +| KBL-G/H/S/E3 | B0 | 06-9e-09/2a | 000000ea | 000000ec | Core Gen7; Xeon E3 v6 +| CFL-H/S/E3 | U0 | 06-9e-0a/22 | 000000ea | 000000ec | Core Gen8 Desktop, Mobile, Xeon E +| CFL-S | B0 | 06-9e-0b/02 | 000000ea | 000000ec | Core Gen8 +| CFL-H/S | P0 | 06-9e-0c/22 | 000000ea | 000000ec | Core Gen9 +| CFL-H | R0 | 06-9e-0d/22 | 000000ea | 000000ec | Core Gen9 Mobile +| CML-H | R1 | 06-a5-02/20 | 000000ea | 000000ec | Core Gen10 Mobile +| CML-S62 | G1 | 06-a5-03/22 | 000000ea | 000000ec | Core Gen10 +| CML-S102 | Q0 | 06-a5-05/22 | 000000ec | 000000ee | Core Gen10 +| CML-U62 V1 | A0 | 06-a6-00/80 | 000000e8 | 000000ea | Core Gen10 Mobile +| CML-U62 V2 | K1 | 06-a6-01/80 | 000000ea | 000000ec | Core Gen10 Mobile +| RKL-S | B0 | 06-a7-01/02 | 00000040 | 00000050 | Core Gen11 + +### Removed Platforms + +| Processor | Stepping | F-M-S/PI | Old Ver | New Ver | Products +|:---------------|:---------|:------------|:---------|:---------|:--------- +| SNR | B0 | 06-86-04/01 | 0b00000f | | Atom P59xxB +| SNR | B1 | 06-86-05/01 | 0b00000f | | Atom P59xxB + ## [microcode-20210608](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20210608) diff --git a/supplementary-ucode-20210608_BDX-ML.bin b/supplementary-ucode-20220207_BDX-ML.bin similarity index 100% rename from supplementary-ucode-20210608_BDX-ML.bin rename to supplementary-ucode-20220207_BDX-ML.binAttachment: signature.asc
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- Subject: Closing p-u requests for updates in 11.3
- From: "Adam D. Barratt" <adam@adam-barratt.org.uk>
- Date: Sat, 26 Mar 2022 11:59:13 +0000
- Message-id: <c4d20274f6d76a43fb574d2177f6e3af4235e4be.camel@adam-barratt.org.uk>
Package: release.debian.org Version: 11.3 Hi, The updates referenced by these bugs were included in stable as part of this morning's 11.3 point release. Regards, Adam
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