--- Begin Message ---
Package: release.debian.org
Severity: normal
User: release.debian.org@packages.debian.org
Usertags: unblock
Dear release team,
I have uploaded a new version of the glibc package a few days ago, and
I would like if possible to see it migrated to testing. Here are the
changes:
| glibc (2.24-11) unstable; urgency=medium
|
| [ Aurelien Jarno ]
| * debian/patches/git-updates.diff: update from upstream stable branch:
| - Improve memcpy/memset performance on Skylake server.
| * debian/patches/any/cvs-malloc-hardening.diff: patch backported from
| upstream to further harden glibc malloc metadata against 1-byte
| overflows. Closes: #862950.
|
| -- Aurelien Jarno <aurel32@debian.org> Sun, 28 May 2017 19:29:33 +0200
The first patch is an update from the upstream 2.24 stable branch. It
changes the memcpy and memset routines used on the Intel Skylake server
CPUs to fix some performances issues. Note that it doesn't actually change
these routines, just the matching between the detected CPU features and
the version of the routine to use.
The second patch is a backport from the upstream git to further harden
the glibc malloc implementation. This has been requested by the security
team in bug#862950.
The full debdiff is attached. Note that if it is too late for the
Stretch release, this can be pushed by the next point release. We'll
also want to backport the security improvement to Jessie.
Therefore, thanks for considering this unblock:
unblock glibc/2.24-11
Regards,
Aurelien
-- System Information:
Debian Release: 9.0
APT prefers testing
APT policy: (990, 'testing'), (500, 'unstable'), (1, 'experimental')
Architecture: amd64
(x86_64)
Foreign Architectures: i386
Kernel: Linux 4.9.0-3-amd64 (SMP w/4 CPU cores)
Locale: LANG=fr_FR.UTF-8, LC_CTYPE=fr_FR.UTF-8 (charmap=UTF-8)
Shell: /bin/sh linked to /bin/dash
Init: systemd (via /run/systemd/system)
diff --git a/debian/changelog b/debian/changelog
index 44da152c..ee259a38 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,3 +1,14 @@
+glibc (2.24-11) unstable; urgency=medium
+
+ [ Aurelien Jarno ]
+ * debian/patches/git-updates.diff: update from upstream stable branch:
+ - Improve memcpy/memset performance on Skylake server.
+ * debian/patches/any/cvs-malloc-hardening.diff: patch backported from
+ upstream to further harden glibc malloc metadata against 1-byte
+ overflows. Closes: #862950.
+
+ -- Aurelien Jarno <aurel32@debian.org> Sun, 28 May 2017 19:29:33 +0200
+
glibc (2.24-10) unstable; urgency=medium
[ Samuel Thibault ]
diff --git a/debian/patches/any/cvs-malloc-hardening.diff b/debian/patches/any/cvs-malloc-hardening.diff
new file mode 100644
index 00000000..7c84545b
--- /dev/null
+++ b/debian/patches/any/cvs-malloc-hardening.diff
@@ -0,0 +1,31 @@
+2017-03-17 Chris Evans <scarybeasts@gmail.com>
+
+ * malloc/malloc.c (unlink): Add consistency check between size and
+ next->prev->size, to further harden against 1-byte overflows.
+
+2016-10-27 Florian Weimer <fweimer@redhat.com>
+
+ * malloc/malloc.c (sysmalloc): Initialize previous size field of
+ mmaped chunks.
+
+diff --git a/malloc/malloc.c b/malloc/malloc.c
+index e29105c372..994a23248e 100644
+--- a/malloc/malloc.c
++++ b/malloc/malloc.c
+@@ -1376,6 +1376,8 @@ typedef struct malloc_chunk *mbinptr;
+
+ /* Take a chunk off a bin list */
+ #define unlink(AV, P, BK, FD) { \
++ if (__builtin_expect (chunksize(P) != next_chunk(P)->prev_size, 0)) \
++ malloc_printerr (check_action, "corrupted size vs. prev_size", P, AV); \
+ FD = P->fd; \
+ BK = P->bk; \
+ if (__builtin_expect (FD->bk != P || BK->fd != P, 0)) \
+@@ -2306,6 +2306,7 @@ sysmalloc (INTERNAL_SIZE_T nb, mstate av)
+ else
+ {
+ p = (mchunkptr) mm;
++ p->prev_size = 0;
+ set_head (p, size | IS_MMAPPED);
+ }
+
diff --git a/debian/patches/git-updates.diff b/debian/patches/git-updates.diff
index b707b293..71d30bab 100644
--- a/debian/patches/git-updates.diff
+++ b/debian/patches/git-updates.diff
@@ -1,10 +1,52 @@
GIT update of git://sourceware.org/git/glibc.git/release/2.24/master from glibc-2.24
diff --git a/ChangeLog b/ChangeLog
-index c44c926094..13f809d26f 100644
+index c44c926094..8734292665 100644
--- a/ChangeLog
+++ b/ChangeLog
-@@ -1,3 +1,357 @@
+@@ -1,3 +1,399 @@
++2017-04-28 H.J. Lu <hongjiu.lu@intel.com>
++
++ [BZ #21396]
++ * sysdeps/x86/cpu-features.c (init_cpu_features): Set
++ Prefer_No_AVX512 if AVX512ER isn't available.
++ * sysdeps/x86/cpu-features.h (bit_arch_Prefer_No_AVX512): New.
++ (index_arch_Prefer_No_AVX512): Likewise.
++ * sysdeps/x86_64/multiarch/memcpy.S (__new_memcpy): Don't use
++ AVX512 version if Prefer_No_AVX512 is set.
++ * sysdeps/x86_64/multiarch/memcpy_chk.S (__memcpy_chk):
++ Likewise.
++ * sysdeps/x86_64/multiarch/memmove.S (__libc_memmove): Likewise.
++ * sysdeps/x86_64/multiarch/memmove_chk.S (__memmove_chk):
++ Likewise.
++ * sysdeps/x86_64/multiarch/mempcpy.S (__mempcpy): Likewise.
++ * sysdeps/x86_64/multiarch/mempcpy_chk.S (__mempcpy_chk):
++ Likewise.
++ * sysdeps/x86_64/multiarch/memset.S (memset): Likewise.
++ * sysdeps/x86_64/multiarch/memset_chk.S (__memset_chk):
++ Likewise.
++
++2017-04-28 H.J. Lu <hongjiu.lu@intel.com>
++
++ * sysdeps/x86/cpu-features.c (init_cpu_features): Set
++ Prefer_No_VZEROUPPER if AVX512ER is available.
++ * sysdeps/x86/cpu-features.h
++ (bit_cpu_AVX512PF): New.
++ (bit_cpu_AVX512ER): Likewise.
++ (bit_cpu_AVX512CD): Likewise.
++ (bit_cpu_AVX512BW): Likewise.
++ (bit_cpu_AVX512VL): Likewise.
++ (index_cpu_AVX512PF): Likewise.
++ (index_cpu_AVX512ER): Likewise.
++ (index_cpu_AVX512CD): Likewise.
++ (index_cpu_AVX512BW): Likewise.
++ (index_cpu_AVX512VL): Likewise.
++ (reg_AVX512PF): Likewise.
++ (reg_AVX512ER): Likewise.
++ (reg_AVX512CD): Likewise.
++ (reg_AVX512BW): Likewise.
++ (reg_AVX512VL): Likewise.
++
+2017-01-05 Joseph Myers <joseph@codesourcery.com>
+
+ [BZ #21026]
@@ -4016,14 +4058,33 @@ index 1c1cfff280..43acea3633 100644
+libpthread-shared-only-routines += sysdep
endif
diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
-index 9ce4b495a5..11b9af2231 100644
+index 9ce4b495a5..d1ee922290 100644
--- a/sysdeps/x86/cpu-features.c
+++ b/sysdeps/x86/cpu-features.c
-@@ -205,6 +205,20 @@ init_cpu_features (struct cpu_features *cpu_features)
+@@ -133,8 +133,6 @@ init_cpu_features (struct cpu_features *cpu_features)
+
+ case 0x57:
+ /* Knights Landing. Enable Silvermont optimizations. */
+- cpu_features->feature[index_arch_Prefer_No_VZEROUPPER]
+- |= bit_arch_Prefer_No_VZEROUPPER;
+
+ case 0x5c:
+ case 0x5f:
+@@ -205,6 +203,30 @@ init_cpu_features (struct cpu_features *cpu_features)
if (CPU_FEATURES_ARCH_P (cpu_features, AVX2_Usable))
cpu_features->feature[index_arch_AVX_Fast_Unaligned_Load]
|= bit_arch_AVX_Fast_Unaligned_Load;
+
++ /* Since AVX512ER is unique to Xeon Phi, set Prefer_No_VZEROUPPER
++ if AVX512ER is available. Don't use AVX512 to avoid lower CPU
++ frequency if AVX512ER isn't available. */
++ if (CPU_FEATURES_CPU_P (cpu_features, AVX512ER))
++ cpu_features->feature[index_arch_Prefer_No_VZEROUPPER]
++ |= bit_arch_Prefer_No_VZEROUPPER;
++ else
++ cpu_features->feature[index_arch_Prefer_No_AVX512]
++ |= bit_arch_Prefer_No_AVX512;
++
+ /* To avoid SSE transition penalty, use _dl_runtime_resolve_slow.
+ If XGETBV suports ECX == 1, use _dl_runtime_resolve_opt. */
+ cpu_features->feature[index_arch_Use_dl_runtime_resolve_slow]
@@ -4041,33 +4102,72 @@ index 9ce4b495a5..11b9af2231 100644
/* This spells out "AuthenticAMD". */
else if (ebx == 0x68747541 && ecx == 0x444d4163 && edx == 0x69746e65)
diff --git a/sysdeps/x86/cpu-features.h b/sysdeps/x86/cpu-features.h
-index 97ffe765f4..a8b5a734bd 100644
+index 97ffe765f4..2609ac0999 100644
--- a/sysdeps/x86/cpu-features.h
+++ b/sysdeps/x86/cpu-features.h
-@@ -37,6 +37,8 @@
+@@ -37,6 +37,9 @@
#define bit_arch_Prefer_No_VZEROUPPER (1 << 17)
#define bit_arch_Fast_Unaligned_Copy (1 << 18)
#define bit_arch_Prefer_ERMS (1 << 19)
+#define bit_arch_Use_dl_runtime_resolve_opt (1 << 20)
+#define bit_arch_Use_dl_runtime_resolve_slow (1 << 21)
++#define bit_arch_Prefer_No_AVX512 (1 << 22)
/* CPUID Feature flags. */
-@@ -107,6 +109,8 @@
+@@ -60,6 +63,11 @@
+ #define bit_cpu_AVX2 (1 << 5)
+ #define bit_cpu_AVX512F (1 << 16)
+ #define bit_cpu_AVX512DQ (1 << 17)
++#define bit_cpu_AVX512PF (1 << 26)
++#define bit_cpu_AVX512ER (1 << 27)
++#define bit_cpu_AVX512CD (1 << 28)
++#define bit_cpu_AVX512BW (1 << 30)
++#define bit_cpu_AVX512VL (1u << 31)
+
+ /* XCR0 Feature flags. */
+ #define bit_XMM_state (1 << 1)
+@@ -107,6 +115,9 @@
# define index_arch_Prefer_No_VZEROUPPER FEATURE_INDEX_1*FEATURE_SIZE
# define index_arch_Fast_Unaligned_Copy FEATURE_INDEX_1*FEATURE_SIZE
# define index_arch_Prefer_ERMS FEATURE_INDEX_1*FEATURE_SIZE
+# define index_arch_Use_dl_runtime_resolve_opt FEATURE_INDEX_1*FEATURE_SIZE
+# define index_arch_Use_dl_runtime_resolve_slow FEATURE_INDEX_1*FEATURE_SIZE
++# define index_arch_Prefer_No_AVX512 FEATURE_INDEX_1*FEATURE_SIZE
# if defined (_LIBC) && !IS_IN (nonlib)
-@@ -277,6 +281,8 @@ extern const struct cpu_features *__get_cpu_features (void)
+@@ -232,6 +243,11 @@ extern const struct cpu_features *__get_cpu_features (void)
+ # define index_cpu_AVX2 COMMON_CPUID_INDEX_7
+ # define index_cpu_AVX512F COMMON_CPUID_INDEX_7
+ # define index_cpu_AVX512DQ COMMON_CPUID_INDEX_7
++# define index_cpu_AVX512PF COMMON_CPUID_INDEX_7
++# define index_cpu_AVX512ER COMMON_CPUID_INDEX_7
++# define index_cpu_AVX512CD COMMON_CPUID_INDEX_7
++# define index_cpu_AVX512BW COMMON_CPUID_INDEX_7
++# define index_cpu_AVX512VL COMMON_CPUID_INDEX_7
+ # define index_cpu_ERMS COMMON_CPUID_INDEX_7
+ # define index_cpu_RTM COMMON_CPUID_INDEX_7
+ # define index_cpu_FMA COMMON_CPUID_INDEX_1
+@@ -250,6 +266,11 @@ extern const struct cpu_features *__get_cpu_features (void)
+ # define reg_AVX2 ebx
+ # define reg_AVX512F ebx
+ # define reg_AVX512DQ ebx
++# define reg_AVX512PF ebx
++# define reg_AVX512ER ebx
++# define reg_AVX512CD ebx
++# define reg_AVX512BW ebx
++# define reg_AVX512VL ebx
+ # define reg_ERMS ebx
+ # define reg_RTM ebx
+ # define reg_FMA ecx
+@@ -277,6 +298,9 @@ extern const struct cpu_features *__get_cpu_features (void)
# define index_arch_Prefer_No_VZEROUPPER FEATURE_INDEX_1
# define index_arch_Fast_Unaligned_Copy FEATURE_INDEX_1
# define index_arch_Prefer_ERMS FEATURE_INDEX_1
+# define index_arch_Use_dl_runtime_resolve_opt FEATURE_INDEX_1
+# define index_arch_Use_dl_runtime_resolve_slow FEATURE_INDEX_1
++# define index_arch_Prefer_No_AVX512 FEATURE_INDEX_1
#endif /* !__ASSEMBLER__ */
@@ -4295,6 +4395,84 @@ index 2296b55119..a95b3ad3cf 100644
/* For libc.so this is defined in memcpy.S.
For libc.a, this is a separate source to avoid
memcpy bringing in __chk_fail and all routines
+diff --git a/sysdeps/x86_64/multiarch/memcpy.S b/sysdeps/x86_64/multiarch/memcpy.S
+index b8677596f9..ea4ec70d1a 100644
+--- a/sysdeps/x86_64/multiarch/memcpy.S
++++ b/sysdeps/x86_64/multiarch/memcpy.S
+@@ -32,6 +32,8 @@ ENTRY(__new_memcpy)
+ lea __memcpy_erms(%rip), %RAX_LP
+ HAS_ARCH_FEATURE (Prefer_ERMS)
+ jnz 2f
++ HAS_ARCH_FEATURE (Prefer_No_AVX512)
++ jnz 1f
+ HAS_ARCH_FEATURE (AVX512F_Usable)
+ jz 1f
+ lea __memcpy_avx512_no_vzeroupper(%rip), %RAX_LP
+diff --git a/sysdeps/x86_64/multiarch/memcpy_chk.S b/sysdeps/x86_64/multiarch/memcpy_chk.S
+index 9d92c8a7e3..26b49de6f6 100644
+--- a/sysdeps/x86_64/multiarch/memcpy_chk.S
++++ b/sysdeps/x86_64/multiarch/memcpy_chk.S
+@@ -30,6 +30,8 @@
+ ENTRY(__memcpy_chk)
+ .type __memcpy_chk, @gnu_indirect_function
+ LOAD_RTLD_GLOBAL_RO_RDX
++ HAS_ARCH_FEATURE (Prefer_No_AVX512)
++ jnz 1f
+ HAS_ARCH_FEATURE (AVX512F_Usable)
+ jz 1f
+ lea __memcpy_chk_avx512_no_vzeroupper(%rip), %RAX_LP
+diff --git a/sysdeps/x86_64/multiarch/memmove.S b/sysdeps/x86_64/multiarch/memmove.S
+index ff5e041420..ef92afde5a 100644
+--- a/sysdeps/x86_64/multiarch/memmove.S
++++ b/sysdeps/x86_64/multiarch/memmove.S
+@@ -30,6 +30,8 @@ ENTRY(__libc_memmove)
+ lea __memmove_erms(%rip), %RAX_LP
+ HAS_ARCH_FEATURE (Prefer_ERMS)
+ jnz 2f
++ HAS_ARCH_FEATURE (Prefer_No_AVX512)
++ jnz 1f
+ HAS_ARCH_FEATURE (AVX512F_Usable)
+ jz 1f
+ lea __memmove_avx512_no_vzeroupper(%rip), %RAX_LP
+diff --git a/sysdeps/x86_64/multiarch/memmove_chk.S b/sysdeps/x86_64/multiarch/memmove_chk.S
+index 7f861206df..a9129c460a 100644
+--- a/sysdeps/x86_64/multiarch/memmove_chk.S
++++ b/sysdeps/x86_64/multiarch/memmove_chk.S
+@@ -29,6 +29,8 @@
+ ENTRY(__memmove_chk)
+ .type __memmove_chk, @gnu_indirect_function
+ LOAD_RTLD_GLOBAL_RO_RDX
++ HAS_ARCH_FEATURE (Prefer_No_AVX512)
++ jnz 1f
+ HAS_ARCH_FEATURE (AVX512F_Usable)
+ jz 1f
+ lea __memmove_chk_avx512_no_vzeroupper(%rip), %RAX_LP
+diff --git a/sysdeps/x86_64/multiarch/mempcpy.S b/sysdeps/x86_64/multiarch/mempcpy.S
+index 51970687cf..87c8299fea 100644
+--- a/sysdeps/x86_64/multiarch/mempcpy.S
++++ b/sysdeps/x86_64/multiarch/mempcpy.S
+@@ -32,6 +32,8 @@ ENTRY(__mempcpy)
+ lea __mempcpy_erms(%rip), %RAX_LP
+ HAS_ARCH_FEATURE (Prefer_ERMS)
+ jnz 2f
++ HAS_ARCH_FEATURE (Prefer_No_AVX512)
++ jnz 1f
+ HAS_ARCH_FEATURE (AVX512F_Usable)
+ jz 1f
+ lea __mempcpy_avx512_no_vzeroupper(%rip), %RAX_LP
+diff --git a/sysdeps/x86_64/multiarch/mempcpy_chk.S b/sysdeps/x86_64/multiarch/mempcpy_chk.S
+index 9e49f6f26e..642c67973b 100644
+--- a/sysdeps/x86_64/multiarch/mempcpy_chk.S
++++ b/sysdeps/x86_64/multiarch/mempcpy_chk.S
+@@ -30,6 +30,8 @@
+ ENTRY(__mempcpy_chk)
+ .type __mempcpy_chk, @gnu_indirect_function
+ LOAD_RTLD_GLOBAL_RO_RDX
++ HAS_ARCH_FEATURE (Prefer_No_AVX512)
++ jnz 1f
+ HAS_ARCH_FEATURE (AVX512F_Usable)
+ jz 1f
+ lea __mempcpy_chk_avx512_no_vzeroupper(%rip), %RAX_LP
diff --git a/sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S b/sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S
index 28e71fd576..acf448c9a6 100644
--- a/sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S
@@ -4308,6 +4486,32 @@ index 28e71fd576..acf448c9a6 100644
movq %rdx, %rcx
movzbl %sil, %eax
movq %rdi, %rdx
+diff --git a/sysdeps/x86_64/multiarch/memset.S b/sysdeps/x86_64/multiarch/memset.S
+index 96e99341aa..eae39e2ecd 100644
+--- a/sysdeps/x86_64/multiarch/memset.S
++++ b/sysdeps/x86_64/multiarch/memset.S
+@@ -41,6 +41,8 @@ ENTRY(memset)
+ jnz L(AVX512F)
+ lea __memset_avx2_unaligned(%rip), %RAX_LP
+ L(AVX512F):
++ HAS_ARCH_FEATURE (Prefer_No_AVX512)
++ jnz 2f
+ HAS_ARCH_FEATURE (AVX512F_Usable)
+ jz 2f
+ lea __memset_avx512_no_vzeroupper(%rip), %RAX_LP
+diff --git a/sysdeps/x86_64/multiarch/memset_chk.S b/sysdeps/x86_64/multiarch/memset_chk.S
+index 2efe6ed909..38d7bef6df 100644
+--- a/sysdeps/x86_64/multiarch/memset_chk.S
++++ b/sysdeps/x86_64/multiarch/memset_chk.S
+@@ -38,6 +38,8 @@ ENTRY(__memset_chk)
+ jnz L(AVX512F)
+ lea __memset_chk_avx2_unaligned(%rip), %RAX_LP
+ L(AVX512F):
++ HAS_ARCH_FEATURE (Prefer_No_AVX512)
++ jnz 2f
+ HAS_ARCH_FEATURE (AVX512F_Usable)
+ jz 2f
+ lea __memset_chk_avx512_no_vzeroupper(%rip), %RAX_LP
diff --git a/sysdeps/x86_64/sysdep.h b/sysdeps/x86_64/sysdep.h
index 75ac747be8..4b67fa80c1 100644
--- a/sysdeps/x86_64/sysdep.h
diff --git a/debian/patches/series b/debian/patches/series
index 16e7df06..52c98142 100644
--- a/debian/patches/series
+++ b/debian/patches/series
@@ -218,3 +218,4 @@ any/submitted-dlopen-noload.diff
any/submitted-perl-inc.diff
any/submitted-unicode-9.0.0.diff
any/cvs-remove-pid-tid-cache-clone.diff
+any/cvs-malloc-hardening.diff
--- End Message ---