Bug#778122: patch for gcc5 bug
tags 778122 + patch
thanks
Here's a fix for the GCC 5 build issue. Added extern to inline functions
in ppc_fpu.c, ppc_mmu.c, and emul.c
Upstream may prefer to move to C99 instead, please see section
"Different semantics for inline functions" at
https://gcc.gnu.org/gcc-5/porting_to.html for more background.
--
Alexander Balderson
Linux for HP Helion OpenStack, Hewlett-Packard
--- skyeye-1.2.5/arch/ppc/common/ppc_fpu.c 2007-06-17 02:22:22.000000000 +0000
+++ ppc_fpu.c 2015-07-15 20:49:30.860000000 +0000
@@ -29,7 +29,7 @@
#define PPC_FPR_TYPE2(a,b) (((a)<<8)|(b))
-inline void ppc_fpu_add(ppc_double *res, ppc_double *a, ppc_double *b)
+extern inline void ppc_fpu_add(ppc_double *res, ppc_double *a, ppc_double *b)
{
switch (PPC_FPR_TYPE2(a->type, b->type)) {
case PPC_FPR_TYPE2(ppc_fpr_norm, ppc_fpr_norm): {
@@ -134,7 +134,7 @@
}
}
-inline void ppc_fpu_quadro_mshr(ppc_quadro *q, int exp)
+extern inline void ppc_fpu_quadro_mshr(ppc_quadro *q, int exp)
{
if (exp >= 64) {
q->m1 = q->m0;
@@ -147,7 +147,7 @@
q->m1 |= t<<(64-exp);
}
-inline void ppc_fpu_quadro_mshl(ppc_quadro *q, int exp)
+extern inline void ppc_fpu_quadro_mshl(ppc_quadro *q, int exp)
{
if (exp >= 64) {
q->m0 = q->m1;
@@ -160,7 +160,7 @@
q->m0 |= t;
}
-inline void ppc_fpu_add_quadro_m(ppc_quadro *res, const ppc_quadro *a, const ppc_quadro *b)
+extern inline void ppc_fpu_add_quadro_m(ppc_quadro *res, const ppc_quadro *a, const ppc_quadro *b)
{
res->m1 = a->m1+b->m1;
if (res->m1 < a->m1) {
@@ -170,7 +170,7 @@
}
}
-inline void ppc_fpu_sub_quadro_m(ppc_quadro *res, const ppc_quadro *a, const ppc_quadro *b)
+extern inline void ppc_fpu_sub_quadro_m(ppc_quadro *res, const ppc_quadro *a, const ppc_quadro *b)
{
res->m1 = a->m1-b->m1;
if (a->m1 < b->m1) {
@@ -181,7 +181,7 @@
}
// res has 107 significant bits. a, b have 106 significant bits each.
-inline void ppc_fpu_add_quadro(ppc_quadro *res, ppc_quadro *a, ppc_quadro *b)
+extern inline void ppc_fpu_add_quadro(ppc_quadro *res, ppc_quadro *a, ppc_quadro *b)
{
// treat as 107 bit mantissa
if (a->type == ppc_fpr_norm) ppc_fpu_quadro_mshl(a, 1);
@@ -317,14 +317,14 @@
}
}
-inline void ppc_fpu_add_uint64_carry(uint64 *a, uint64 b, uint64 *carry)
+extern inline void ppc_fpu_add_uint64_carry(uint64 *a, uint64 b, uint64 *carry)
{
*carry = (*a+b < *a) ? 1 : 0;
*a += b;
}
// 'res' has 56 significant bits on return, a + b have 56 significant bits each
-inline void ppc_fpu_mul(ppc_double *res, const ppc_double *a, const ppc_double *b)
+extern inline void ppc_fpu_mul(ppc_double *res, const ppc_double *a, const ppc_double *b)
{
res->s = a->s ^ b->s;
switch (PPC_FPR_TYPE2(a->type, b->type)) {
@@ -404,7 +404,7 @@
// 'res' has 'prec' significant bits on return, a + b have 56 significant bits each
// for 111 >= prec >= 64
-inline void ppc_fpu_mul_quadro(ppc_quadro *res, ppc_double *a, ppc_double *b, int prec)
+extern inline void ppc_fpu_mul_quadro(ppc_quadro *res, ppc_double *a, ppc_double *b, int prec)
{
res->s = a->s ^ b->s;
switch (PPC_FPR_TYPE2(a->type, b->type)) {
@@ -496,7 +496,7 @@
// FIXME: There is a bug in this code that shows up in Mac OS X Finder fwd/bwd
// button: the top line is not rendered correctly. This works with the jitc_x86
// FPU however...
-inline void ppc_fpu_mul_add(ppc_double *res, ppc_double *m1, ppc_double *m2,
+extern inline void ppc_fpu_mul_add(ppc_double *res, ppc_double *m1, ppc_double *m2,
ppc_double *s)
{
ppc_quadro p;
@@ -539,7 +539,7 @@
ppc_fpu_get_fpr_type(res.type));*/
}
-inline void ppc_fpu_div(ppc_double *res, const ppc_double *a, const ppc_double *b)
+extern inline void ppc_fpu_div(ppc_double *res, const ppc_double *a, const ppc_double *b)
{
res->s = a->s ^ b->s;
switch (PPC_FPR_TYPE2(a->type, b->type)) {
@@ -601,7 +601,7 @@
}
}
-inline void ppc_fpu_sqrt(ppc_double *D, const ppc_double *B)
+extern inline void ppc_fpu_sqrt(ppc_double *D, const ppc_double *B)
{
switch (B->type) {
case ppc_fpr_norm:
@@ -682,7 +682,7 @@
/*
* a and b must not be NaNs
*/
-inline uint32 ppc_fpu_compare(ppc_double *a, ppc_double *b)
+extern inline uint32 ppc_fpu_compare(ppc_double *a, ppc_double *b)
{
if (a->type == ppc_fpr_zero) {
if (b->type == ppc_fpr_zero) return 2;
--- skyeye-1.2.5/arch/ppc/common/ppc_mmu.c 2007-11-16 03:16:22.000000000 +0000
+++ ppc_mmu.c 2015-07-15 20:49:38.284000000 +0000
@@ -1347,7 +1347,7 @@
return r;
}
-inline int FASTCALL ppc_read_physical_qword(uint32 addr, Vector_t *result)
+extern inline int FASTCALL ppc_read_physical_qword(uint32 addr, Vector_t *result)
{
if (addr < boot_romSize) {
// big endian
@@ -1422,7 +1422,7 @@
return r;
}
-inline int FASTCALL ppc_read_effective_qword(uint32 addr, Vector_t *result)
+extern inline int FASTCALL ppc_read_effective_qword(uint32 addr, Vector_t *result)
{
uint32 p;
int r;
@@ -1463,7 +1463,7 @@
return r;
}
-inline int FASTCALL ppc_write_physical_qword(uint32 addr, Vector_t *data)
+extern inline int FASTCALL ppc_write_physical_qword(uint32 addr, Vector_t *data)
{
if (addr < boot_romSize) {
// big endian
@@ -1501,7 +1501,7 @@
}
return io_mem_write(addr, ppc_bswap_word(data), 4);
}
-inline int FASTCALL ppc_write_effective_qword(uint32 addr, Vector_t data)
+extern inline int FASTCALL ppc_write_effective_qword(uint32 addr, Vector_t data)
{
uint32 p;
int r;
--- skyeye-1.2.5/arch/mips/common/emul.c 2008-05-01 13:01:00.000000000 +0000
+++ emul.c 2015-07-15 20:50:18.288000000 +0000
@@ -290,7 +290,7 @@
}
}
-inline UInt32
+extern inline UInt32
sign_extend_UInt32(UInt32 x, int n)
{
if (((UInt32)-1 >> 1) < 0) {
@@ -341,7 +341,7 @@
// Specialisations for 32 and 64 bit types.
-inline void
+extern inline void
divide_Int32(Int32 a, Int32 b)
{
if (32 <= sizeof(int)) {
@@ -353,7 +353,7 @@
}
}
-inline void
+extern inline void
divide_UInt32(UInt32 a, UInt32 b)
{
if (32 < sizeof(long)) {
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