Re: Status of PCI-PCI bridge on UMAX S900
since i also have a umax/s900 i am fairly interested in getting this
working. looking at the results from a dump-device-tree, i see that
a board on the other side of the bridge has the following properties:
/bandit@F2000000/pci-bridge@F/ADPT,2930CU@1
PROPERTIES:
vendor-id 00009004
device-id 00005078
revision-id 00000003
class-code 00010000
interrupts 00000001
min-grant 00000004
max-latency 00000004
subsystem-vendor-id 00009004
subsystem-id 00007850
devsel-speed 00000001
fast-back-to-back
AAPL,slot-name C1
fcode-rom-offset 00000000
name ADPT,2930CU
device_type scsi
model ADPT,1686806-04
compatible ADPT,AIC-7856
ADPT,fcode-version 342E3000
ADPT,fcode-date 31382D4A 616E2D31 39393900
reg 00010800 00000000 00000000 00000000 00000000
02010814 00000000 00000000 00000000 00001000
02010830 00000000 00000000 00000000 00010000
indeed, the 'interrupts' property is 1, which i believe means that the
board has 1 interrupt, not that its interrupt is one. ben said, 'when it
can't find it ["AAPL,interrupts"], it looks for the parent', so examining
the bridge itself:
/bandit@F2000000/pci-bridge@F
PROPERTIES:
vendor-id 00001011
device-id 00000021
revision-id 00000001
class-code 00060400
devsel-speed 00000001
fast-back-to-back
AAPL,interrupts 00000019
AAPL,slot-name C1
name pci-bridge
device_type pci
reg 00007800 00000000 00000000 00000000 00000000
#address-cells 00000003
#size-cells 00000002
ranges
bus-range 00000001 00000001
power-consumption 007270E0 007270E0
i am not a pci expert by any means, but i am guessing that all the slots
on the other side of this bridge share the interrupt, 0x19. this seems like
a bad idea, but its probably not that big a deal for graphics or low
performance (10mb ethernet, usb, etc) boards. so i guess your patch should
be more like:
...
ip = (int *) get_property(np, "AAPL,interrupts", &l);
+ /* JSL: HACK FOR UMAX S900 PCI-PCI BRIDGE (DECchip 21052) */
+ if (ip == 0 && np->parent != NULL)
+ ip = (int *) get_property(np->parent, "AAPL,interrupts", &l);
...
btw, looking at the device-tree on my g4, it looks each board on the other
side of the bridge is assigned an individual irq.
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