Re: MIPS kernel snapshots - 2.6.26-rc7
On Wed, Jun 25, 2008 at 01:18:03PM +0200, Thomas Bogendoerfer wrote:
> this might be due to the change in using a cache invalidate instead
> of writeback/invalidate and the 128 byte linesize of the second level
> cache on that R4k CPU modules. The patch below should fix that.
> I have no R4400 IP22 handy, so I'd appriciate if someone could test
> the patch. If it works, I'll sent the patch to Ralf with proper S-O-B.
I can certainly test this, but have no good MIPS cross-compiling
environment handy, nor any faster big-endian MIPS than my Indy, so
the patched package rebuild will take quite a while on this
hardware. If anyone could knock this out on a faster machine, I'd
appreciate it, but if not I'm happy to wait for it to complete on
mine. Thankfully, I have the machine hooked up through both a serial
console server and a network-controlled power strip, so it's no big
deal if I crash it remotely while testing new kernels.
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