Bug#983466: Is a mesa-bug
because wayland itself needs 2 fence registers for 2 momitors i
and X11 only 1.
A trace without using wayland shows the 15th register is used without
giving any problem:
Feb 24 20:10:59 debian systemd[1270]: Started GNOME Shell on X11.
Feb 24 20:11:29 debian gnome-shell[1505]: GK_intelClearWithBlit_fences 0 0
Feb 24 20:11:29 debian gnome-shell[1505]: GK_intelClearWithBlit_fences 1 0
Feb 24 20:11:29 debian gnome-shell[1505]: GK_intelClearWithBlit_fences 2 0
Feb 24 20:11:29 debian gnome-shell[1505]: GK_intelClearWithBlit_fences 3 0
Feb 24 20:11:29 debian gnome-shell[1505]: GK_intelClearWithBlit_fences 4 0
Feb 24 20:11:29 debian gnome-shell[1505]: GK_intelClearWithBlit_fences 5 0
Feb 24 20:11:29 debian gnome-shell[1505]: GK_intelClearWithBlit_fences 6 0
Feb 24 20:11:29 debian gnome-shell[1505]: GK_intelClearWithBlit_fences 7 0
Feb 24 20:11:29 debian gnome-shell[1505]: GK_intelClearWithBlit_fences 8 0
Feb 24 20:11:29 debian gnome-shell[1505]: GK_intelClearWithBlit_fences 9 0
Feb 24 20:11:29 debian gnome-shell[1505]: GK_intelClearWithBlit_fences 10 0
Feb 24 20:11:29 debian gnome-shell[1505]: GK_intelClearWithBlit_fences 11 0
Feb 24 20:11:29 debian gnome-shell[1505]: GK_intelClearWithBlit_fences 12 0
Feb 24 20:11:29 debian gnome-shell[1505]: GK_intelClearWithBlit_fences 13 0
Feb 24 20:11:29 debian gnome-shell[1505]: GK_intelClearWithBlit_fences 14 0
Feb 24 20:11:29 debian gnome-shell[1505]: GK_intelClearWithBlit_fences 15 0
Feb 24 20:11:29 debian gnome-shell[1505]: GK_intelClearWithBlit_fences 1 0
Feb 24 20:11:29 debian gnome-shell[1505]: GK_intelClearWithBlit_fences 2 0
Feb 24 20:11:29 debian gnome-shell[1505]: GK_intelClearWithBlit_fences 3 0
Feb 24 20:11:29 debian gnome-shell[1505]: GK_intelClearWithBlit_fences 4 0
Feb 24 20:11:29 debian gnome-shell[1505]: GK_intelClearWithBlit_fences 5 0
.....
....
So this seems to be a mesa bug and an exact duplicate
of https://gitlab.freedesktop.org/mesa/mesa/-/issues/790 .
Only the kernel-driver-error has changed and is misleading now.
I add the mesa-2.3.4-patch I currently use, which solves the problem.
Testing for register-overflow is done after updating the batch, If
overflow occurs
the batch is restored to the situation before the last update, the
buffer is flushed
and the batch again is updated with the last update.
--- a/src/mesa/drivers/dri/i915/intel_blit.c 2021-01-29 19:33:19.919872300 +0100
+++ b/src/mesa/drivers/dri/i915/intel_blit.c 2021-02-27 11:52:41.779536510 +0100
@@ -93,9 +93,10 @@
GLuint CMD, BR13, pass = 0;
int dst_y2 = dst_y + h;
int dst_x2 = dst_x + w;
- drm_intel_bo *aper_array[3];
+ drm_intel_bo *aper_array[1];
bool dst_y_tiled = dst_tiling == I915_TILING_Y;
bool src_y_tiled = src_tiling == I915_TILING_Y;
+ int reloc_count;
BATCH_LOCALS;
if (dst_tiling != I915_TILING_NONE) {
@@ -109,22 +110,6 @@
if (dst_y_tiled || src_y_tiled)
return false;
- /* do space check before going any further */
- do {
- aper_array[0] = intel->batch.bo;
- aper_array[1] = dst_buffer;
- aper_array[2] = src_buffer;
-
- if (dri_bufmgr_check_aperture_space(aper_array, 3) != 0) {
- intel_batchbuffer_flush(intel);
- pass++;
- } else
- break;
- } while (pass < 2);
-
- if (pass >= 2)
- return false;
-
intel_batchbuffer_require_space(intel, 8 * 4);
DBG("%s src:buf(%p)/%d+%d %d,%d dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n",
__func__,
@@ -177,15 +162,32 @@
assert(dst_x < dst_x2);
assert(dst_y < dst_y2);
- BEGIN_BATCH(8);
+ do {
+ reloc_count = drm_intel_gem_bo_get_reloc_count(intel->batch.bo);
+ BEGIN_BATCH(8);
+
+ OUT_BATCH(CMD | (8 - 2));
+ OUT_BATCH(BR13 | (uint16_t)dst_pitch);
+ OUT_BATCH((dst_y << 16) | dst_x);
+ OUT_BATCH((dst_y2 << 16) | dst_x2);
+ OUT_RELOC_FENCED(dst_buffer,
+ I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+ dst_offset);
+ /* do space check before going any further */
+ aper_array[0] = intel->batch.bo;
+ if (dri_bufmgr_check_aperture_space(aper_array, 1) != 0) {
+ drm_intel_gem_bo_clear_relocs(intel->batch.bo, reloc_count);
+ intel_batchbuffer_emit_reset(intel);
+ intel_batchbuffer_flush(intel);
+ pass++;
+ } else
+ break;
+ } while (pass < 2);
+
+ if (pass >= 2)
+ return false;
+
- OUT_BATCH(CMD | (8 - 2));
- OUT_BATCH(BR13 | (uint16_t)dst_pitch);
- OUT_BATCH((dst_y << 16) | dst_x);
- OUT_BATCH((dst_y2 << 16) | dst_x2);
- OUT_RELOC_FENCED(dst_buffer,
- I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
- dst_offset);
OUT_BATCH((src_y << 16) | src_x);
OUT_BATCH((uint16_t)src_pitch);
OUT_RELOC_FENCED(src_buffer,
@@ -335,6 +337,8 @@
GLuint clear_depth_value, clear_depth_mask;
GLint cx, cy, cw, ch;
GLbitfield fail_mask = 0;
+ int reloc_count;
+ bool flushed;
BATCH_LOCALS;
/* Note: we don't use this function on Gen7+ hardware, so we can safely
@@ -378,7 +382,7 @@
uint32_t BR13, CMD;
struct intel_region *region;
int pitch, cpp;
- drm_intel_bo *aper_array[2];
+ drm_intel_bo *aper_array[1];
mask &= ~(1 << buf);
@@ -463,23 +467,29 @@
assert(x1 < x2);
assert(y1 < y2);
- /* do space check before going any further */
- aper_array[0] = intel->batch.bo;
- aper_array[1] = region->bo;
-
- if (drm_intel_bufmgr_check_aperture_space(aper_array,
- ARRAY_SIZE(aper_array)) != 0) {
- intel_batchbuffer_flush(intel);
- }
+ flushed = false;
+ while (true) {
+ reloc_count = drm_intel_gem_bo_get_reloc_count(intel->batch.bo);
+ BEGIN_BATCH(6);
+ OUT_BATCH(CMD | (6 - 2));
+ OUT_BATCH(BR13);
+ OUT_BATCH((y1 << 16) | x1);
+ OUT_BATCH((y2 << 16) | x2);
+ OUT_RELOC_FENCED(region->bo,
+ I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+ 0);
+ /* do space check before going any further */
+ aper_array[0] = intel->batch.bo;
+ if ((!flushed) && dri_bufmgr_check_aperture_space(aper_array, 1) != 0) {
+ drm_intel_gem_bo_clear_relocs(intel->batch.bo, reloc_count);
+ intel_batchbuffer_emit_reset(intel);
+ intel_batchbuffer_flush(intel);
+ flushed = true;
+ } else
+ break;
+ }
+
- BEGIN_BATCH(6);
- OUT_BATCH(CMD | (6 - 2));
- OUT_BATCH(BR13);
- OUT_BATCH((y1 << 16) | x1);
- OUT_BATCH((y2 << 16) | x2);
- OUT_RELOC_FENCED(region->bo,
- I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
- 0);
OUT_BATCH(clear_val);
ADVANCE_BATCH();
@@ -632,7 +642,9 @@
struct intel_region *region = mt->region;
uint32_t BR13, CMD;
int pitch, cpp;
- drm_intel_bo *aper_array[2];
+ drm_intel_bo *aper_array[1];
+ int reloc_count;
+ bool flushed;
BATCH_LOCALS;
pitch = region->pitch;
@@ -647,23 +659,28 @@
BR13 |= pitch;
- /* do space check before going any further */
- aper_array[0] = intel->batch.bo;
- aper_array[1] = region->bo;
-
- if (drm_intel_bufmgr_check_aperture_space(aper_array,
- ARRAY_SIZE(aper_array)) != 0) {
- intel_batchbuffer_flush(intel);
- }
+ flushed = false;
+ while (true) {
+ reloc_count = drm_intel_gem_bo_get_reloc_count(intel->batch.bo);
+ BEGIN_BATCH(6);
+ OUT_BATCH(CMD | (6 - 2));
+ OUT_BATCH(BR13);
+ OUT_BATCH((y << 16) | x);
+ OUT_BATCH(((y + height) << 16) | (x + width));
+ OUT_RELOC_FENCED(region->bo,
+ I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+ 0);
+ /* do space check before going any further */
+ aper_array[0] = intel->batch.bo;
+ if ((!flushed) && dri_bufmgr_check_aperture_space(aper_array, 1) != 0) {
+ drm_intel_gem_bo_clear_relocs(intel->batch.bo, reloc_count);
+ intel_batchbuffer_emit_reset(intel);
+ intel_batchbuffer_flush(intel);
+ flushed = true;
+ } else
+ break;
+ }
- BEGIN_BATCH(6);
- OUT_BATCH(CMD | (6 - 2));
- OUT_BATCH(BR13);
- OUT_BATCH((y << 16) | x);
- OUT_BATCH(((y + height) << 16) | (x + width));
- OUT_RELOC_FENCED(region->bo,
- I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
- 0);
OUT_BATCH(0xffffffff); /* white, but only alpha gets written */
ADVANCE_BATCH();
--- a/src/mesa/drivers/dri/i915/intel_batchbuffer.h 2021-01-29 19:33:19.919872300 +0100
+++ b/src/mesa/drivers/dri/i915/intel_batchbuffer.h 2021-02-25 18:14:09.773491087 +0100
@@ -90,6 +90,12 @@
}
static inline void
+intel_batchbuffer_emit_reset(struct intel_context *intel)
+{
+ intel->batch.used = intel->batch.emit;
+}
+
+static inline void
intel_batchbuffer_require_space(struct intel_context *intel,
GLuint sz)
{
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