[Date Prev][Date Next] [Thread Prev][Thread Next] [Date Index] [Thread Index]

Bug#790694: linux-image-3.16.0-4-powerpc64: nouveau driver and msi interrupts



Control: tag -1 moreinfo

On Wed, 2015-07-01 at 07:49 +1000, Peter Saisanas wrote:
> Package: src:linux
> Version: 3.16.7-ckt11-1
> Severity: important
> 
> Dear Maintainer,
> 
> The nouveau driver defaults to using MSI interrupts should it see the msi
> interrupt pci flag supported on the supported target nVidia GPU.
> However, in some cases, the MSI address or vector is not configured correctly
> in the VGA bios or in this case the OpenFirmware FCODE ROM.

That is not its responsibility.

> When running linux-image-3.16.0-4-powerpc64 on a Powermac G5 11.2 machine (G5
> Quad to be precise) with a Quadro FX4500 (nv47 class gpu),the newer nouveau
> drivers in more recent kernels default to using MSI interrupts, however with
> the PPC G5, when using  MSI interrupts, the powerpc FCODE rom on Nvidia cards
> does not correctly set up the MSI address (or vector). This is a bug of the
> FCODE rom i believe.
> 
> The detailed output of lspci -vvv attached.
> Note, i have disabled msi interrupts for now, but by default, it will be used.
> 
> By my understanding, the msi address is : 0000000000000000  Data: 0000.
> 
> This is an invalid configuration? Correct?
>
> If possible, can the nouveau driver do a sanity check for invalid msi address
> configurations before enabling msi interrupts?
[...]

The kernel will set the MSI address and data before enabling MSI.  So
looking at them while MSI is disabled tells us nothing.

What is going wrong when MSI is enabled?

The attached patch would blacklist this GPU for MSI; does it fix the pr
oblem for you?  (Instructions for testing this are at
<http://kernel-handbook.alioth.debian.org/ch-common-tasks.html#s-common-official>.)

Ben.

-- 
Ben Hutchings
If you seem to know what you are doing, you'll be given more to do.

From: Ben Hutchings <ben@decadent.org.uk>
Date: Mon, 06 Jul 2015 01:24:37 +0100
Subject: nouveau: Disable MSI on G70 (NV47)
Bug-Debian: https://bugs.debian.org/790694

Peter Saisanas reported that MSI did not work properly on his Quadro
FX 4500 in a PowerMac.  Assuming this is a general problem with this
GPU type, disable MSI.

References: https://bugs.debian.org/790694
Reported-by: Peter Saisanas <psaisanas@gmail.com>
---
--- a/drivers/gpu/drm/nouveau/Makefile
+++ b/drivers/gpu/drm/nouveau/Makefile
@@ -155,6 +155,7 @@ nouveau-y += core/subdev/mc/base.o
 nouveau-y += core/subdev/mc/nv04.o
 nouveau-y += core/subdev/mc/nv40.o
 nouveau-y += core/subdev/mc/nv44.o
+nouveau-y += core/subdev/mc/nv47.o
 nouveau-y += core/subdev/mc/nv4c.o
 nouveau-y += core/subdev/mc/nv50.o
 nouveau-y += core/subdev/mc/nv94.o
--- a/drivers/gpu/drm/nouveau/core/engine/device/nv40.c
+++ b/drivers/gpu/drm/nouveau/core/engine/device/nv40.c
@@ -173,7 +173,7 @@ nv40_identify(struct nouveau_device *dev
 		device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv40_clock_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &nv40_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nv1a_devinit_oclass;
-		device->oclass[NVDEV_SUBDEV_MC     ] =  nv40_mc_oclass;
+		device->oclass[NVDEV_SUBDEV_MC     ] =  nv47_mc_oclass;
 		device->oclass[NVDEV_SUBDEV_BUS    ] =  nv31_bus_oclass;
 		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
 		device->oclass[NVDEV_SUBDEV_FB     ] =  nv47_fb_oclass;
--- a/drivers/gpu/drm/nouveau/core/include/subdev/mc.h
+++ b/drivers/gpu/drm/nouveau/core/include/subdev/mc.h
@@ -48,6 +48,7 @@ struct nouveau_mc_oclass {
 extern struct nouveau_oclass *nv04_mc_oclass;
 extern struct nouveau_oclass *nv40_mc_oclass;
 extern struct nouveau_oclass *nv44_mc_oclass;
+extern struct nouveau_oclass *nv47_mc_oclass;
 extern struct nouveau_oclass *nv4c_mc_oclass;
 extern struct nouveau_oclass *nv50_mc_oclass;
 extern struct nouveau_oclass *nv94_mc_oclass;
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/core/subdev/mc/nv47.c
@@ -0,0 +1,38 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ * Copyright 2015 Ben Hutchings
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs, Ben Hutchings
+ */
+
+#include "nv04.h"
+
+struct nouveau_oclass *
+nv47_mc_oclass = &(struct nouveau_mc_oclass) {
+	.base.handle = NV_SUBDEV(MC, 0x40),
+	.base.ofuncs = &(struct nouveau_ofuncs) {
+		.ctor = nv04_mc_ctor,
+		.dtor = _nouveau_mc_dtor,
+		.init = nv04_mc_init,
+		.fini = _nouveau_mc_fini,
+	},
+	.intr = nv04_mc_intr,
+}.base;

Attachment: signature.asc
Description: This is a digitally signed message part


Reply to: