Bug#660265: please include patch to select rc6 modes via kernel parameter
Package: linux-2.6
Version: 3.2.6-1
Severity: wishlist
Eugeni Dodonov from Intel proposed a patch to make rc6 modes selectable via
kernel parameter. With these patch it is possible to enable rc6 but not deep or
deepest rc6, a setting that makes ultrabooks, well at least the ASUS Zenbook,
work very reliable but still get good battery time.
It would be nice of this patch could be added to the Debian kernel.
Michael
-- System Information:
Debian Release: wheezy/sid
APT prefers unstable
APT policy: (500, 'unstable'), (500, 'testing'), (101, 'experimental')
Architecture: amd64 (x86_64)
Kernel: Linux 3.2.5-tunerc6v1-generic (SMP w/4 CPU cores)
Locale: LANG=de_DE.UTF-8, LC_CTYPE=de_DE.UTF-8 (charmap=UTF-8)
Shell: /bin/sh linked to /bin/dash
Versions of packages linux-image-3.2.0-1-amd64 depends on:
ii debconf [debconf-2.0] 1.5.41
ii initramfs-tools [linux-initramfs-tool] 0.100
ii linux-base 3.4
ii module-init-tools 3.16-1
Versions of packages linux-image-3.2.0-1-amd64 recommends:
ii firmware-linux-free 3
Versions of packages linux-image-3.2.0-1-amd64 suggests:
pn grub-pc 1.99-14
pn linux-doc-3.2 <none>
Versions of packages linux-image-3.2.0-1-amd64 is related to:
pn firmware-atheros <none>
pn firmware-bnx2 <none>
pn firmware-bnx2x <none>
pn firmware-brcm80211 <none>
pn firmware-intelwimax <none>
pn firmware-ipw2x00 <none>
pn firmware-ivtv <none>
pn firmware-iwlwifi <none>
pn firmware-libertas <none>
pn firmware-linux <none>
pn firmware-linux-nonfree <none>
pn firmware-myricom <none>
pn firmware-netxen <none>
pn firmware-qlogic <none>
pn firmware-ralink <none>
pn firmware-realtek <none>
pn xen-hypervisor <none>
-- debconf information excluded
>From 1c9b22f81d12d0183d14689ef4667c778a202eab Mon Sep 17 00:00:00 2001
From: Eugeni Dodonov <eugeni.dodonov@intel.com>
Date: Tue, 3 Jan 2012 15:25:08 -0200
Subject: [PATCH] drm/i915: allow to select rc6 modes via kernel parameter
This allows to select which rc6 modes are to be used via kernel parameter,
via a bitmask parameter. E.g.:
- to enable rc6, i915_enable_rc6=1
- to enable rc6 and deep rc6, i915_enable_rc6=3
- to enable rc6 and deepest rc6, use i915_enable_rc6=5
- to enable rc6, deep and deepest rc6, use i915_enable_rc6=7
Note that this changes behavior - previously, value of 1 would enable both
RC6 and deep RC6. Now it should only enable RC6 and deep/deepest RC6
stages must be enabled manually.
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 6 +++++-
drivers/gpu/drm/i915/i915_drv.h | 5 +++++
drivers/gpu/drm/i915/intel_display.c | 24 ++++++++++++++++++++----
3 files changed, 30 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index a1103fc..b7a91db 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -66,7 +66,11 @@ MODULE_PARM_DESC(semaphores,
int i915_enable_rc6 __read_mostly = -1;
module_param_named(i915_enable_rc6, i915_enable_rc6, int, 0600);
MODULE_PARM_DESC(i915_enable_rc6,
- "Enable power-saving render C-state 6 (default: -1 (use per-chip default)");
+ "Enable power-saving render C-state 6. "
+ "Different stages can be selected via bitmask values "
+ "(0 = disable; 1 = enable rc6; 2 = enable deep rc6; 4 = enable deepest rc6). "
+ "For example, 3 would enable rc6 and deep rc6, and 7 would enable everything. "
+ "default: -1 (use per-chip default)");
int i915_enable_fbc __read_mostly = -1;
module_param_named(i915_enable_fbc, i915_enable_fbc, int, 0600);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 554bef7..51ee407 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -997,6 +997,11 @@ struct drm_i915_file_private {
#include "i915_trace.h"
+/* RC6 modes */
+#define INTEL_RC6_ENABLE (1<<0)
+#define INTEL_RC6p_ENABLE (1<<1)
+#define INTEL_RC6pp_ENABLE (1<<2)
+
extern struct drm_ioctl_desc i915_ioctls[];
extern int i915_max_ioctl;
extern unsigned int i915_fbpercrtc __always_unused;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index daa5743..2bcb6a5 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -7907,7 +7907,7 @@ void intel_init_emon(struct drm_device *dev)
dev_priv->corr = (lcfuse & LCFUSE_HIV_MASK);
}
-static bool intel_enable_rc6(struct drm_device *dev)
+static int intel_enable_rc6(struct drm_device *dev)
{
/*
* Respect the kernel parameter if it is set
@@ -7938,6 +7938,7 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv)
u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
u32 pcu_mbox, rc6_mask = 0;
int cur_freq, min_freq, max_freq;
+ int rc6_mode;
int i;
/* Here begins a magic sequence of register writes to enable
@@ -7968,9 +7969,24 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv)
I915_WRITE(GEN6_RC6p_THRESHOLD, 100000);
I915_WRITE(GEN6_RC6pp_THRESHOLD, 64000); /* unused */
- if (intel_enable_rc6(dev_priv->dev))
- rc6_mask = GEN6_RC_CTL_RC6p_ENABLE |
- GEN6_RC_CTL_RC6_ENABLE;
+ rc6_mode = intel_enable_rc6(dev_priv->dev);
+ /* Are we enabling rc6? */
+ if (rc6_mode > 0) {
+ if (rc6_mode & INTEL_RC6_ENABLE) {
+ DRM_INFO("i915: Enabling RC6\n");
+ rc6_mask |= GEN6_RC_CTL_RC6_ENABLE;
+ }
+
+ if (rc6_mode & INTEL_RC6p_ENABLE) {
+ DRM_INFO("i915: Enabling deep RC6\n");
+ rc6_mask |= GEN6_RC_CTL_RC6p_ENABLE;
+ }
+
+ if (rc6_mode & INTEL_RC6pp_ENABLE) {
+ DRM_INFO("i915: Enabling deepest RC6\n");
+ rc6_mask |= GEN6_RC_CTL_RC6pp_ENABLE;
+ }
+ }
I915_WRITE(GEN6_RC_CONTROL,
rc6_mask |
--
1.7.9
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