Bug#609371: linux-image-2.6.37-trunk-sparc64: module scsi_mod: Unknown relocation: 36
- To: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
- Cc: Steven Rostedt <rostedt@goodmis.org>, David Miller <davem@davemloft.net>, richm@oldelvet.org.uk, 609371@bugs.debian.org, ben@decadent.org.uk, sparclinux@vger.kernel.org, linux-kernel@vger.kernel.org, fweisbec@gmail.com, mingo@redhat.com
- Subject: Bug#609371: linux-image-2.6.37-trunk-sparc64: module scsi_mod: Unknown relocation: 36
- From: Sam Ravnborg <sam@ravnborg.org>
- Date: Wed, 19 Jan 2011 23:32:34 +0100
- Message-id: <[🔎] 20110119223234.GA20218@merkur.ravnborg.org>
- Reply-to: Sam Ravnborg <sam@ravnborg.org>, 609371@bugs.debian.org
- In-reply-to: <[🔎] 20110119222144.GC23544@Krystal>
- References: <[🔎] 20110118.223247.241909079.davem@davemloft.net> <[🔎] 20110118.232045.58440904.davem@davemloft.net> <[🔎] 20110119153326.GC11022@Krystal> <[🔎] 20110119.134047.232915743.davem@davemloft.net> <[🔎] 1295474423.12215.1612.camel@gandalf.stny.rr.com> <[🔎] 20110119222144.GC23544@Krystal>
>
> I still wonder how a 32-bit system can generate an unaligned access trap for an
> access to a 64-bit variable aligned on 32-bit, given that there is, by
> definition, no 64-bit memory accesses available on the architecture ?
>From the SPARC V8 manual (this is the 32 bit version of SPARC):
Load/Store Instructions
...
Integer load and store instructions support byte (8-bit), halfword (16-bit), word
(32-bit), and doubleword (64-bit) accesses.
...
Alignment Restrictions
Halfword accesses must be aligned on a 2-byte boundary, word accesses (which
include instruction fetches) must be aligned on a 4-byte boundary, and doubleword
accesses must be aligned on an 8-byte boundary. An improperly aligned
address causes a load or store instruction to generate a mem_address_not_aligned
trap.
Sam
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